gpio-sama5d2-piobu.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * SAMA5D2 PIOBU GPIO controller
  4. *
  5. * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
  6. *
  7. * Author: Andrei Stefanescu <[email protected]>
  8. *
  9. */
  10. #include <linux/bits.h>
  11. #include <linux/gpio/driver.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mfd/syscon.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/regmap.h>
  19. #define PIOBU_NUM 8
  20. #define PIOBU_REG_SIZE 4
  21. /*
  22. * backup mode protection register for tamper detection
  23. * normal mode protection register for tamper detection
  24. * wakeup signal generation
  25. */
  26. #define PIOBU_BMPR 0x7C
  27. #define PIOBU_NMPR 0x80
  28. #define PIOBU_WKPR 0x90
  29. #define PIOBU_BASE 0x18 /* PIOBU offset from SECUMOD base register address. */
  30. #define PIOBU_DET_OFFSET 16
  31. /* In the datasheet this bit is called OUTPUT */
  32. #define PIOBU_DIRECTION BIT(8)
  33. #define PIOBU_OUT BIT(8)
  34. #define PIOBU_IN 0
  35. #define PIOBU_SOD BIT(9)
  36. #define PIOBU_PDS BIT(10)
  37. #define PIOBU_HIGH BIT(9)
  38. #define PIOBU_LOW 0
  39. struct sama5d2_piobu {
  40. struct gpio_chip chip;
  41. struct regmap *regmap;
  42. };
  43. /*
  44. * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call
  45. *
  46. * Do not consider pin for tamper detection (normal and backup modes)
  47. * Do not consider pin as tamper wakeup interrupt source
  48. */
  49. static int sama5d2_piobu_setup_pin(struct gpio_chip *chip, unsigned int pin)
  50. {
  51. int ret;
  52. struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,
  53. chip);
  54. unsigned int mask = BIT(PIOBU_DET_OFFSET + pin);
  55. ret = regmap_update_bits(piobu->regmap, PIOBU_BMPR, mask, 0);
  56. if (ret)
  57. return ret;
  58. ret = regmap_update_bits(piobu->regmap, PIOBU_NMPR, mask, 0);
  59. if (ret)
  60. return ret;
  61. return regmap_update_bits(piobu->regmap, PIOBU_WKPR, mask, 0);
  62. }
  63. /*
  64. * sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register
  65. */
  66. static int sama5d2_piobu_write_value(struct gpio_chip *chip, unsigned int pin,
  67. unsigned int mask, unsigned int value)
  68. {
  69. int reg;
  70. struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,
  71. chip);
  72. reg = PIOBU_BASE + pin * PIOBU_REG_SIZE;
  73. return regmap_update_bits(piobu->regmap, reg, mask, value);
  74. }
  75. /*
  76. * sama5d2_piobu_read_value() - read the value with masking from the pin's PIOBU
  77. * register
  78. */
  79. static int sama5d2_piobu_read_value(struct gpio_chip *chip, unsigned int pin,
  80. unsigned int mask)
  81. {
  82. struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu,
  83. chip);
  84. unsigned int val, reg;
  85. int ret;
  86. reg = PIOBU_BASE + pin * PIOBU_REG_SIZE;
  87. ret = regmap_read(piobu->regmap, reg, &val);
  88. if (ret < 0)
  89. return ret;
  90. return val & mask;
  91. }
  92. /*
  93. * sama5d2_piobu_get_direction() - gpiochip get_direction
  94. */
  95. static int sama5d2_piobu_get_direction(struct gpio_chip *chip,
  96. unsigned int pin)
  97. {
  98. int ret = sama5d2_piobu_read_value(chip, pin, PIOBU_DIRECTION);
  99. if (ret < 0)
  100. return ret;
  101. return (ret == PIOBU_IN) ? GPIO_LINE_DIRECTION_IN :
  102. GPIO_LINE_DIRECTION_OUT;
  103. }
  104. /*
  105. * sama5d2_piobu_direction_input() - gpiochip direction_input
  106. */
  107. static int sama5d2_piobu_direction_input(struct gpio_chip *chip,
  108. unsigned int pin)
  109. {
  110. return sama5d2_piobu_write_value(chip, pin, PIOBU_DIRECTION, PIOBU_IN);
  111. }
  112. /*
  113. * sama5d2_piobu_direction_output() - gpiochip direction_output
  114. */
  115. static int sama5d2_piobu_direction_output(struct gpio_chip *chip,
  116. unsigned int pin, int value)
  117. {
  118. unsigned int val = PIOBU_OUT;
  119. if (value)
  120. val |= PIOBU_HIGH;
  121. return sama5d2_piobu_write_value(chip, pin, PIOBU_DIRECTION | PIOBU_SOD,
  122. val);
  123. }
  124. /*
  125. * sama5d2_piobu_get() - gpiochip get
  126. */
  127. static int sama5d2_piobu_get(struct gpio_chip *chip, unsigned int pin)
  128. {
  129. /* if pin is input, read value from PDS else read from SOD */
  130. int ret = sama5d2_piobu_get_direction(chip, pin);
  131. if (ret == GPIO_LINE_DIRECTION_IN)
  132. ret = sama5d2_piobu_read_value(chip, pin, PIOBU_PDS);
  133. else if (ret == GPIO_LINE_DIRECTION_OUT)
  134. ret = sama5d2_piobu_read_value(chip, pin, PIOBU_SOD);
  135. if (ret < 0)
  136. return ret;
  137. return !!ret;
  138. }
  139. /*
  140. * sama5d2_piobu_set() - gpiochip set
  141. */
  142. static void sama5d2_piobu_set(struct gpio_chip *chip, unsigned int pin,
  143. int value)
  144. {
  145. if (!value)
  146. value = PIOBU_LOW;
  147. else
  148. value = PIOBU_HIGH;
  149. sama5d2_piobu_write_value(chip, pin, PIOBU_SOD, value);
  150. }
  151. static int sama5d2_piobu_probe(struct platform_device *pdev)
  152. {
  153. struct sama5d2_piobu *piobu;
  154. int ret, i;
  155. piobu = devm_kzalloc(&pdev->dev, sizeof(*piobu), GFP_KERNEL);
  156. if (!piobu)
  157. return -ENOMEM;
  158. platform_set_drvdata(pdev, piobu);
  159. piobu->chip.label = pdev->name;
  160. piobu->chip.parent = &pdev->dev;
  161. piobu->chip.owner = THIS_MODULE,
  162. piobu->chip.get_direction = sama5d2_piobu_get_direction,
  163. piobu->chip.direction_input = sama5d2_piobu_direction_input,
  164. piobu->chip.direction_output = sama5d2_piobu_direction_output,
  165. piobu->chip.get = sama5d2_piobu_get,
  166. piobu->chip.set = sama5d2_piobu_set,
  167. piobu->chip.base = -1,
  168. piobu->chip.ngpio = PIOBU_NUM,
  169. piobu->chip.can_sleep = 0,
  170. piobu->regmap = syscon_node_to_regmap(pdev->dev.of_node);
  171. if (IS_ERR(piobu->regmap)) {
  172. dev_err(&pdev->dev, "Failed to get syscon regmap %ld\n",
  173. PTR_ERR(piobu->regmap));
  174. return PTR_ERR(piobu->regmap);
  175. }
  176. ret = devm_gpiochip_add_data(&pdev->dev, &piobu->chip, piobu);
  177. if (ret) {
  178. dev_err(&pdev->dev, "Failed to add gpiochip %d\n", ret);
  179. return ret;
  180. }
  181. for (i = 0; i < PIOBU_NUM; ++i) {
  182. ret = sama5d2_piobu_setup_pin(&piobu->chip, i);
  183. if (ret) {
  184. dev_err(&pdev->dev, "Failed to setup pin: %d %d\n",
  185. i, ret);
  186. return ret;
  187. }
  188. }
  189. return 0;
  190. }
  191. static const struct of_device_id sama5d2_piobu_ids[] = {
  192. { .compatible = "atmel,sama5d2-secumod" },
  193. {},
  194. };
  195. MODULE_DEVICE_TABLE(of, sama5d2_piobu_ids);
  196. static struct platform_driver sama5d2_piobu_driver = {
  197. .driver = {
  198. .name = "sama5d2-piobu",
  199. .of_match_table = of_match_ptr(sama5d2_piobu_ids)
  200. },
  201. .probe = sama5d2_piobu_probe,
  202. };
  203. module_platform_driver(sama5d2_piobu_driver);
  204. MODULE_LICENSE("GPL v2");
  205. MODULE_DESCRIPTION("SAMA5D2 PIOBU controller driver");
  206. MODULE_AUTHOR("Andrei Stefanescu <[email protected]>");