k3-psil-j721s2.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com
  4. */
  5. #include <linux/kernel.h>
  6. #include "k3-psil-priv.h"
  7. #define PSIL_PDMA_XY_TR(x) \
  8. { \
  9. .thread_id = x, \
  10. .ep_config = { \
  11. .ep_type = PSIL_EP_PDMA_XY, \
  12. }, \
  13. }
  14. #define PSIL_PDMA_XY_PKT(x) \
  15. { \
  16. .thread_id = x, \
  17. .ep_config = { \
  18. .ep_type = PSIL_EP_PDMA_XY, \
  19. .pkt_mode = 1, \
  20. }, \
  21. }
  22. #define PSIL_PDMA_MCASP(x) \
  23. { \
  24. .thread_id = x, \
  25. .ep_config = { \
  26. .ep_type = PSIL_EP_PDMA_XY, \
  27. .pdma_acc32 = 1, \
  28. .pdma_burst = 1, \
  29. }, \
  30. }
  31. #define PSIL_ETHERNET(x) \
  32. { \
  33. .thread_id = x, \
  34. .ep_config = { \
  35. .ep_type = PSIL_EP_NATIVE, \
  36. .pkt_mode = 1, \
  37. .needs_epib = 1, \
  38. .psd_size = 16, \
  39. }, \
  40. }
  41. #define PSIL_SA2UL(x, tx) \
  42. { \
  43. .thread_id = x, \
  44. .ep_config = { \
  45. .ep_type = PSIL_EP_NATIVE, \
  46. .pkt_mode = 1, \
  47. .needs_epib = 1, \
  48. .psd_size = 64, \
  49. .notdpkt = tx, \
  50. }, \
  51. }
  52. /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
  53. static struct psil_ep j721s2_src_ep_map[] = {
  54. /* PDMA_MCASP - McASP0-4 */
  55. PSIL_PDMA_MCASP(0x4400),
  56. PSIL_PDMA_MCASP(0x4401),
  57. PSIL_PDMA_MCASP(0x4402),
  58. PSIL_PDMA_MCASP(0x4403),
  59. PSIL_PDMA_MCASP(0x4404),
  60. /* PDMA_SPI_G0 - SPI0-3 */
  61. PSIL_PDMA_XY_PKT(0x4600),
  62. PSIL_PDMA_XY_PKT(0x4601),
  63. PSIL_PDMA_XY_PKT(0x4602),
  64. PSIL_PDMA_XY_PKT(0x4603),
  65. PSIL_PDMA_XY_PKT(0x4604),
  66. PSIL_PDMA_XY_PKT(0x4605),
  67. PSIL_PDMA_XY_PKT(0x4606),
  68. PSIL_PDMA_XY_PKT(0x4607),
  69. PSIL_PDMA_XY_PKT(0x4608),
  70. PSIL_PDMA_XY_PKT(0x4609),
  71. PSIL_PDMA_XY_PKT(0x460a),
  72. PSIL_PDMA_XY_PKT(0x460b),
  73. PSIL_PDMA_XY_PKT(0x460c),
  74. PSIL_PDMA_XY_PKT(0x460d),
  75. PSIL_PDMA_XY_PKT(0x460e),
  76. PSIL_PDMA_XY_PKT(0x460f),
  77. /* PDMA_SPI_G1 - SPI4-7 */
  78. PSIL_PDMA_XY_PKT(0x4610),
  79. PSIL_PDMA_XY_PKT(0x4611),
  80. PSIL_PDMA_XY_PKT(0x4612),
  81. PSIL_PDMA_XY_PKT(0x4613),
  82. PSIL_PDMA_XY_PKT(0x4614),
  83. PSIL_PDMA_XY_PKT(0x4615),
  84. PSIL_PDMA_XY_PKT(0x4616),
  85. PSIL_PDMA_XY_PKT(0x4617),
  86. PSIL_PDMA_XY_PKT(0x4618),
  87. PSIL_PDMA_XY_PKT(0x4619),
  88. PSIL_PDMA_XY_PKT(0x461a),
  89. PSIL_PDMA_XY_PKT(0x461b),
  90. PSIL_PDMA_XY_PKT(0x461c),
  91. PSIL_PDMA_XY_PKT(0x461d),
  92. PSIL_PDMA_XY_PKT(0x461e),
  93. PSIL_PDMA_XY_PKT(0x461f),
  94. /* PDMA_USART_G0 - UART0-1 */
  95. PSIL_PDMA_XY_PKT(0x4700),
  96. PSIL_PDMA_XY_PKT(0x4701),
  97. /* PDMA_USART_G1 - UART2-3 */
  98. PSIL_PDMA_XY_PKT(0x4702),
  99. PSIL_PDMA_XY_PKT(0x4703),
  100. /* PDMA_USART_G2 - UART4-9 */
  101. PSIL_PDMA_XY_PKT(0x4704),
  102. PSIL_PDMA_XY_PKT(0x4705),
  103. PSIL_PDMA_XY_PKT(0x4706),
  104. PSIL_PDMA_XY_PKT(0x4707),
  105. PSIL_PDMA_XY_PKT(0x4708),
  106. PSIL_PDMA_XY_PKT(0x4709),
  107. /* MAIN SA2UL */
  108. PSIL_SA2UL(0x4a40, 0),
  109. PSIL_SA2UL(0x4a41, 0),
  110. PSIL_SA2UL(0x4a42, 0),
  111. PSIL_SA2UL(0x4a43, 0),
  112. /* CPSW0 */
  113. PSIL_ETHERNET(0x7000),
  114. /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */
  115. PSIL_PDMA_XY_PKT(0x7100),
  116. PSIL_PDMA_XY_PKT(0x7101),
  117. PSIL_PDMA_XY_PKT(0x7102),
  118. PSIL_PDMA_XY_PKT(0x7103),
  119. /* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */
  120. PSIL_PDMA_XY_PKT(0x7200),
  121. PSIL_PDMA_XY_PKT(0x7201),
  122. PSIL_PDMA_XY_PKT(0x7202),
  123. PSIL_PDMA_XY_PKT(0x7203),
  124. PSIL_PDMA_XY_PKT(0x7204),
  125. PSIL_PDMA_XY_PKT(0x7205),
  126. PSIL_PDMA_XY_PKT(0x7206),
  127. PSIL_PDMA_XY_PKT(0x7207),
  128. /* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */
  129. PSIL_PDMA_XY_PKT(0x7300),
  130. /* MCU_PDMA_ADC - ADC0-1 */
  131. PSIL_PDMA_XY_TR(0x7400),
  132. PSIL_PDMA_XY_TR(0x7401),
  133. PSIL_PDMA_XY_TR(0x7402),
  134. PSIL_PDMA_XY_TR(0x7403),
  135. /* SA2UL */
  136. PSIL_SA2UL(0x7500, 0),
  137. PSIL_SA2UL(0x7501, 0),
  138. PSIL_SA2UL(0x7502, 0),
  139. PSIL_SA2UL(0x7503, 0),
  140. };
  141. /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
  142. static struct psil_ep j721s2_dst_ep_map[] = {
  143. /* MAIN SA2UL */
  144. PSIL_SA2UL(0xca40, 1),
  145. PSIL_SA2UL(0xca41, 1),
  146. /* CPSW0 */
  147. PSIL_ETHERNET(0xf000),
  148. PSIL_ETHERNET(0xf001),
  149. PSIL_ETHERNET(0xf002),
  150. PSIL_ETHERNET(0xf003),
  151. PSIL_ETHERNET(0xf004),
  152. PSIL_ETHERNET(0xf005),
  153. PSIL_ETHERNET(0xf006),
  154. PSIL_ETHERNET(0xf007),
  155. /* SA2UL */
  156. PSIL_SA2UL(0xf500, 1),
  157. PSIL_SA2UL(0xf501, 1),
  158. };
  159. struct psil_ep_map j721s2_ep_map = {
  160. .name = "j721s2",
  161. .src = j721s2_src_ep_map,
  162. .src_count = ARRAY_SIZE(j721s2_src_ep_map),
  163. .dst = j721s2_dst_ep_map,
  164. .dst_count = ARRAY_SIZE(j721s2_dst_ep_map),
  165. };