dma-crossbar.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
  4. * Author: Peter Ujfalusi <[email protected]>
  5. */
  6. #include <linux/slab.h>
  7. #include <linux/err.h>
  8. #include <linux/init.h>
  9. #include <linux/list.h>
  10. #include <linux/io.h>
  11. #include <linux/of_address.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_dma.h>
  14. #define TI_XBAR_DRA7 0
  15. #define TI_XBAR_AM335X 1
  16. static const u32 ti_xbar_type[] = {
  17. [TI_XBAR_DRA7] = TI_XBAR_DRA7,
  18. [TI_XBAR_AM335X] = TI_XBAR_AM335X,
  19. };
  20. static const struct of_device_id ti_dma_xbar_match[] = {
  21. {
  22. .compatible = "ti,dra7-dma-crossbar",
  23. .data = &ti_xbar_type[TI_XBAR_DRA7],
  24. },
  25. {
  26. .compatible = "ti,am335x-edma-crossbar",
  27. .data = &ti_xbar_type[TI_XBAR_AM335X],
  28. },
  29. {},
  30. };
  31. /* Crossbar on AM335x/AM437x family */
  32. #define TI_AM335X_XBAR_LINES 64
  33. struct ti_am335x_xbar_data {
  34. void __iomem *iomem;
  35. struct dma_router dmarouter;
  36. u32 xbar_events; /* maximum number of events to select in xbar */
  37. u32 dma_requests; /* number of DMA requests on eDMA */
  38. };
  39. struct ti_am335x_xbar_map {
  40. u16 dma_line;
  41. u8 mux_val;
  42. };
  43. static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val)
  44. {
  45. /*
  46. * TPCC_EVT_MUX_60_63 register layout is different than the
  47. * rest, in the sense, that event 63 is mapped to lowest byte
  48. * and event 60 is mapped to highest, handle it separately.
  49. */
  50. if (event >= 60 && event <= 63)
  51. writeb_relaxed(val, iomem + (63 - event % 4));
  52. else
  53. writeb_relaxed(val, iomem + event);
  54. }
  55. static void ti_am335x_xbar_free(struct device *dev, void *route_data)
  56. {
  57. struct ti_am335x_xbar_data *xbar = dev_get_drvdata(dev);
  58. struct ti_am335x_xbar_map *map = route_data;
  59. dev_dbg(dev, "Unmapping XBAR event %u on channel %u\n",
  60. map->mux_val, map->dma_line);
  61. ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0);
  62. kfree(map);
  63. }
  64. static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec,
  65. struct of_dma *ofdma)
  66. {
  67. struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
  68. struct ti_am335x_xbar_data *xbar = platform_get_drvdata(pdev);
  69. struct ti_am335x_xbar_map *map;
  70. if (dma_spec->args_count != 3)
  71. return ERR_PTR(-EINVAL);
  72. if (dma_spec->args[2] >= xbar->xbar_events) {
  73. dev_err(&pdev->dev, "Invalid XBAR event number: %d\n",
  74. dma_spec->args[2]);
  75. return ERR_PTR(-EINVAL);
  76. }
  77. if (dma_spec->args[0] >= xbar->dma_requests) {
  78. dev_err(&pdev->dev, "Invalid DMA request line number: %d\n",
  79. dma_spec->args[0]);
  80. return ERR_PTR(-EINVAL);
  81. }
  82. /* The of_node_put() will be done in the core for the node */
  83. dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
  84. if (!dma_spec->np) {
  85. dev_err(&pdev->dev, "Can't get DMA master\n");
  86. return ERR_PTR(-EINVAL);
  87. }
  88. map = kzalloc(sizeof(*map), GFP_KERNEL);
  89. if (!map) {
  90. of_node_put(dma_spec->np);
  91. return ERR_PTR(-ENOMEM);
  92. }
  93. map->dma_line = (u16)dma_spec->args[0];
  94. map->mux_val = (u8)dma_spec->args[2];
  95. dma_spec->args[2] = 0;
  96. dma_spec->args_count = 2;
  97. dev_dbg(&pdev->dev, "Mapping XBAR event%u to DMA%u\n",
  98. map->mux_val, map->dma_line);
  99. ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val);
  100. return map;
  101. }
  102. static const struct of_device_id ti_am335x_master_match[] __maybe_unused = {
  103. { .compatible = "ti,edma3-tpcc", },
  104. {},
  105. };
  106. static int ti_am335x_xbar_probe(struct platform_device *pdev)
  107. {
  108. struct device_node *node = pdev->dev.of_node;
  109. const struct of_device_id *match;
  110. struct device_node *dma_node;
  111. struct ti_am335x_xbar_data *xbar;
  112. void __iomem *iomem;
  113. int i, ret;
  114. if (!node)
  115. return -ENODEV;
  116. xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
  117. if (!xbar)
  118. return -ENOMEM;
  119. dma_node = of_parse_phandle(node, "dma-masters", 0);
  120. if (!dma_node) {
  121. dev_err(&pdev->dev, "Can't get DMA master node\n");
  122. return -ENODEV;
  123. }
  124. match = of_match_node(ti_am335x_master_match, dma_node);
  125. if (!match) {
  126. dev_err(&pdev->dev, "DMA master is not supported\n");
  127. of_node_put(dma_node);
  128. return -EINVAL;
  129. }
  130. if (of_property_read_u32(dma_node, "dma-requests",
  131. &xbar->dma_requests)) {
  132. dev_info(&pdev->dev,
  133. "Missing XBAR output information, using %u.\n",
  134. TI_AM335X_XBAR_LINES);
  135. xbar->dma_requests = TI_AM335X_XBAR_LINES;
  136. }
  137. of_node_put(dma_node);
  138. if (of_property_read_u32(node, "dma-requests", &xbar->xbar_events)) {
  139. dev_info(&pdev->dev,
  140. "Missing XBAR input information, using %u.\n",
  141. TI_AM335X_XBAR_LINES);
  142. xbar->xbar_events = TI_AM335X_XBAR_LINES;
  143. }
  144. iomem = devm_platform_ioremap_resource(pdev, 0);
  145. if (IS_ERR(iomem))
  146. return PTR_ERR(iomem);
  147. xbar->iomem = iomem;
  148. xbar->dmarouter.dev = &pdev->dev;
  149. xbar->dmarouter.route_free = ti_am335x_xbar_free;
  150. platform_set_drvdata(pdev, xbar);
  151. /* Reset the crossbar */
  152. for (i = 0; i < xbar->dma_requests; i++)
  153. ti_am335x_xbar_write(xbar->iomem, i, 0);
  154. ret = of_dma_router_register(node, ti_am335x_xbar_route_allocate,
  155. &xbar->dmarouter);
  156. return ret;
  157. }
  158. /* Crossbar on DRA7xx family */
  159. #define TI_DRA7_XBAR_OUTPUTS 127
  160. #define TI_DRA7_XBAR_INPUTS 256
  161. struct ti_dra7_xbar_data {
  162. void __iomem *iomem;
  163. struct dma_router dmarouter;
  164. struct mutex mutex;
  165. unsigned long *dma_inuse;
  166. u16 safe_val; /* Value to rest the crossbar lines */
  167. u32 xbar_requests; /* number of DMA requests connected to XBAR */
  168. u32 dma_requests; /* number of DMA requests forwarded to DMA */
  169. u32 dma_offset;
  170. };
  171. struct ti_dra7_xbar_map {
  172. u16 xbar_in;
  173. int xbar_out;
  174. };
  175. static inline void ti_dra7_xbar_write(void __iomem *iomem, int xbar, u16 val)
  176. {
  177. writew_relaxed(val, iomem + (xbar * 2));
  178. }
  179. static void ti_dra7_xbar_free(struct device *dev, void *route_data)
  180. {
  181. struct ti_dra7_xbar_data *xbar = dev_get_drvdata(dev);
  182. struct ti_dra7_xbar_map *map = route_data;
  183. dev_dbg(dev, "Unmapping XBAR%u (was routed to %d)\n",
  184. map->xbar_in, map->xbar_out);
  185. ti_dra7_xbar_write(xbar->iomem, map->xbar_out, xbar->safe_val);
  186. mutex_lock(&xbar->mutex);
  187. clear_bit(map->xbar_out, xbar->dma_inuse);
  188. mutex_unlock(&xbar->mutex);
  189. kfree(map);
  190. }
  191. static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec,
  192. struct of_dma *ofdma)
  193. {
  194. struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
  195. struct ti_dra7_xbar_data *xbar = platform_get_drvdata(pdev);
  196. struct ti_dra7_xbar_map *map;
  197. if (dma_spec->args[0] >= xbar->xbar_requests) {
  198. dev_err(&pdev->dev, "Invalid XBAR request number: %d\n",
  199. dma_spec->args[0]);
  200. put_device(&pdev->dev);
  201. return ERR_PTR(-EINVAL);
  202. }
  203. /* The of_node_put() will be done in the core for the node */
  204. dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
  205. if (!dma_spec->np) {
  206. dev_err(&pdev->dev, "Can't get DMA master\n");
  207. put_device(&pdev->dev);
  208. return ERR_PTR(-EINVAL);
  209. }
  210. map = kzalloc(sizeof(*map), GFP_KERNEL);
  211. if (!map) {
  212. of_node_put(dma_spec->np);
  213. put_device(&pdev->dev);
  214. return ERR_PTR(-ENOMEM);
  215. }
  216. mutex_lock(&xbar->mutex);
  217. map->xbar_out = find_first_zero_bit(xbar->dma_inuse,
  218. xbar->dma_requests);
  219. if (map->xbar_out == xbar->dma_requests) {
  220. mutex_unlock(&xbar->mutex);
  221. dev_err(&pdev->dev, "Run out of free DMA requests\n");
  222. kfree(map);
  223. of_node_put(dma_spec->np);
  224. put_device(&pdev->dev);
  225. return ERR_PTR(-ENOMEM);
  226. }
  227. set_bit(map->xbar_out, xbar->dma_inuse);
  228. mutex_unlock(&xbar->mutex);
  229. map->xbar_in = (u16)dma_spec->args[0];
  230. dma_spec->args[0] = map->xbar_out + xbar->dma_offset;
  231. dev_dbg(&pdev->dev, "Mapping XBAR%u to DMA%d\n",
  232. map->xbar_in, map->xbar_out);
  233. ti_dra7_xbar_write(xbar->iomem, map->xbar_out, map->xbar_in);
  234. return map;
  235. }
  236. #define TI_XBAR_EDMA_OFFSET 0
  237. #define TI_XBAR_SDMA_OFFSET 1
  238. static const u32 ti_dma_offset[] = {
  239. [TI_XBAR_EDMA_OFFSET] = 0,
  240. [TI_XBAR_SDMA_OFFSET] = 1,
  241. };
  242. static const struct of_device_id ti_dra7_master_match[] __maybe_unused = {
  243. {
  244. .compatible = "ti,omap4430-sdma",
  245. .data = &ti_dma_offset[TI_XBAR_SDMA_OFFSET],
  246. },
  247. {
  248. .compatible = "ti,edma3",
  249. .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
  250. },
  251. {
  252. .compatible = "ti,edma3-tpcc",
  253. .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
  254. },
  255. {},
  256. };
  257. static inline void ti_dra7_xbar_reserve(int offset, int len, unsigned long *p)
  258. {
  259. for (; len > 0; len--)
  260. set_bit(offset + (len - 1), p);
  261. }
  262. static int ti_dra7_xbar_probe(struct platform_device *pdev)
  263. {
  264. struct device_node *node = pdev->dev.of_node;
  265. const struct of_device_id *match;
  266. struct device_node *dma_node;
  267. struct ti_dra7_xbar_data *xbar;
  268. struct property *prop;
  269. u32 safe_val;
  270. int sz;
  271. void __iomem *iomem;
  272. int i, ret;
  273. if (!node)
  274. return -ENODEV;
  275. xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
  276. if (!xbar)
  277. return -ENOMEM;
  278. dma_node = of_parse_phandle(node, "dma-masters", 0);
  279. if (!dma_node) {
  280. dev_err(&pdev->dev, "Can't get DMA master node\n");
  281. return -ENODEV;
  282. }
  283. match = of_match_node(ti_dra7_master_match, dma_node);
  284. if (!match) {
  285. dev_err(&pdev->dev, "DMA master is not supported\n");
  286. of_node_put(dma_node);
  287. return -EINVAL;
  288. }
  289. if (of_property_read_u32(dma_node, "dma-requests",
  290. &xbar->dma_requests)) {
  291. dev_info(&pdev->dev,
  292. "Missing XBAR output information, using %u.\n",
  293. TI_DRA7_XBAR_OUTPUTS);
  294. xbar->dma_requests = TI_DRA7_XBAR_OUTPUTS;
  295. }
  296. of_node_put(dma_node);
  297. xbar->dma_inuse = devm_kcalloc(&pdev->dev,
  298. BITS_TO_LONGS(xbar->dma_requests),
  299. sizeof(unsigned long), GFP_KERNEL);
  300. if (!xbar->dma_inuse)
  301. return -ENOMEM;
  302. if (of_property_read_u32(node, "dma-requests", &xbar->xbar_requests)) {
  303. dev_info(&pdev->dev,
  304. "Missing XBAR input information, using %u.\n",
  305. TI_DRA7_XBAR_INPUTS);
  306. xbar->xbar_requests = TI_DRA7_XBAR_INPUTS;
  307. }
  308. if (!of_property_read_u32(node, "ti,dma-safe-map", &safe_val))
  309. xbar->safe_val = (u16)safe_val;
  310. prop = of_find_property(node, "ti,reserved-dma-request-ranges", &sz);
  311. if (prop) {
  312. const char pname[] = "ti,reserved-dma-request-ranges";
  313. u32 (*rsv_events)[2];
  314. size_t nelm = sz / sizeof(*rsv_events);
  315. int i;
  316. if (!nelm)
  317. return -EINVAL;
  318. rsv_events = kcalloc(nelm, sizeof(*rsv_events), GFP_KERNEL);
  319. if (!rsv_events)
  320. return -ENOMEM;
  321. ret = of_property_read_u32_array(node, pname, (u32 *)rsv_events,
  322. nelm * 2);
  323. if (ret) {
  324. kfree(rsv_events);
  325. return ret;
  326. }
  327. for (i = 0; i < nelm; i++) {
  328. ti_dra7_xbar_reserve(rsv_events[i][0], rsv_events[i][1],
  329. xbar->dma_inuse);
  330. }
  331. kfree(rsv_events);
  332. }
  333. iomem = devm_platform_ioremap_resource(pdev, 0);
  334. if (IS_ERR(iomem))
  335. return PTR_ERR(iomem);
  336. xbar->iomem = iomem;
  337. xbar->dmarouter.dev = &pdev->dev;
  338. xbar->dmarouter.route_free = ti_dra7_xbar_free;
  339. xbar->dma_offset = *(u32 *)match->data;
  340. mutex_init(&xbar->mutex);
  341. platform_set_drvdata(pdev, xbar);
  342. /* Reset the crossbar */
  343. for (i = 0; i < xbar->dma_requests; i++) {
  344. if (!test_bit(i, xbar->dma_inuse))
  345. ti_dra7_xbar_write(xbar->iomem, i, xbar->safe_val);
  346. }
  347. ret = of_dma_router_register(node, ti_dra7_xbar_route_allocate,
  348. &xbar->dmarouter);
  349. if (ret) {
  350. /* Restore the defaults for the crossbar */
  351. for (i = 0; i < xbar->dma_requests; i++) {
  352. if (!test_bit(i, xbar->dma_inuse))
  353. ti_dra7_xbar_write(xbar->iomem, i, i);
  354. }
  355. }
  356. return ret;
  357. }
  358. static int ti_dma_xbar_probe(struct platform_device *pdev)
  359. {
  360. const struct of_device_id *match;
  361. int ret;
  362. match = of_match_node(ti_dma_xbar_match, pdev->dev.of_node);
  363. if (unlikely(!match))
  364. return -EINVAL;
  365. switch (*(u32 *)match->data) {
  366. case TI_XBAR_DRA7:
  367. ret = ti_dra7_xbar_probe(pdev);
  368. break;
  369. case TI_XBAR_AM335X:
  370. ret = ti_am335x_xbar_probe(pdev);
  371. break;
  372. default:
  373. dev_err(&pdev->dev, "Unsupported crossbar\n");
  374. ret = -ENODEV;
  375. break;
  376. }
  377. return ret;
  378. }
  379. static struct platform_driver ti_dma_xbar_driver = {
  380. .driver = {
  381. .name = "ti-dma-crossbar",
  382. .of_match_table = ti_dma_xbar_match,
  383. },
  384. .probe = ti_dma_xbar_probe,
  385. };
  386. static int omap_dmaxbar_init(void)
  387. {
  388. return platform_driver_register(&ti_dma_xbar_driver);
  389. }
  390. arch_initcall(omap_dmaxbar_init);