bestcomm.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Driver for MPC52xx processor BestComm peripheral controller
  4. *
  5. * Copyright (C) 2006-2007 Sylvain Munaut <[email protected]>
  6. * Copyright (C) 2005 Varma Electronics Oy,
  7. * ( by Andrey Volkov <[email protected]> )
  8. * Copyright (C) 2003-2004 MontaVista, Software, Inc.
  9. * ( by Dale Farnsworth <[email protected]> )
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/of.h>
  15. #include <linux/of_address.h>
  16. #include <linux/of_device.h>
  17. #include <linux/of_irq.h>
  18. #include <linux/of_platform.h>
  19. #include <asm/io.h>
  20. #include <asm/irq.h>
  21. #include <asm/mpc52xx.h>
  22. #include <linux/fsl/bestcomm/sram.h>
  23. #include <linux/fsl/bestcomm/bestcomm_priv.h>
  24. #include "linux/fsl/bestcomm/bestcomm.h"
  25. #define DRIVER_NAME "bestcomm-core"
  26. /* MPC5200 device tree match tables */
  27. static const struct of_device_id mpc52xx_sram_ids[] = {
  28. { .compatible = "fsl,mpc5200-sram", },
  29. { .compatible = "mpc5200-sram", },
  30. {}
  31. };
  32. struct bcom_engine *bcom_eng = NULL;
  33. EXPORT_SYMBOL_GPL(bcom_eng); /* needed for inline functions */
  34. /* ======================================================================== */
  35. /* Public and private API */
  36. /* ======================================================================== */
  37. /* Private API */
  38. struct bcom_task *
  39. bcom_task_alloc(int bd_count, int bd_size, int priv_size)
  40. {
  41. int i, tasknum = -1;
  42. struct bcom_task *tsk;
  43. /* Don't try to do anything if bestcomm init failed */
  44. if (!bcom_eng)
  45. return NULL;
  46. /* Get and reserve a task num */
  47. spin_lock(&bcom_eng->lock);
  48. for (i=0; i<BCOM_MAX_TASKS; i++)
  49. if (!bcom_eng->tdt[i].stop) { /* we use stop as a marker */
  50. bcom_eng->tdt[i].stop = 0xfffffffful; /* dummy addr */
  51. tasknum = i;
  52. break;
  53. }
  54. spin_unlock(&bcom_eng->lock);
  55. if (tasknum < 0)
  56. return NULL;
  57. /* Allocate our structure */
  58. tsk = kzalloc(sizeof(struct bcom_task) + priv_size, GFP_KERNEL);
  59. if (!tsk)
  60. goto error;
  61. tsk->tasknum = tasknum;
  62. if (priv_size)
  63. tsk->priv = (void*)tsk + sizeof(struct bcom_task);
  64. /* Get IRQ of that task */
  65. tsk->irq = irq_of_parse_and_map(bcom_eng->ofnode, tsk->tasknum);
  66. if (!tsk->irq)
  67. goto error;
  68. /* Init the BDs, if needed */
  69. if (bd_count) {
  70. tsk->cookie = kmalloc_array(bd_count, sizeof(void *),
  71. GFP_KERNEL);
  72. if (!tsk->cookie)
  73. goto error;
  74. tsk->bd = bcom_sram_alloc(bd_count * bd_size, 4, &tsk->bd_pa);
  75. if (!tsk->bd)
  76. goto error;
  77. memset_io(tsk->bd, 0x00, bd_count * bd_size);
  78. tsk->num_bd = bd_count;
  79. tsk->bd_size = bd_size;
  80. }
  81. return tsk;
  82. error:
  83. if (tsk) {
  84. if (tsk->irq)
  85. irq_dispose_mapping(tsk->irq);
  86. bcom_sram_free(tsk->bd);
  87. kfree(tsk->cookie);
  88. kfree(tsk);
  89. }
  90. bcom_eng->tdt[tasknum].stop = 0;
  91. return NULL;
  92. }
  93. EXPORT_SYMBOL_GPL(bcom_task_alloc);
  94. void
  95. bcom_task_free(struct bcom_task *tsk)
  96. {
  97. /* Stop the task */
  98. bcom_disable_task(tsk->tasknum);
  99. /* Clear TDT */
  100. bcom_eng->tdt[tsk->tasknum].start = 0;
  101. bcom_eng->tdt[tsk->tasknum].stop = 0;
  102. /* Free everything */
  103. irq_dispose_mapping(tsk->irq);
  104. bcom_sram_free(tsk->bd);
  105. kfree(tsk->cookie);
  106. kfree(tsk);
  107. }
  108. EXPORT_SYMBOL_GPL(bcom_task_free);
  109. int
  110. bcom_load_image(int task, u32 *task_image)
  111. {
  112. struct bcom_task_header *hdr = (struct bcom_task_header *)task_image;
  113. struct bcom_tdt *tdt;
  114. u32 *desc, *var, *inc;
  115. u32 *desc_src, *var_src, *inc_src;
  116. /* Safety checks */
  117. if (hdr->magic != BCOM_TASK_MAGIC) {
  118. printk(KERN_ERR DRIVER_NAME
  119. ": Trying to load invalid microcode\n");
  120. return -EINVAL;
  121. }
  122. if ((task < 0) || (task >= BCOM_MAX_TASKS)) {
  123. printk(KERN_ERR DRIVER_NAME
  124. ": Trying to load invalid task %d\n", task);
  125. return -EINVAL;
  126. }
  127. /* Initial load or reload */
  128. tdt = &bcom_eng->tdt[task];
  129. if (tdt->start) {
  130. desc = bcom_task_desc(task);
  131. if (hdr->desc_size != bcom_task_num_descs(task)) {
  132. printk(KERN_ERR DRIVER_NAME
  133. ": Trying to reload wrong task image "
  134. "(%d size %d/%d)!\n",
  135. task,
  136. hdr->desc_size,
  137. bcom_task_num_descs(task));
  138. return -EINVAL;
  139. }
  140. } else {
  141. phys_addr_t start_pa;
  142. desc = bcom_sram_alloc(hdr->desc_size * sizeof(u32), 4, &start_pa);
  143. if (!desc)
  144. return -ENOMEM;
  145. tdt->start = start_pa;
  146. tdt->stop = start_pa + ((hdr->desc_size-1) * sizeof(u32));
  147. }
  148. var = bcom_task_var(task);
  149. inc = bcom_task_inc(task);
  150. /* Clear & copy */
  151. memset_io(var, 0x00, BCOM_VAR_SIZE);
  152. memset_io(inc, 0x00, BCOM_INC_SIZE);
  153. desc_src = (u32 *)(hdr + 1);
  154. var_src = desc_src + hdr->desc_size;
  155. inc_src = var_src + hdr->var_size;
  156. memcpy_toio(desc, desc_src, hdr->desc_size * sizeof(u32));
  157. memcpy_toio(var + hdr->first_var, var_src, hdr->var_size * sizeof(u32));
  158. memcpy_toio(inc, inc_src, hdr->inc_size * sizeof(u32));
  159. return 0;
  160. }
  161. EXPORT_SYMBOL_GPL(bcom_load_image);
  162. void
  163. bcom_set_initiator(int task, int initiator)
  164. {
  165. int i;
  166. int num_descs;
  167. u32 *desc;
  168. int next_drd_has_initiator;
  169. bcom_set_tcr_initiator(task, initiator);
  170. /* Just setting tcr is apparently not enough due to some problem */
  171. /* with it. So we just go thru all the microcode and replace in */
  172. /* the DRD directly */
  173. desc = bcom_task_desc(task);
  174. next_drd_has_initiator = 1;
  175. num_descs = bcom_task_num_descs(task);
  176. for (i=0; i<num_descs; i++, desc++) {
  177. if (!bcom_desc_is_drd(*desc))
  178. continue;
  179. if (next_drd_has_initiator)
  180. if (bcom_desc_initiator(*desc) != BCOM_INITIATOR_ALWAYS)
  181. bcom_set_desc_initiator(desc, initiator);
  182. next_drd_has_initiator = !bcom_drd_is_extended(*desc);
  183. }
  184. }
  185. EXPORT_SYMBOL_GPL(bcom_set_initiator);
  186. /* Public API */
  187. void
  188. bcom_enable(struct bcom_task *tsk)
  189. {
  190. bcom_enable_task(tsk->tasknum);
  191. }
  192. EXPORT_SYMBOL_GPL(bcom_enable);
  193. void
  194. bcom_disable(struct bcom_task *tsk)
  195. {
  196. bcom_disable_task(tsk->tasknum);
  197. }
  198. EXPORT_SYMBOL_GPL(bcom_disable);
  199. /* ======================================================================== */
  200. /* Engine init/cleanup */
  201. /* ======================================================================== */
  202. /* Function Descriptor table */
  203. /* this will need to be updated if Freescale changes their task code FDT */
  204. static u32 fdt_ops[] = {
  205. 0xa0045670, /* FDT[48] - load_acc() */
  206. 0x80045670, /* FDT[49] - unload_acc() */
  207. 0x21800000, /* FDT[50] - and() */
  208. 0x21e00000, /* FDT[51] - or() */
  209. 0x21500000, /* FDT[52] - xor() */
  210. 0x21400000, /* FDT[53] - andn() */
  211. 0x21500000, /* FDT[54] - not() */
  212. 0x20400000, /* FDT[55] - add() */
  213. 0x20500000, /* FDT[56] - sub() */
  214. 0x20800000, /* FDT[57] - lsh() */
  215. 0x20a00000, /* FDT[58] - rsh() */
  216. 0xc0170000, /* FDT[59] - crc8() */
  217. 0xc0145670, /* FDT[60] - crc16() */
  218. 0xc0345670, /* FDT[61] - crc32() */
  219. 0xa0076540, /* FDT[62] - endian32() */
  220. 0xa0000760, /* FDT[63] - endian16() */
  221. };
  222. static int bcom_engine_init(void)
  223. {
  224. int task;
  225. phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa;
  226. unsigned int tdt_size, ctx_size, var_size, fdt_size;
  227. /* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/incs */
  228. tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt);
  229. ctx_size = BCOM_MAX_TASKS * BCOM_CTX_SIZE;
  230. var_size = BCOM_MAX_TASKS * (BCOM_VAR_SIZE + BCOM_INC_SIZE);
  231. fdt_size = BCOM_FDT_SIZE;
  232. bcom_eng->tdt = bcom_sram_alloc(tdt_size, sizeof(u32), &tdt_pa);
  233. bcom_eng->ctx = bcom_sram_alloc(ctx_size, BCOM_CTX_ALIGN, &ctx_pa);
  234. bcom_eng->var = bcom_sram_alloc(var_size, BCOM_VAR_ALIGN, &var_pa);
  235. bcom_eng->fdt = bcom_sram_alloc(fdt_size, BCOM_FDT_ALIGN, &fdt_pa);
  236. if (!bcom_eng->tdt || !bcom_eng->ctx || !bcom_eng->var || !bcom_eng->fdt) {
  237. printk(KERN_ERR "DMA: SRAM alloc failed in engine init !\n");
  238. bcom_sram_free(bcom_eng->tdt);
  239. bcom_sram_free(bcom_eng->ctx);
  240. bcom_sram_free(bcom_eng->var);
  241. bcom_sram_free(bcom_eng->fdt);
  242. return -ENOMEM;
  243. }
  244. memset_io(bcom_eng->tdt, 0x00, tdt_size);
  245. memset_io(bcom_eng->ctx, 0x00, ctx_size);
  246. memset_io(bcom_eng->var, 0x00, var_size);
  247. memset_io(bcom_eng->fdt, 0x00, fdt_size);
  248. /* Copy the FDT for the EU#3 */
  249. memcpy_toio(&bcom_eng->fdt[48], fdt_ops, sizeof(fdt_ops));
  250. /* Initialize Task base structure */
  251. for (task=0; task<BCOM_MAX_TASKS; task++)
  252. {
  253. out_be16(&bcom_eng->regs->tcr[task], 0);
  254. out_8(&bcom_eng->regs->ipr[task], 0);
  255. bcom_eng->tdt[task].context = ctx_pa;
  256. bcom_eng->tdt[task].var = var_pa;
  257. bcom_eng->tdt[task].fdt = fdt_pa;
  258. var_pa += BCOM_VAR_SIZE + BCOM_INC_SIZE;
  259. ctx_pa += BCOM_CTX_SIZE;
  260. }
  261. out_be32(&bcom_eng->regs->taskBar, tdt_pa);
  262. /* Init 'always' initiator */
  263. out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
  264. /* Disable COMM Bus Prefetch on the original 5200; it's broken */
  265. if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR)
  266. bcom_disable_prefetch();
  267. /* Init lock */
  268. spin_lock_init(&bcom_eng->lock);
  269. return 0;
  270. }
  271. static void
  272. bcom_engine_cleanup(void)
  273. {
  274. int task;
  275. /* Stop all tasks */
  276. for (task=0; task<BCOM_MAX_TASKS; task++)
  277. {
  278. out_be16(&bcom_eng->regs->tcr[task], 0);
  279. out_8(&bcom_eng->regs->ipr[task], 0);
  280. }
  281. out_be32(&bcom_eng->regs->taskBar, 0ul);
  282. /* Release the SRAM zones */
  283. bcom_sram_free(bcom_eng->tdt);
  284. bcom_sram_free(bcom_eng->ctx);
  285. bcom_sram_free(bcom_eng->var);
  286. bcom_sram_free(bcom_eng->fdt);
  287. }
  288. /* ======================================================================== */
  289. /* OF platform driver */
  290. /* ======================================================================== */
  291. static int mpc52xx_bcom_probe(struct platform_device *op)
  292. {
  293. struct device_node *ofn_sram;
  294. struct resource res_bcom;
  295. int rv;
  296. /* Inform user we're ok so far */
  297. printk(KERN_INFO "DMA: MPC52xx BestComm driver\n");
  298. /* Get the bestcomm node */
  299. of_node_get(op->dev.of_node);
  300. /* Prepare SRAM */
  301. ofn_sram = of_find_matching_node(NULL, mpc52xx_sram_ids);
  302. if (!ofn_sram) {
  303. printk(KERN_ERR DRIVER_NAME ": "
  304. "No SRAM found in device tree\n");
  305. rv = -ENODEV;
  306. goto error_ofput;
  307. }
  308. rv = bcom_sram_init(ofn_sram, DRIVER_NAME);
  309. of_node_put(ofn_sram);
  310. if (rv) {
  311. printk(KERN_ERR DRIVER_NAME ": "
  312. "Error in SRAM init\n");
  313. goto error_ofput;
  314. }
  315. /* Get a clean struct */
  316. bcom_eng = kzalloc(sizeof(struct bcom_engine), GFP_KERNEL);
  317. if (!bcom_eng) {
  318. rv = -ENOMEM;
  319. goto error_sramclean;
  320. }
  321. /* Save the node */
  322. bcom_eng->ofnode = op->dev.of_node;
  323. /* Get, reserve & map io */
  324. if (of_address_to_resource(op->dev.of_node, 0, &res_bcom)) {
  325. printk(KERN_ERR DRIVER_NAME ": "
  326. "Can't get resource\n");
  327. rv = -EINVAL;
  328. goto error_sramclean;
  329. }
  330. if (!request_mem_region(res_bcom.start, resource_size(&res_bcom),
  331. DRIVER_NAME)) {
  332. printk(KERN_ERR DRIVER_NAME ": "
  333. "Can't request registers region\n");
  334. rv = -EBUSY;
  335. goto error_sramclean;
  336. }
  337. bcom_eng->regs_base = res_bcom.start;
  338. bcom_eng->regs = ioremap(res_bcom.start, sizeof(struct mpc52xx_sdma));
  339. if (!bcom_eng->regs) {
  340. printk(KERN_ERR DRIVER_NAME ": "
  341. "Can't map registers\n");
  342. rv = -ENOMEM;
  343. goto error_release;
  344. }
  345. /* Now, do the real init */
  346. rv = bcom_engine_init();
  347. if (rv)
  348. goto error_unmap;
  349. /* Done ! */
  350. printk(KERN_INFO "DMA: MPC52xx BestComm engine @%08lx ok !\n",
  351. (long)bcom_eng->regs_base);
  352. return 0;
  353. /* Error path */
  354. error_unmap:
  355. iounmap(bcom_eng->regs);
  356. error_release:
  357. release_mem_region(res_bcom.start, sizeof(struct mpc52xx_sdma));
  358. error_sramclean:
  359. kfree(bcom_eng);
  360. bcom_sram_cleanup();
  361. error_ofput:
  362. of_node_put(op->dev.of_node);
  363. printk(KERN_ERR "DMA: MPC52xx BestComm init failed !\n");
  364. return rv;
  365. }
  366. static int mpc52xx_bcom_remove(struct platform_device *op)
  367. {
  368. /* Clean up the engine */
  369. bcom_engine_cleanup();
  370. /* Cleanup SRAM */
  371. bcom_sram_cleanup();
  372. /* Release regs */
  373. iounmap(bcom_eng->regs);
  374. release_mem_region(bcom_eng->regs_base, sizeof(struct mpc52xx_sdma));
  375. /* Release the node */
  376. of_node_put(bcom_eng->ofnode);
  377. /* Release memory */
  378. kfree(bcom_eng);
  379. bcom_eng = NULL;
  380. return 0;
  381. }
  382. static const struct of_device_id mpc52xx_bcom_of_match[] = {
  383. { .compatible = "fsl,mpc5200-bestcomm", },
  384. { .compatible = "mpc5200-bestcomm", },
  385. {},
  386. };
  387. MODULE_DEVICE_TABLE(of, mpc52xx_bcom_of_match);
  388. static struct platform_driver mpc52xx_bcom_of_platform_driver = {
  389. .probe = mpc52xx_bcom_probe,
  390. .remove = mpc52xx_bcom_remove,
  391. .driver = {
  392. .name = DRIVER_NAME,
  393. .of_match_table = mpc52xx_bcom_of_match,
  394. },
  395. };
  396. /* ======================================================================== */
  397. /* Module */
  398. /* ======================================================================== */
  399. static int __init
  400. mpc52xx_bcom_init(void)
  401. {
  402. return platform_driver_register(&mpc52xx_bcom_of_platform_driver);
  403. }
  404. static void __exit
  405. mpc52xx_bcom_exit(void)
  406. {
  407. platform_driver_unregister(&mpc52xx_bcom_of_platform_driver);
  408. }
  409. /* If we're not a module, we must make sure everything is setup before */
  410. /* anyone tries to use us ... that's why we use subsys_initcall instead */
  411. /* of module_init. */
  412. subsys_initcall(mpc52xx_bcom_init);
  413. module_exit(mpc52xx_bcom_exit);
  414. MODULE_DESCRIPTION("Freescale MPC52xx BestComm DMA");
  415. MODULE_AUTHOR("Sylvain Munaut <[email protected]>");
  416. MODULE_AUTHOR("Andrey Volkov <[email protected]>");
  417. MODULE_AUTHOR("Dale Farnsworth <[email protected]>");
  418. MODULE_LICENSE("GPL v2");