pmem.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright(c) 2021 Intel Corporation. All rights reserved. */
  3. #include <linux/libnvdimm.h>
  4. #include <asm/unaligned.h>
  5. #include <linux/device.h>
  6. #include <linux/module.h>
  7. #include <linux/ndctl.h>
  8. #include <linux/async.h>
  9. #include <linux/slab.h>
  10. #include <linux/nd.h>
  11. #include "cxlmem.h"
  12. #include "cxl.h"
  13. /*
  14. * Ordered workqueue for cxl nvdimm device arrival and departure
  15. * to coordinate bus rescans when a bridge arrives and trigger remove
  16. * operations when the bridge is removed.
  17. */
  18. static struct workqueue_struct *cxl_pmem_wq;
  19. static __read_mostly DECLARE_BITMAP(exclusive_cmds, CXL_MEM_COMMAND_ID_MAX);
  20. static void clear_exclusive(void *cxlds)
  21. {
  22. clear_exclusive_cxl_commands(cxlds, exclusive_cmds);
  23. }
  24. static void unregister_nvdimm(void *nvdimm)
  25. {
  26. struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
  27. struct cxl_nvdimm_bridge *cxl_nvb = cxl_nvd->bridge;
  28. struct cxl_pmem_region *cxlr_pmem;
  29. unsigned long index;
  30. device_lock(&cxl_nvb->dev);
  31. dev_set_drvdata(&cxl_nvd->dev, NULL);
  32. xa_for_each(&cxl_nvd->pmem_regions, index, cxlr_pmem) {
  33. get_device(&cxlr_pmem->dev);
  34. device_unlock(&cxl_nvb->dev);
  35. device_release_driver(&cxlr_pmem->dev);
  36. put_device(&cxlr_pmem->dev);
  37. device_lock(&cxl_nvb->dev);
  38. }
  39. device_unlock(&cxl_nvb->dev);
  40. nvdimm_delete(nvdimm);
  41. cxl_nvd->bridge = NULL;
  42. }
  43. static int cxl_nvdimm_probe(struct device *dev)
  44. {
  45. struct cxl_nvdimm *cxl_nvd = to_cxl_nvdimm(dev);
  46. struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
  47. unsigned long flags = 0, cmd_mask = 0;
  48. struct cxl_dev_state *cxlds = cxlmd->cxlds;
  49. struct cxl_nvdimm_bridge *cxl_nvb;
  50. struct nvdimm *nvdimm;
  51. int rc;
  52. cxl_nvb = cxl_find_nvdimm_bridge(dev);
  53. if (!cxl_nvb)
  54. return -ENXIO;
  55. device_lock(&cxl_nvb->dev);
  56. if (!cxl_nvb->nvdimm_bus) {
  57. rc = -ENXIO;
  58. goto out;
  59. }
  60. set_exclusive_cxl_commands(cxlds, exclusive_cmds);
  61. rc = devm_add_action_or_reset(dev, clear_exclusive, cxlds);
  62. if (rc)
  63. goto out;
  64. set_bit(NDD_LABELING, &flags);
  65. set_bit(NDD_REGISTER_SYNC, &flags);
  66. set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask);
  67. set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask);
  68. set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask);
  69. nvdimm = nvdimm_create(cxl_nvb->nvdimm_bus, cxl_nvd, NULL, flags,
  70. cmd_mask, 0, NULL);
  71. if (!nvdimm) {
  72. rc = -ENOMEM;
  73. goto out;
  74. }
  75. dev_set_drvdata(dev, nvdimm);
  76. cxl_nvd->bridge = cxl_nvb;
  77. rc = devm_add_action_or_reset(dev, unregister_nvdimm, nvdimm);
  78. out:
  79. device_unlock(&cxl_nvb->dev);
  80. put_device(&cxl_nvb->dev);
  81. return rc;
  82. }
  83. static struct cxl_driver cxl_nvdimm_driver = {
  84. .name = "cxl_nvdimm",
  85. .probe = cxl_nvdimm_probe,
  86. .id = CXL_DEVICE_NVDIMM,
  87. };
  88. static int cxl_pmem_get_config_size(struct cxl_dev_state *cxlds,
  89. struct nd_cmd_get_config_size *cmd,
  90. unsigned int buf_len)
  91. {
  92. if (sizeof(*cmd) > buf_len)
  93. return -EINVAL;
  94. *cmd = (struct nd_cmd_get_config_size) {
  95. .config_size = cxlds->lsa_size,
  96. .max_xfer = cxlds->payload_size - sizeof(struct cxl_mbox_set_lsa),
  97. };
  98. return 0;
  99. }
  100. static int cxl_pmem_get_config_data(struct cxl_dev_state *cxlds,
  101. struct nd_cmd_get_config_data_hdr *cmd,
  102. unsigned int buf_len)
  103. {
  104. struct cxl_mbox_get_lsa get_lsa;
  105. int rc;
  106. if (sizeof(*cmd) > buf_len)
  107. return -EINVAL;
  108. if (struct_size(cmd, out_buf, cmd->in_length) > buf_len)
  109. return -EINVAL;
  110. get_lsa = (struct cxl_mbox_get_lsa) {
  111. .offset = cpu_to_le32(cmd->in_offset),
  112. .length = cpu_to_le32(cmd->in_length),
  113. };
  114. rc = cxl_mbox_send_cmd(cxlds, CXL_MBOX_OP_GET_LSA, &get_lsa,
  115. sizeof(get_lsa), cmd->out_buf, cmd->in_length);
  116. cmd->status = 0;
  117. return rc;
  118. }
  119. static int cxl_pmem_set_config_data(struct cxl_dev_state *cxlds,
  120. struct nd_cmd_set_config_hdr *cmd,
  121. unsigned int buf_len)
  122. {
  123. struct cxl_mbox_set_lsa *set_lsa;
  124. int rc;
  125. if (sizeof(*cmd) > buf_len)
  126. return -EINVAL;
  127. /* 4-byte status follows the input data in the payload */
  128. if (size_add(struct_size(cmd, in_buf, cmd->in_length), 4) > buf_len)
  129. return -EINVAL;
  130. set_lsa =
  131. kvzalloc(struct_size(set_lsa, data, cmd->in_length), GFP_KERNEL);
  132. if (!set_lsa)
  133. return -ENOMEM;
  134. *set_lsa = (struct cxl_mbox_set_lsa) {
  135. .offset = cpu_to_le32(cmd->in_offset),
  136. };
  137. memcpy(set_lsa->data, cmd->in_buf, cmd->in_length);
  138. rc = cxl_mbox_send_cmd(cxlds, CXL_MBOX_OP_SET_LSA, set_lsa,
  139. struct_size(set_lsa, data, cmd->in_length),
  140. NULL, 0);
  141. /*
  142. * Set "firmware" status (4-packed bytes at the end of the input
  143. * payload.
  144. */
  145. put_unaligned(0, (u32 *) &cmd->in_buf[cmd->in_length]);
  146. kvfree(set_lsa);
  147. return rc;
  148. }
  149. static int cxl_pmem_nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd,
  150. void *buf, unsigned int buf_len)
  151. {
  152. struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
  153. unsigned long cmd_mask = nvdimm_cmd_mask(nvdimm);
  154. struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
  155. struct cxl_dev_state *cxlds = cxlmd->cxlds;
  156. if (!test_bit(cmd, &cmd_mask))
  157. return -ENOTTY;
  158. switch (cmd) {
  159. case ND_CMD_GET_CONFIG_SIZE:
  160. return cxl_pmem_get_config_size(cxlds, buf, buf_len);
  161. case ND_CMD_GET_CONFIG_DATA:
  162. return cxl_pmem_get_config_data(cxlds, buf, buf_len);
  163. case ND_CMD_SET_CONFIG_DATA:
  164. return cxl_pmem_set_config_data(cxlds, buf, buf_len);
  165. default:
  166. return -ENOTTY;
  167. }
  168. }
  169. static int cxl_pmem_ctl(struct nvdimm_bus_descriptor *nd_desc,
  170. struct nvdimm *nvdimm, unsigned int cmd, void *buf,
  171. unsigned int buf_len, int *cmd_rc)
  172. {
  173. /*
  174. * No firmware response to translate, let the transport error
  175. * code take precedence.
  176. */
  177. *cmd_rc = 0;
  178. if (!nvdimm)
  179. return -ENOTTY;
  180. return cxl_pmem_nvdimm_ctl(nvdimm, cmd, buf, buf_len);
  181. }
  182. static bool online_nvdimm_bus(struct cxl_nvdimm_bridge *cxl_nvb)
  183. {
  184. if (cxl_nvb->nvdimm_bus)
  185. return true;
  186. cxl_nvb->nvdimm_bus =
  187. nvdimm_bus_register(&cxl_nvb->dev, &cxl_nvb->nd_desc);
  188. return cxl_nvb->nvdimm_bus != NULL;
  189. }
  190. static int cxl_nvdimm_release_driver(struct device *dev, void *cxl_nvb)
  191. {
  192. struct cxl_nvdimm *cxl_nvd;
  193. if (!is_cxl_nvdimm(dev))
  194. return 0;
  195. cxl_nvd = to_cxl_nvdimm(dev);
  196. if (cxl_nvd->bridge != cxl_nvb)
  197. return 0;
  198. device_release_driver(dev);
  199. return 0;
  200. }
  201. static int cxl_pmem_region_release_driver(struct device *dev, void *cxl_nvb)
  202. {
  203. struct cxl_pmem_region *cxlr_pmem;
  204. if (!is_cxl_pmem_region(dev))
  205. return 0;
  206. cxlr_pmem = to_cxl_pmem_region(dev);
  207. if (cxlr_pmem->bridge != cxl_nvb)
  208. return 0;
  209. device_release_driver(dev);
  210. return 0;
  211. }
  212. static void offline_nvdimm_bus(struct cxl_nvdimm_bridge *cxl_nvb,
  213. struct nvdimm_bus *nvdimm_bus)
  214. {
  215. if (!nvdimm_bus)
  216. return;
  217. /*
  218. * Set the state of cxl_nvdimm devices to unbound / idle before
  219. * nvdimm_bus_unregister() rips the nvdimm objects out from
  220. * underneath them.
  221. */
  222. bus_for_each_dev(&cxl_bus_type, NULL, cxl_nvb,
  223. cxl_pmem_region_release_driver);
  224. bus_for_each_dev(&cxl_bus_type, NULL, cxl_nvb,
  225. cxl_nvdimm_release_driver);
  226. nvdimm_bus_unregister(nvdimm_bus);
  227. }
  228. static void cxl_nvb_update_state(struct work_struct *work)
  229. {
  230. struct cxl_nvdimm_bridge *cxl_nvb =
  231. container_of(work, typeof(*cxl_nvb), state_work);
  232. struct nvdimm_bus *victim_bus = NULL;
  233. bool release = false, rescan = false;
  234. device_lock(&cxl_nvb->dev);
  235. switch (cxl_nvb->state) {
  236. case CXL_NVB_ONLINE:
  237. if (!online_nvdimm_bus(cxl_nvb)) {
  238. dev_err(&cxl_nvb->dev,
  239. "failed to establish nvdimm bus\n");
  240. release = true;
  241. } else
  242. rescan = true;
  243. break;
  244. case CXL_NVB_OFFLINE:
  245. case CXL_NVB_DEAD:
  246. victim_bus = cxl_nvb->nvdimm_bus;
  247. cxl_nvb->nvdimm_bus = NULL;
  248. break;
  249. default:
  250. break;
  251. }
  252. device_unlock(&cxl_nvb->dev);
  253. if (release)
  254. device_release_driver(&cxl_nvb->dev);
  255. if (rescan) {
  256. int rc = bus_rescan_devices(&cxl_bus_type);
  257. dev_dbg(&cxl_nvb->dev, "rescan: %d\n", rc);
  258. }
  259. offline_nvdimm_bus(cxl_nvb, victim_bus);
  260. put_device(&cxl_nvb->dev);
  261. }
  262. static void cxl_nvdimm_bridge_state_work(struct cxl_nvdimm_bridge *cxl_nvb)
  263. {
  264. /*
  265. * Take a reference that the workqueue will drop if new work
  266. * gets queued.
  267. */
  268. get_device(&cxl_nvb->dev);
  269. if (!queue_work(cxl_pmem_wq, &cxl_nvb->state_work))
  270. put_device(&cxl_nvb->dev);
  271. }
  272. static void cxl_nvdimm_bridge_remove(struct device *dev)
  273. {
  274. struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
  275. if (cxl_nvb->state == CXL_NVB_ONLINE)
  276. cxl_nvb->state = CXL_NVB_OFFLINE;
  277. cxl_nvdimm_bridge_state_work(cxl_nvb);
  278. }
  279. static int cxl_nvdimm_bridge_probe(struct device *dev)
  280. {
  281. struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
  282. if (cxl_nvb->state == CXL_NVB_DEAD)
  283. return -ENXIO;
  284. if (cxl_nvb->state == CXL_NVB_NEW) {
  285. cxl_nvb->nd_desc = (struct nvdimm_bus_descriptor) {
  286. .provider_name = "CXL",
  287. .module = THIS_MODULE,
  288. .ndctl = cxl_pmem_ctl,
  289. };
  290. INIT_WORK(&cxl_nvb->state_work, cxl_nvb_update_state);
  291. }
  292. cxl_nvb->state = CXL_NVB_ONLINE;
  293. cxl_nvdimm_bridge_state_work(cxl_nvb);
  294. return 0;
  295. }
  296. static struct cxl_driver cxl_nvdimm_bridge_driver = {
  297. .name = "cxl_nvdimm_bridge",
  298. .probe = cxl_nvdimm_bridge_probe,
  299. .remove = cxl_nvdimm_bridge_remove,
  300. .id = CXL_DEVICE_NVDIMM_BRIDGE,
  301. };
  302. static int match_cxl_nvdimm(struct device *dev, void *data)
  303. {
  304. return is_cxl_nvdimm(dev);
  305. }
  306. static void unregister_nvdimm_region(void *nd_region)
  307. {
  308. nvdimm_region_delete(nd_region);
  309. }
  310. static int cxl_nvdimm_add_region(struct cxl_nvdimm *cxl_nvd,
  311. struct cxl_pmem_region *cxlr_pmem)
  312. {
  313. int rc;
  314. rc = xa_insert(&cxl_nvd->pmem_regions, (unsigned long)cxlr_pmem,
  315. cxlr_pmem, GFP_KERNEL);
  316. if (rc)
  317. return rc;
  318. get_device(&cxlr_pmem->dev);
  319. return 0;
  320. }
  321. static void cxl_nvdimm_del_region(struct cxl_nvdimm *cxl_nvd,
  322. struct cxl_pmem_region *cxlr_pmem)
  323. {
  324. /*
  325. * It is possible this is called without a corresponding
  326. * cxl_nvdimm_add_region for @cxlr_pmem
  327. */
  328. cxlr_pmem = xa_erase(&cxl_nvd->pmem_regions, (unsigned long)cxlr_pmem);
  329. if (cxlr_pmem)
  330. put_device(&cxlr_pmem->dev);
  331. }
  332. static void release_mappings(void *data)
  333. {
  334. int i;
  335. struct cxl_pmem_region *cxlr_pmem = data;
  336. struct cxl_nvdimm_bridge *cxl_nvb = cxlr_pmem->bridge;
  337. device_lock(&cxl_nvb->dev);
  338. for (i = 0; i < cxlr_pmem->nr_mappings; i++) {
  339. struct cxl_pmem_region_mapping *m = &cxlr_pmem->mapping[i];
  340. struct cxl_nvdimm *cxl_nvd = m->cxl_nvd;
  341. cxl_nvdimm_del_region(cxl_nvd, cxlr_pmem);
  342. }
  343. device_unlock(&cxl_nvb->dev);
  344. }
  345. static void cxlr_pmem_remove_resource(void *res)
  346. {
  347. remove_resource(res);
  348. }
  349. struct cxl_pmem_region_info {
  350. u64 offset;
  351. u64 serial;
  352. };
  353. static int cxl_pmem_region_probe(struct device *dev)
  354. {
  355. struct nd_mapping_desc mappings[CXL_DECODER_MAX_INTERLEAVE];
  356. struct cxl_pmem_region *cxlr_pmem = to_cxl_pmem_region(dev);
  357. struct cxl_region *cxlr = cxlr_pmem->cxlr;
  358. struct cxl_pmem_region_info *info = NULL;
  359. struct cxl_nvdimm_bridge *cxl_nvb;
  360. struct nd_interleave_set *nd_set;
  361. struct nd_region_desc ndr_desc;
  362. struct cxl_nvdimm *cxl_nvd;
  363. struct nvdimm *nvdimm;
  364. struct resource *res;
  365. int rc, i = 0;
  366. cxl_nvb = cxl_find_nvdimm_bridge(&cxlr_pmem->mapping[0].cxlmd->dev);
  367. if (!cxl_nvb) {
  368. dev_dbg(dev, "bridge not found\n");
  369. return -ENXIO;
  370. }
  371. cxlr_pmem->bridge = cxl_nvb;
  372. device_lock(&cxl_nvb->dev);
  373. if (!cxl_nvb->nvdimm_bus) {
  374. dev_dbg(dev, "nvdimm bus not found\n");
  375. rc = -ENXIO;
  376. goto out_nvb;
  377. }
  378. memset(&mappings, 0, sizeof(mappings));
  379. memset(&ndr_desc, 0, sizeof(ndr_desc));
  380. res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL);
  381. if (!res) {
  382. rc = -ENOMEM;
  383. goto out_nvb;
  384. }
  385. res->name = "Persistent Memory";
  386. res->start = cxlr_pmem->hpa_range.start;
  387. res->end = cxlr_pmem->hpa_range.end;
  388. res->flags = IORESOURCE_MEM;
  389. res->desc = IORES_DESC_PERSISTENT_MEMORY;
  390. rc = insert_resource(&iomem_resource, res);
  391. if (rc)
  392. goto out_nvb;
  393. rc = devm_add_action_or_reset(dev, cxlr_pmem_remove_resource, res);
  394. if (rc)
  395. goto out_nvb;
  396. ndr_desc.res = res;
  397. ndr_desc.provider_data = cxlr_pmem;
  398. ndr_desc.numa_node = memory_add_physaddr_to_nid(res->start);
  399. ndr_desc.target_node = phys_to_target_node(res->start);
  400. if (ndr_desc.target_node == NUMA_NO_NODE) {
  401. ndr_desc.target_node = ndr_desc.numa_node;
  402. dev_dbg(&cxlr->dev, "changing target node from %d to %d",
  403. NUMA_NO_NODE, ndr_desc.target_node);
  404. }
  405. nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
  406. if (!nd_set) {
  407. rc = -ENOMEM;
  408. goto out_nvb;
  409. }
  410. ndr_desc.memregion = cxlr->id;
  411. set_bit(ND_REGION_CXL, &ndr_desc.flags);
  412. set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc.flags);
  413. info = kmalloc_array(cxlr_pmem->nr_mappings, sizeof(*info), GFP_KERNEL);
  414. if (!info) {
  415. rc = -ENOMEM;
  416. goto out_nvb;
  417. }
  418. rc = devm_add_action_or_reset(dev, release_mappings, cxlr_pmem);
  419. if (rc)
  420. goto out_nvd;
  421. for (i = 0; i < cxlr_pmem->nr_mappings; i++) {
  422. struct cxl_pmem_region_mapping *m = &cxlr_pmem->mapping[i];
  423. struct cxl_memdev *cxlmd = m->cxlmd;
  424. struct cxl_dev_state *cxlds = cxlmd->cxlds;
  425. struct device *d;
  426. d = device_find_child(&cxlmd->dev, NULL, match_cxl_nvdimm);
  427. if (!d) {
  428. dev_dbg(dev, "[%d]: %s: no cxl_nvdimm found\n", i,
  429. dev_name(&cxlmd->dev));
  430. rc = -ENODEV;
  431. goto out_nvd;
  432. }
  433. /* safe to drop ref now with bridge lock held */
  434. put_device(d);
  435. cxl_nvd = to_cxl_nvdimm(d);
  436. nvdimm = dev_get_drvdata(&cxl_nvd->dev);
  437. if (!nvdimm) {
  438. dev_dbg(dev, "[%d]: %s: no nvdimm found\n", i,
  439. dev_name(&cxlmd->dev));
  440. rc = -ENODEV;
  441. goto out_nvd;
  442. }
  443. /*
  444. * Pin the region per nvdimm device as those may be released
  445. * out-of-order with respect to the region, and a single nvdimm
  446. * maybe associated with multiple regions
  447. */
  448. rc = cxl_nvdimm_add_region(cxl_nvd, cxlr_pmem);
  449. if (rc)
  450. goto out_nvd;
  451. m->cxl_nvd = cxl_nvd;
  452. mappings[i] = (struct nd_mapping_desc) {
  453. .nvdimm = nvdimm,
  454. .start = m->start,
  455. .size = m->size,
  456. .position = i,
  457. };
  458. info[i].offset = m->start;
  459. info[i].serial = cxlds->serial;
  460. }
  461. ndr_desc.num_mappings = cxlr_pmem->nr_mappings;
  462. ndr_desc.mapping = mappings;
  463. /*
  464. * TODO enable CXL labels which skip the need for 'interleave-set cookie'
  465. */
  466. nd_set->cookie1 =
  467. nd_fletcher64(info, sizeof(*info) * cxlr_pmem->nr_mappings, 0);
  468. nd_set->cookie2 = nd_set->cookie1;
  469. ndr_desc.nd_set = nd_set;
  470. cxlr_pmem->nd_region =
  471. nvdimm_pmem_region_create(cxl_nvb->nvdimm_bus, &ndr_desc);
  472. if (!cxlr_pmem->nd_region) {
  473. rc = -ENOMEM;
  474. goto out_nvd;
  475. }
  476. rc = devm_add_action_or_reset(dev, unregister_nvdimm_region,
  477. cxlr_pmem->nd_region);
  478. out_nvd:
  479. kfree(info);
  480. out_nvb:
  481. device_unlock(&cxl_nvb->dev);
  482. put_device(&cxl_nvb->dev);
  483. return rc;
  484. }
  485. static struct cxl_driver cxl_pmem_region_driver = {
  486. .name = "cxl_pmem_region",
  487. .probe = cxl_pmem_region_probe,
  488. .id = CXL_DEVICE_PMEM_REGION,
  489. };
  490. /*
  491. * Return all bridges to the CXL_NVB_NEW state to invalidate any
  492. * ->state_work referring to the now destroyed cxl_pmem_wq.
  493. */
  494. static int cxl_nvdimm_bridge_reset(struct device *dev, void *data)
  495. {
  496. struct cxl_nvdimm_bridge *cxl_nvb;
  497. if (!is_cxl_nvdimm_bridge(dev))
  498. return 0;
  499. cxl_nvb = to_cxl_nvdimm_bridge(dev);
  500. device_lock(dev);
  501. cxl_nvb->state = CXL_NVB_NEW;
  502. device_unlock(dev);
  503. return 0;
  504. }
  505. static void destroy_cxl_pmem_wq(void)
  506. {
  507. destroy_workqueue(cxl_pmem_wq);
  508. bus_for_each_dev(&cxl_bus_type, NULL, NULL, cxl_nvdimm_bridge_reset);
  509. }
  510. static __init int cxl_pmem_init(void)
  511. {
  512. int rc;
  513. set_bit(CXL_MEM_COMMAND_ID_SET_SHUTDOWN_STATE, exclusive_cmds);
  514. set_bit(CXL_MEM_COMMAND_ID_SET_LSA, exclusive_cmds);
  515. cxl_pmem_wq = alloc_ordered_workqueue("cxl_pmem", 0);
  516. if (!cxl_pmem_wq)
  517. return -ENXIO;
  518. rc = cxl_driver_register(&cxl_nvdimm_bridge_driver);
  519. if (rc)
  520. goto err_bridge;
  521. rc = cxl_driver_register(&cxl_nvdimm_driver);
  522. if (rc)
  523. goto err_nvdimm;
  524. rc = cxl_driver_register(&cxl_pmem_region_driver);
  525. if (rc)
  526. goto err_region;
  527. return 0;
  528. err_region:
  529. cxl_driver_unregister(&cxl_nvdimm_driver);
  530. err_nvdimm:
  531. cxl_driver_unregister(&cxl_nvdimm_bridge_driver);
  532. err_bridge:
  533. destroy_cxl_pmem_wq();
  534. return rc;
  535. }
  536. static __exit void cxl_pmem_exit(void)
  537. {
  538. cxl_driver_unregister(&cxl_pmem_region_driver);
  539. cxl_driver_unregister(&cxl_nvdimm_driver);
  540. cxl_driver_unregister(&cxl_nvdimm_bridge_driver);
  541. destroy_cxl_pmem_wq();
  542. }
  543. MODULE_LICENSE("GPL v2");
  544. module_init(cxl_pmem_init);
  545. module_exit(cxl_pmem_exit);
  546. MODULE_IMPORT_NS(CXL);
  547. MODULE_ALIAS_CXL(CXL_DEVICE_NVDIMM_BRIDGE);
  548. MODULE_ALIAS_CXL(CXL_DEVICE_NVDIMM);
  549. MODULE_ALIAS_CXL(CXL_DEVICE_PMEM_REGION);