timer-stm32-lp.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
  4. * Authors: Benjamin Gaignard <[email protected]> for STMicroelectronics.
  5. * Pascal Paillet <[email protected]> for STMicroelectronics.
  6. */
  7. #include <linux/clk.h>
  8. #include <linux/clockchips.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/mfd/stm32-lptimer.h>
  11. #include <linux/module.h>
  12. #include <linux/of_address.h>
  13. #include <linux/of_irq.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_wakeirq.h>
  16. #define CFGR_PSC_OFFSET 9
  17. #define STM32_LP_RATING 1000
  18. #define STM32_TARGET_CLKRATE (32000 * HZ)
  19. #define STM32_LP_MAX_PSC 7
  20. struct stm32_lp_private {
  21. struct regmap *reg;
  22. struct clock_event_device clkevt;
  23. unsigned long period;
  24. struct device *dev;
  25. };
  26. static struct stm32_lp_private*
  27. to_priv(struct clock_event_device *clkevt)
  28. {
  29. return container_of(clkevt, struct stm32_lp_private, clkevt);
  30. }
  31. static int stm32_clkevent_lp_shutdown(struct clock_event_device *clkevt)
  32. {
  33. struct stm32_lp_private *priv = to_priv(clkevt);
  34. regmap_write(priv->reg, STM32_LPTIM_CR, 0);
  35. regmap_write(priv->reg, STM32_LPTIM_IER, 0);
  36. /* clear pending flags */
  37. regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF);
  38. return 0;
  39. }
  40. static int stm32_clkevent_lp_set_timer(unsigned long evt,
  41. struct clock_event_device *clkevt,
  42. int is_periodic)
  43. {
  44. struct stm32_lp_private *priv = to_priv(clkevt);
  45. /* disable LPTIMER to be able to write into IER register*/
  46. regmap_write(priv->reg, STM32_LPTIM_CR, 0);
  47. /* enable ARR interrupt */
  48. regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE);
  49. /* enable LPTIMER to be able to write into ARR register */
  50. regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE);
  51. /* set next event counter */
  52. regmap_write(priv->reg, STM32_LPTIM_ARR, evt);
  53. /* start counter */
  54. if (is_periodic)
  55. regmap_write(priv->reg, STM32_LPTIM_CR,
  56. STM32_LPTIM_CNTSTRT | STM32_LPTIM_ENABLE);
  57. else
  58. regmap_write(priv->reg, STM32_LPTIM_CR,
  59. STM32_LPTIM_SNGSTRT | STM32_LPTIM_ENABLE);
  60. return 0;
  61. }
  62. static int stm32_clkevent_lp_set_next_event(unsigned long evt,
  63. struct clock_event_device *clkevt)
  64. {
  65. return stm32_clkevent_lp_set_timer(evt, clkevt,
  66. clockevent_state_periodic(clkevt));
  67. }
  68. static int stm32_clkevent_lp_set_periodic(struct clock_event_device *clkevt)
  69. {
  70. struct stm32_lp_private *priv = to_priv(clkevt);
  71. return stm32_clkevent_lp_set_timer(priv->period, clkevt, true);
  72. }
  73. static int stm32_clkevent_lp_set_oneshot(struct clock_event_device *clkevt)
  74. {
  75. struct stm32_lp_private *priv = to_priv(clkevt);
  76. return stm32_clkevent_lp_set_timer(priv->period, clkevt, false);
  77. }
  78. static irqreturn_t stm32_clkevent_lp_irq_handler(int irq, void *dev_id)
  79. {
  80. struct clock_event_device *clkevt = (struct clock_event_device *)dev_id;
  81. struct stm32_lp_private *priv = to_priv(clkevt);
  82. regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF);
  83. if (clkevt->event_handler)
  84. clkevt->event_handler(clkevt);
  85. return IRQ_HANDLED;
  86. }
  87. static void stm32_clkevent_lp_set_prescaler(struct stm32_lp_private *priv,
  88. unsigned long *rate)
  89. {
  90. int i;
  91. for (i = 0; i <= STM32_LP_MAX_PSC; i++) {
  92. if (DIV_ROUND_CLOSEST(*rate, 1 << i) < STM32_TARGET_CLKRATE)
  93. break;
  94. }
  95. regmap_write(priv->reg, STM32_LPTIM_CFGR, i << CFGR_PSC_OFFSET);
  96. /* Adjust rate and period given the prescaler value */
  97. *rate = DIV_ROUND_CLOSEST(*rate, (1 << i));
  98. priv->period = DIV_ROUND_UP(*rate, HZ);
  99. }
  100. static void stm32_clkevent_lp_init(struct stm32_lp_private *priv,
  101. struct device_node *np, unsigned long rate)
  102. {
  103. priv->clkevt.name = np->full_name;
  104. priv->clkevt.cpumask = cpu_possible_mask;
  105. priv->clkevt.features = CLOCK_EVT_FEAT_PERIODIC |
  106. CLOCK_EVT_FEAT_ONESHOT;
  107. priv->clkevt.set_state_shutdown = stm32_clkevent_lp_shutdown;
  108. priv->clkevt.set_state_periodic = stm32_clkevent_lp_set_periodic;
  109. priv->clkevt.set_state_oneshot = stm32_clkevent_lp_set_oneshot;
  110. priv->clkevt.set_next_event = stm32_clkevent_lp_set_next_event;
  111. priv->clkevt.rating = STM32_LP_RATING;
  112. clockevents_config_and_register(&priv->clkevt, rate, 0x1,
  113. STM32_LPTIM_MAX_ARR);
  114. }
  115. static int stm32_clkevent_lp_probe(struct platform_device *pdev)
  116. {
  117. struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent);
  118. struct stm32_lp_private *priv;
  119. unsigned long rate;
  120. int ret, irq;
  121. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  122. if (!priv)
  123. return -ENOMEM;
  124. priv->reg = ddata->regmap;
  125. ret = clk_prepare_enable(ddata->clk);
  126. if (ret)
  127. return -EINVAL;
  128. rate = clk_get_rate(ddata->clk);
  129. if (!rate) {
  130. ret = -EINVAL;
  131. goto out_clk_disable;
  132. }
  133. irq = platform_get_irq(to_platform_device(pdev->dev.parent), 0);
  134. if (irq <= 0) {
  135. ret = irq;
  136. goto out_clk_disable;
  137. }
  138. if (of_property_read_bool(pdev->dev.parent->of_node, "wakeup-source")) {
  139. ret = device_init_wakeup(&pdev->dev, true);
  140. if (ret)
  141. goto out_clk_disable;
  142. ret = dev_pm_set_wake_irq(&pdev->dev, irq);
  143. if (ret)
  144. goto out_clk_disable;
  145. }
  146. ret = devm_request_irq(&pdev->dev, irq, stm32_clkevent_lp_irq_handler,
  147. IRQF_TIMER, pdev->name, &priv->clkevt);
  148. if (ret)
  149. goto out_clk_disable;
  150. stm32_clkevent_lp_set_prescaler(priv, &rate);
  151. stm32_clkevent_lp_init(priv, pdev->dev.parent->of_node, rate);
  152. priv->dev = &pdev->dev;
  153. return 0;
  154. out_clk_disable:
  155. clk_disable_unprepare(ddata->clk);
  156. return ret;
  157. }
  158. static int stm32_clkevent_lp_remove(struct platform_device *pdev)
  159. {
  160. return -EBUSY; /* cannot unregister clockevent */
  161. }
  162. static const struct of_device_id stm32_clkevent_lp_of_match[] = {
  163. { .compatible = "st,stm32-lptimer-timer", },
  164. {},
  165. };
  166. MODULE_DEVICE_TABLE(of, stm32_clkevent_lp_of_match);
  167. static struct platform_driver stm32_clkevent_lp_driver = {
  168. .probe = stm32_clkevent_lp_probe,
  169. .remove = stm32_clkevent_lp_remove,
  170. .driver = {
  171. .name = "stm32-lptimer-timer",
  172. .of_match_table = of_match_ptr(stm32_clkevent_lp_of_match),
  173. },
  174. };
  175. module_platform_driver(stm32_clkevent_lp_driver);
  176. MODULE_ALIAS("platform:stm32-lptimer-timer");
  177. MODULE_DESCRIPTION("STMicroelectronics STM32 clockevent low power driver");
  178. MODULE_LICENSE("GPL v2");