bcm_kona_timer.c 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192
  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (C) 2012 Broadcom Corporation
  3. #include <linux/init.h>
  4. #include <linux/irq.h>
  5. #include <linux/interrupt.h>
  6. #include <linux/jiffies.h>
  7. #include <linux/clockchips.h>
  8. #include <linux/types.h>
  9. #include <linux/clk.h>
  10. #include <linux/io.h>
  11. #include <linux/of.h>
  12. #include <linux/of_address.h>
  13. #include <linux/of_irq.h>
  14. #define KONA_GPTIMER_STCS_OFFSET 0x00000000
  15. #define KONA_GPTIMER_STCLO_OFFSET 0x00000004
  16. #define KONA_GPTIMER_STCHI_OFFSET 0x00000008
  17. #define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
  18. #define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
  19. #define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
  20. struct kona_bcm_timers {
  21. int tmr_irq;
  22. void __iomem *tmr_regs;
  23. };
  24. static struct kona_bcm_timers timers;
  25. static u32 arch_timer_rate;
  26. /*
  27. * We use the peripheral timers for system tick, the cpu global timer for
  28. * profile tick
  29. */
  30. static void kona_timer_disable_and_clear(void __iomem *base)
  31. {
  32. uint32_t reg;
  33. /*
  34. * clear and disable interrupts
  35. * We are using compare/match register 0 for our system interrupts
  36. */
  37. reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
  38. /* Clear compare (0) interrupt */
  39. reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
  40. /* disable compare */
  41. reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
  42. writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
  43. }
  44. static int
  45. kona_timer_get_counter(void __iomem *timer_base, uint32_t *msw, uint32_t *lsw)
  46. {
  47. int loop_limit = 3;
  48. /*
  49. * Read 64-bit free running counter
  50. * 1. Read hi-word
  51. * 2. Read low-word
  52. * 3. Read hi-word again
  53. * 4.1
  54. * if new hi-word is not equal to previously read hi-word, then
  55. * start from #1
  56. * 4.2
  57. * if new hi-word is equal to previously read hi-word then stop.
  58. */
  59. do {
  60. *msw = readl(timer_base + KONA_GPTIMER_STCHI_OFFSET);
  61. *lsw = readl(timer_base + KONA_GPTIMER_STCLO_OFFSET);
  62. if (*msw == readl(timer_base + KONA_GPTIMER_STCHI_OFFSET))
  63. break;
  64. } while (--loop_limit);
  65. if (!loop_limit) {
  66. pr_err("bcm_kona_timer: getting counter failed.\n");
  67. pr_err(" Timer will be impacted\n");
  68. return -ETIMEDOUT;
  69. }
  70. return 0;
  71. }
  72. static int kona_timer_set_next_event(unsigned long clc,
  73. struct clock_event_device *unused)
  74. {
  75. /*
  76. * timer (0) is disabled by the timer interrupt already
  77. * so, here we reload the next event value and re-enable
  78. * the timer.
  79. *
  80. * This way, we are potentially losing the time between
  81. * timer-interrupt->set_next_event. CPU local timers, when
  82. * they come in should get rid of skew.
  83. */
  84. uint32_t lsw, msw;
  85. uint32_t reg;
  86. int ret;
  87. ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
  88. if (ret)
  89. return ret;
  90. /* Load the "next" event tick value */
  91. writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
  92. /* Enable compare */
  93. reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
  94. reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
  95. writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
  96. return 0;
  97. }
  98. static int kona_timer_shutdown(struct clock_event_device *evt)
  99. {
  100. kona_timer_disable_and_clear(timers.tmr_regs);
  101. return 0;
  102. }
  103. static struct clock_event_device kona_clockevent_timer = {
  104. .name = "timer 1",
  105. .features = CLOCK_EVT_FEAT_ONESHOT,
  106. .set_next_event = kona_timer_set_next_event,
  107. .set_state_shutdown = kona_timer_shutdown,
  108. .tick_resume = kona_timer_shutdown,
  109. };
  110. static void __init kona_timer_clockevents_init(void)
  111. {
  112. kona_clockevent_timer.cpumask = cpumask_of(0);
  113. clockevents_config_and_register(&kona_clockevent_timer,
  114. arch_timer_rate, 6, 0xffffffff);
  115. }
  116. static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
  117. {
  118. struct clock_event_device *evt = &kona_clockevent_timer;
  119. kona_timer_disable_and_clear(timers.tmr_regs);
  120. evt->event_handler(evt);
  121. return IRQ_HANDLED;
  122. }
  123. static int __init kona_timer_init(struct device_node *node)
  124. {
  125. u32 freq;
  126. struct clk *external_clk;
  127. external_clk = of_clk_get_by_name(node, NULL);
  128. if (!IS_ERR(external_clk)) {
  129. arch_timer_rate = clk_get_rate(external_clk);
  130. clk_prepare_enable(external_clk);
  131. } else if (!of_property_read_u32(node, "clock-frequency", &freq)) {
  132. arch_timer_rate = freq;
  133. } else {
  134. pr_err("Kona Timer v1 unable to determine clock-frequency\n");
  135. return -EINVAL;
  136. }
  137. /* Setup IRQ numbers */
  138. timers.tmr_irq = irq_of_parse_and_map(node, 0);
  139. /* Setup IO addresses */
  140. timers.tmr_regs = of_iomap(node, 0);
  141. kona_timer_disable_and_clear(timers.tmr_regs);
  142. kona_timer_clockevents_init();
  143. if (request_irq(timers.tmr_irq, kona_timer_interrupt, IRQF_TIMER,
  144. "Kona Timer Tick", NULL))
  145. pr_err("%s: request_irq() failed\n", "Kona Timer Tick");
  146. kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
  147. return 0;
  148. }
  149. TIMER_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
  150. /*
  151. * bcm,kona-timer is deprecated by brcm,kona-timer
  152. * being kept here for driver compatibility
  153. */
  154. TIMER_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);