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- # SPDX-License-Identifier: GPL-2.0
- config XILINX_VCU
- tristate "Xilinx VCU logicoreIP Init"
- depends on HAS_IOMEM && COMMON_CLK
- select REGMAP_MMIO
- help
- Provides the driver to enable and disable the isolation between the
- processing system and programmable logic part by using the logicoreIP
- register set. This driver also configures the frequency based on the
- clock information from the logicoreIP register set.
- If you say yes here you get support for the logicoreIP.
- If unsure, say N.
- To compile this driver as a module, choose M here: the
- module will be called xlnx_vcu.
- config COMMON_CLK_XLNX_CLKWZRD
- tristate "Xilinx Clocking Wizard"
- depends on COMMON_CLK && OF
- depends on HAS_IOMEM
- help
- Support for the Xilinx Clocking Wizard IP core clock generator.
- Adds support for clocking wizard and compatible.
- This driver supports the Xilinx clocking wizard programmable clock
- synthesizer. The number of output is configurable in the design.
- If unsure, say N.
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