tcsrcc-kalama.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/clk-provider.h>
  7. #include <linux/err.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/of_device.h>
  11. #include <linux/of.h>
  12. #include <linux/regmap.h>
  13. #include <dt-bindings/clock/qcom,tcsrcc-kalama.h>
  14. #include "clk-alpha-pll.h"
  15. #include "clk-branch.h"
  16. #include "clk-pll.h"
  17. #include "clk-rcg.h"
  18. #include "clk-regmap.h"
  19. #include "clk-regmap-divider.h"
  20. #include "clk-regmap-mux.h"
  21. #include "common.h"
  22. #include "reset.h"
  23. #include "vdd-level.h"
  24. static struct clk_branch tcsr_pcie_0_clkref_en = {
  25. .halt_reg = 0x15100,
  26. .halt_check = BRANCH_HALT_SKIP,
  27. .clkr = {
  28. .enable_reg = 0x15100,
  29. .enable_mask = BIT(0),
  30. .hw.init = &(struct clk_init_data){
  31. .name = "tcsr_pcie_0_clkref_en",
  32. .ops = &clk_branch2_ops,
  33. },
  34. },
  35. };
  36. static struct clk_branch tcsr_pcie_1_clkref_en = {
  37. .halt_reg = 0x15114,
  38. .halt_check = BRANCH_HALT_SKIP,
  39. .clkr = {
  40. .enable_reg = 0x15114,
  41. .enable_mask = BIT(0),
  42. .hw.init = &(struct clk_init_data){
  43. .name = "tcsr_pcie_1_clkref_en",
  44. .ops = &clk_branch2_ops,
  45. },
  46. },
  47. };
  48. static struct clk_branch tcsr_ufs_clkref_en = {
  49. .halt_reg = 0x15110,
  50. .halt_check = BRANCH_HALT_SKIP,
  51. .clkr = {
  52. .enable_reg = 0x15110,
  53. .enable_mask = BIT(0),
  54. .hw.init = &(struct clk_init_data){
  55. .name = "tcsr_ufs_clkref_en",
  56. .ops = &clk_branch2_ops,
  57. },
  58. },
  59. };
  60. static struct clk_branch tcsr_ufs_pad_clkref_en = {
  61. .halt_reg = 0x15104,
  62. .halt_check = BRANCH_HALT_SKIP,
  63. .clkr = {
  64. .enable_reg = 0x15104,
  65. .enable_mask = BIT(0),
  66. .hw.init = &(struct clk_init_data){
  67. .name = "tcsr_ufs_pad_clkref_en",
  68. .ops = &clk_branch2_ops,
  69. },
  70. },
  71. };
  72. static struct clk_branch tcsr_usb2_clkref_en = {
  73. .halt_reg = 0x15118,
  74. .halt_check = BRANCH_HALT_SKIP,
  75. .clkr = {
  76. .enable_reg = 0x15118,
  77. .enable_mask = BIT(0),
  78. .hw.init = &(struct clk_init_data){
  79. .name = "tcsr_usb2_clkref_en",
  80. .ops = &clk_branch2_ops,
  81. },
  82. },
  83. };
  84. static struct clk_branch tcsr_usb3_clkref_en = {
  85. .halt_reg = 0x15108,
  86. .halt_check = BRANCH_HALT_SKIP,
  87. .clkr = {
  88. .enable_reg = 0x15108,
  89. .enable_mask = BIT(0),
  90. .hw.init = &(struct clk_init_data){
  91. .name = "tcsr_usb3_clkref_en",
  92. .ops = &clk_branch2_ops,
  93. },
  94. },
  95. };
  96. static struct clk_regmap *tcsr_cc_kalama_clocks[] = {
  97. [TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr,
  98. [TCSR_PCIE_1_CLKREF_EN] = &tcsr_pcie_1_clkref_en.clkr,
  99. [TCSR_UFS_CLKREF_EN] = &tcsr_ufs_clkref_en.clkr,
  100. [TCSR_UFS_PAD_CLKREF_EN] = &tcsr_ufs_pad_clkref_en.clkr,
  101. [TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr,
  102. [TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr,
  103. };
  104. static const struct regmap_config tcsr_cc_kalama_regmap_config = {
  105. .reg_bits = 32,
  106. .reg_stride = 4,
  107. .val_bits = 32,
  108. .max_register = 0x2f000,
  109. .fast_io = true,
  110. };
  111. static const struct qcom_cc_desc tcsr_cc_kalama_desc = {
  112. .config = &tcsr_cc_kalama_regmap_config,
  113. .clks = tcsr_cc_kalama_clocks,
  114. .num_clks = ARRAY_SIZE(tcsr_cc_kalama_clocks),
  115. };
  116. static const struct of_device_id tcsr_cc_kalama_match_table[] = {
  117. { .compatible = "qcom,kalama-tcsrcc" },
  118. { }
  119. };
  120. MODULE_DEVICE_TABLE(of, tcsr_cc_kalama_match_table);
  121. static int tcsr_cc_kalama_probe(struct platform_device *pdev)
  122. {
  123. struct regmap *regmap;
  124. int ret;
  125. regmap = qcom_cc_map(pdev, &tcsr_cc_kalama_desc);
  126. if (IS_ERR(regmap))
  127. return PTR_ERR(regmap);
  128. ret = qcom_cc_really_probe(pdev, &tcsr_cc_kalama_desc, regmap);
  129. if (ret) {
  130. dev_err(&pdev->dev, "Failed to register TCSR CC clocks\n");
  131. return ret;
  132. }
  133. dev_info(&pdev->dev, "Registered TCSR CC clocks\n");
  134. return ret;
  135. }
  136. static void tcsr_cc_kalama_sync_state(struct device *dev)
  137. {
  138. qcom_cc_sync_state(dev, &tcsr_cc_kalama_desc);
  139. }
  140. static struct platform_driver tcsr_cc_kalama_driver = {
  141. .probe = tcsr_cc_kalama_probe,
  142. .driver = {
  143. .name = "tcsr_cc-kalama",
  144. .of_match_table = tcsr_cc_kalama_match_table,
  145. .sync_state = tcsr_cc_kalama_sync_state,
  146. },
  147. };
  148. static int __init tcsr_cc_kalama_init(void)
  149. {
  150. return platform_driver_register(&tcsr_cc_kalama_driver);
  151. }
  152. subsys_initcall(tcsr_cc_kalama_init);
  153. static void __exit tcsr_cc_kalama_exit(void)
  154. {
  155. platform_driver_unregister(&tcsr_cc_kalama_driver);
  156. }
  157. module_exit(tcsr_cc_kalama_exit);
  158. MODULE_DESCRIPTION("QTI TCSR_CC KALAMA Driver");
  159. MODULE_LICENSE("GPL");