clk-mt8195-peri_ao.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2021 MediaTek Inc.
  4. // Author: Chun-Jie Chen <[email protected]>
  5. #include "clk-gate.h"
  6. #include "clk-mtk.h"
  7. #include <dt-bindings/clock/mt8195-clk.h>
  8. #include <linux/clk-provider.h>
  9. #include <linux/platform_device.h>
  10. static const struct mtk_gate_regs peri_ao_cg_regs = {
  11. .set_ofs = 0x10,
  12. .clr_ofs = 0x14,
  13. .sta_ofs = 0x18,
  14. };
  15. #define GATE_PERI_AO(_id, _name, _parent, _shift) \
  16. GATE_MTK(_id, _name, _parent, &peri_ao_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
  17. static const struct mtk_gate peri_ao_clks[] = {
  18. GATE_PERI_AO(CLK_PERI_AO_ETHERNET, "peri_ao_ethernet", "top_axi", 0),
  19. GATE_PERI_AO(CLK_PERI_AO_ETHERNET_BUS, "peri_ao_ethernet_bus", "top_axi", 1),
  20. GATE_PERI_AO(CLK_PERI_AO_FLASHIF_BUS, "peri_ao_flashif_bus", "top_axi", 3),
  21. GATE_PERI_AO(CLK_PERI_AO_FLASHIF_FLASH, "peri_ao_flashif_flash", "top_spinor", 5),
  22. GATE_PERI_AO(CLK_PERI_AO_SSUSB_1P_BUS, "peri_ao_ssusb_1p_bus", "top_usb_top_1p", 7),
  23. GATE_PERI_AO(CLK_PERI_AO_SSUSB_1P_XHCI, "peri_ao_ssusb_1p_xhci", "top_ssusb_xhci_1p", 8),
  24. GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_BUS, "peri_ao_ssusb_2p_bus", "top_usb_top_2p", 9),
  25. GATE_PERI_AO(CLK_PERI_AO_SSUSB_2P_XHCI, "peri_ao_ssusb_2p_xhci", "top_ssusb_xhci_2p", 10),
  26. GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_BUS, "peri_ao_ssusb_3p_bus", "top_usb_top_3p", 11),
  27. GATE_PERI_AO(CLK_PERI_AO_SSUSB_3P_XHCI, "peri_ao_ssusb_3p_xhci", "top_ssusb_xhci_3p", 12),
  28. GATE_PERI_AO(CLK_PERI_AO_SPINFI, "peri_ao_spinfi", "top_spinfi_bclk", 15),
  29. GATE_PERI_AO(CLK_PERI_AO_ETHERNET_MAC, "peri_ao_ethernet_mac", "top_snps_eth_250m", 16),
  30. GATE_PERI_AO(CLK_PERI_AO_NFI_H, "peri_ao_nfi_h", "top_axi", 19),
  31. GATE_PERI_AO(CLK_PERI_AO_FNFI1X, "peri_ao_fnfi1x", "top_nfi1x", 20),
  32. GATE_PERI_AO(CLK_PERI_AO_PCIE_P0_MEM, "peri_ao_pcie_p0_mem", "mem_466m", 24),
  33. GATE_PERI_AO(CLK_PERI_AO_PCIE_P1_MEM, "peri_ao_pcie_p1_mem", "mem_466m", 25),
  34. };
  35. static const struct mtk_clk_desc peri_ao_desc = {
  36. .clks = peri_ao_clks,
  37. .num_clks = ARRAY_SIZE(peri_ao_clks),
  38. };
  39. static const struct of_device_id of_match_clk_mt8195_peri_ao[] = {
  40. {
  41. .compatible = "mediatek,mt8195-pericfg_ao",
  42. .data = &peri_ao_desc,
  43. }, {
  44. /* sentinel */
  45. }
  46. };
  47. static struct platform_driver clk_mt8195_peri_ao_drv = {
  48. .probe = mtk_clk_simple_probe,
  49. .remove = mtk_clk_simple_remove,
  50. .driver = {
  51. .name = "clk-mt8195-peri_ao",
  52. .of_match_table = of_match_clk_mt8195_peri_ao,
  53. },
  54. };
  55. builtin_platform_driver(clk_mt8195_peri_ao_drv);