clk-mt8195-cam.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2021 MediaTek Inc.
  4. // Author: Chun-Jie Chen <[email protected]>
  5. #include "clk-gate.h"
  6. #include "clk-mtk.h"
  7. #include <dt-bindings/clock/mt8195-clk.h>
  8. #include <linux/clk-provider.h>
  9. #include <linux/platform_device.h>
  10. static const struct mtk_gate_regs cam_cg_regs = {
  11. .set_ofs = 0x4,
  12. .clr_ofs = 0x8,
  13. .sta_ofs = 0x0,
  14. };
  15. #define GATE_CAM(_id, _name, _parent, _shift) \
  16. GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
  17. static const struct mtk_gate cam_clks[] = {
  18. GATE_CAM(CLK_CAM_LARB13, "cam_larb13", "top_cam", 0),
  19. GATE_CAM(CLK_CAM_LARB14, "cam_larb14", "top_cam", 1),
  20. GATE_CAM(CLK_CAM_MAIN_CAM, "cam_main_cam", "top_cam", 3),
  21. GATE_CAM(CLK_CAM_MAIN_CAMTG, "cam_main_camtg", "top_cam", 4),
  22. GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "top_cam", 5),
  23. GATE_CAM(CLK_CAM_GCAMSVA, "cam_gcamsva", "top_cam", 6),
  24. GATE_CAM(CLK_CAM_GCAMSVB, "cam_gcamsvb", "top_cam", 7),
  25. GATE_CAM(CLK_CAM_GCAMSVC, "cam_gcamsvc", "top_cam", 8),
  26. GATE_CAM(CLK_CAM_SCAMSA, "cam_scamsa", "top_cam", 9),
  27. GATE_CAM(CLK_CAM_SCAMSB, "cam_scamsb", "top_cam", 10),
  28. GATE_CAM(CLK_CAM_CAMSV_TOP, "cam_camsv_top", "top_cam", 11),
  29. GATE_CAM(CLK_CAM_CAMSV_CQ, "cam_camsv_cq", "top_cam", 12),
  30. GATE_CAM(CLK_CAM_ADL, "cam_adl", "top_cam", 16),
  31. GATE_CAM(CLK_CAM_ASG, "cam_asg", "top_cam", 17),
  32. GATE_CAM(CLK_CAM_PDA, "cam_pda", "top_cam", 18),
  33. GATE_CAM(CLK_CAM_FAKE_ENG, "cam_fake_eng", "top_cam", 19),
  34. GATE_CAM(CLK_CAM_MAIN_MRAW0, "cam_main_mraw0", "top_cam", 20),
  35. GATE_CAM(CLK_CAM_MAIN_MRAW1, "cam_main_mraw1", "top_cam", 21),
  36. GATE_CAM(CLK_CAM_MAIN_MRAW2, "cam_main_mraw2", "top_cam", 22),
  37. GATE_CAM(CLK_CAM_MAIN_MRAW3, "cam_main_mraw3", "top_cam", 23),
  38. GATE_CAM(CLK_CAM_CAM2MM0_GALS, "cam_cam2mm0_gals", "top_cam", 24),
  39. GATE_CAM(CLK_CAM_CAM2MM1_GALS, "cam_cam2mm1_gals", "top_cam", 25),
  40. GATE_CAM(CLK_CAM_CAM2SYS_GALS, "cam_cam2sys_gals", "top_cam", 26),
  41. };
  42. static const struct mtk_gate cam_mraw_clks[] = {
  43. GATE_CAM(CLK_CAM_MRAW_LARBX, "cam_mraw_larbx", "top_cam", 0),
  44. GATE_CAM(CLK_CAM_MRAW_CAMTG, "cam_mraw_camtg", "top_cam", 2),
  45. GATE_CAM(CLK_CAM_MRAW_MRAW0, "cam_mraw_mraw0", "top_cam", 3),
  46. GATE_CAM(CLK_CAM_MRAW_MRAW1, "cam_mraw_mraw1", "top_cam", 4),
  47. GATE_CAM(CLK_CAM_MRAW_MRAW2, "cam_mraw_mraw2", "top_cam", 5),
  48. GATE_CAM(CLK_CAM_MRAW_MRAW3, "cam_mraw_mraw3", "top_cam", 6),
  49. };
  50. static const struct mtk_gate cam_rawa_clks[] = {
  51. GATE_CAM(CLK_CAM_RAWA_LARBX, "cam_rawa_larbx", "top_cam", 0),
  52. GATE_CAM(CLK_CAM_RAWA_CAM, "cam_rawa_cam", "top_cam", 1),
  53. GATE_CAM(CLK_CAM_RAWA_CAMTG, "cam_rawa_camtg", "top_cam", 2),
  54. };
  55. static const struct mtk_gate cam_rawb_clks[] = {
  56. GATE_CAM(CLK_CAM_RAWB_LARBX, "cam_rawb_larbx", "top_cam", 0),
  57. GATE_CAM(CLK_CAM_RAWB_CAM, "cam_rawb_cam", "top_cam", 1),
  58. GATE_CAM(CLK_CAM_RAWB_CAMTG, "cam_rawb_camtg", "top_cam", 2),
  59. };
  60. static const struct mtk_gate cam_yuva_clks[] = {
  61. GATE_CAM(CLK_CAM_YUVA_LARBX, "cam_yuva_larbx", "top_cam", 0),
  62. GATE_CAM(CLK_CAM_YUVA_CAM, "cam_yuva_cam", "top_cam", 1),
  63. GATE_CAM(CLK_CAM_YUVA_CAMTG, "cam_yuva_camtg", "top_cam", 2),
  64. };
  65. static const struct mtk_gate cam_yuvb_clks[] = {
  66. GATE_CAM(CLK_CAM_YUVB_LARBX, "cam_yuvb_larbx", "top_cam", 0),
  67. GATE_CAM(CLK_CAM_YUVB_CAM, "cam_yuvb_cam", "top_cam", 1),
  68. GATE_CAM(CLK_CAM_YUVB_CAMTG, "cam_yuvb_camtg", "top_cam", 2),
  69. };
  70. static const struct mtk_clk_desc cam_desc = {
  71. .clks = cam_clks,
  72. .num_clks = ARRAY_SIZE(cam_clks),
  73. };
  74. static const struct mtk_clk_desc cam_mraw_desc = {
  75. .clks = cam_mraw_clks,
  76. .num_clks = ARRAY_SIZE(cam_mraw_clks),
  77. };
  78. static const struct mtk_clk_desc cam_rawa_desc = {
  79. .clks = cam_rawa_clks,
  80. .num_clks = ARRAY_SIZE(cam_rawa_clks),
  81. };
  82. static const struct mtk_clk_desc cam_rawb_desc = {
  83. .clks = cam_rawb_clks,
  84. .num_clks = ARRAY_SIZE(cam_rawb_clks),
  85. };
  86. static const struct mtk_clk_desc cam_yuva_desc = {
  87. .clks = cam_yuva_clks,
  88. .num_clks = ARRAY_SIZE(cam_yuva_clks),
  89. };
  90. static const struct mtk_clk_desc cam_yuvb_desc = {
  91. .clks = cam_yuvb_clks,
  92. .num_clks = ARRAY_SIZE(cam_yuvb_clks),
  93. };
  94. static const struct of_device_id of_match_clk_mt8195_cam[] = {
  95. {
  96. .compatible = "mediatek,mt8195-camsys",
  97. .data = &cam_desc,
  98. }, {
  99. .compatible = "mediatek,mt8195-camsys_mraw",
  100. .data = &cam_mraw_desc,
  101. }, {
  102. .compatible = "mediatek,mt8195-camsys_rawa",
  103. .data = &cam_rawa_desc,
  104. }, {
  105. .compatible = "mediatek,mt8195-camsys_rawb",
  106. .data = &cam_rawb_desc,
  107. }, {
  108. .compatible = "mediatek,mt8195-camsys_yuva",
  109. .data = &cam_yuva_desc,
  110. }, {
  111. .compatible = "mediatek,mt8195-camsys_yuvb",
  112. .data = &cam_yuvb_desc,
  113. }, {
  114. /* sentinel */
  115. }
  116. };
  117. static struct platform_driver clk_mt8195_cam_drv = {
  118. .probe = mtk_clk_simple_probe,
  119. .remove = mtk_clk_simple_remove,
  120. .driver = {
  121. .name = "clk-mt8195-cam",
  122. .of_match_table = of_match_clk_mt8195_cam,
  123. },
  124. };
  125. builtin_platform_driver(clk_mt8195_cam_drv);