clk-mt8192-cam.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2021 MediaTek Inc.
  4. // Author: Chun-Jie Chen <[email protected]>
  5. #include <linux/clk-provider.h>
  6. #include <linux/of_device.h>
  7. #include <linux/platform_device.h>
  8. #include "clk-mtk.h"
  9. #include "clk-gate.h"
  10. #include <dt-bindings/clock/mt8192-clk.h>
  11. static const struct mtk_gate_regs cam_cg_regs = {
  12. .set_ofs = 0x4,
  13. .clr_ofs = 0x8,
  14. .sta_ofs = 0x0,
  15. };
  16. #define GATE_CAM(_id, _name, _parent, _shift) \
  17. GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
  18. static const struct mtk_gate cam_clks[] = {
  19. GATE_CAM(CLK_CAM_LARB13, "cam_larb13", "cam_sel", 0),
  20. GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "cam_sel", 1),
  21. GATE_CAM(CLK_CAM_LARB14, "cam_larb14", "cam_sel", 2),
  22. GATE_CAM(CLK_CAM_CAM, "cam_cam", "cam_sel", 6),
  23. GATE_CAM(CLK_CAM_CAMTG, "cam_camtg", "cam_sel", 7),
  24. GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "cam_sel", 8),
  25. GATE_CAM(CLK_CAM_CAMSV0, "cam_camsv0", "cam_sel", 9),
  26. GATE_CAM(CLK_CAM_CAMSV1, "cam_camsv1", "cam_sel", 10),
  27. GATE_CAM(CLK_CAM_CAMSV2, "cam_camsv2", "cam_sel", 11),
  28. GATE_CAM(CLK_CAM_CAMSV3, "cam_camsv3", "cam_sel", 12),
  29. GATE_CAM(CLK_CAM_CCU0, "cam_ccu0", "cam_sel", 13),
  30. GATE_CAM(CLK_CAM_CCU1, "cam_ccu1", "cam_sel", 14),
  31. GATE_CAM(CLK_CAM_MRAW0, "cam_mraw0", "cam_sel", 15),
  32. GATE_CAM(CLK_CAM_FAKE_ENG, "cam_fake_eng", "cam_sel", 17),
  33. GATE_CAM(CLK_CAM_CCU_GALS, "cam_ccu_gals", "cam_sel", 18),
  34. GATE_CAM(CLK_CAM_CAM2MM_GALS, "cam2mm_gals", "cam_sel", 19),
  35. };
  36. static const struct mtk_gate cam_rawa_clks[] = {
  37. GATE_CAM(CLK_CAM_RAWA_LARBX, "cam_rawa_larbx", "cam_sel", 0),
  38. GATE_CAM(CLK_CAM_RAWA_CAM, "cam_rawa_cam", "cam_sel", 1),
  39. GATE_CAM(CLK_CAM_RAWA_CAMTG, "cam_rawa_camtg", "cam_sel", 2),
  40. };
  41. static const struct mtk_gate cam_rawb_clks[] = {
  42. GATE_CAM(CLK_CAM_RAWB_LARBX, "cam_rawb_larbx", "cam_sel", 0),
  43. GATE_CAM(CLK_CAM_RAWB_CAM, "cam_rawb_cam", "cam_sel", 1),
  44. GATE_CAM(CLK_CAM_RAWB_CAMTG, "cam_rawb_camtg", "cam_sel", 2),
  45. };
  46. static const struct mtk_gate cam_rawc_clks[] = {
  47. GATE_CAM(CLK_CAM_RAWC_LARBX, "cam_rawc_larbx", "cam_sel", 0),
  48. GATE_CAM(CLK_CAM_RAWC_CAM, "cam_rawc_cam", "cam_sel", 1),
  49. GATE_CAM(CLK_CAM_RAWC_CAMTG, "cam_rawc_camtg", "cam_sel", 2),
  50. };
  51. static const struct mtk_clk_desc cam_desc = {
  52. .clks = cam_clks,
  53. .num_clks = ARRAY_SIZE(cam_clks),
  54. };
  55. static const struct mtk_clk_desc cam_rawa_desc = {
  56. .clks = cam_rawa_clks,
  57. .num_clks = ARRAY_SIZE(cam_rawa_clks),
  58. };
  59. static const struct mtk_clk_desc cam_rawb_desc = {
  60. .clks = cam_rawb_clks,
  61. .num_clks = ARRAY_SIZE(cam_rawb_clks),
  62. };
  63. static const struct mtk_clk_desc cam_rawc_desc = {
  64. .clks = cam_rawc_clks,
  65. .num_clks = ARRAY_SIZE(cam_rawc_clks),
  66. };
  67. static const struct of_device_id of_match_clk_mt8192_cam[] = {
  68. {
  69. .compatible = "mediatek,mt8192-camsys",
  70. .data = &cam_desc,
  71. }, {
  72. .compatible = "mediatek,mt8192-camsys_rawa",
  73. .data = &cam_rawa_desc,
  74. }, {
  75. .compatible = "mediatek,mt8192-camsys_rawb",
  76. .data = &cam_rawb_desc,
  77. }, {
  78. .compatible = "mediatek,mt8192-camsys_rawc",
  79. .data = &cam_rawc_desc,
  80. }, {
  81. /* sentinel */
  82. }
  83. };
  84. static struct platform_driver clk_mt8192_cam_drv = {
  85. .probe = mtk_clk_simple_probe,
  86. .remove = mtk_clk_simple_remove,
  87. .driver = {
  88. .name = "clk-mt8192-cam",
  89. .of_match_table = of_match_clk_mt8192_cam,
  90. },
  91. };
  92. builtin_platform_driver(clk_mt8192_cam_drv);