clk-mt8186-vdec.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright (c) 2022 MediaTek Inc.
  4. // Author: Chun-Jie Chen <[email protected]>
  5. #include <linux/clk-provider.h>
  6. #include <linux/module.h>
  7. #include <linux/platform_device.h>
  8. #include "clk-mtk.h"
  9. #include "clk-gate.h"
  10. #include <dt-bindings/clock/mt8186-clk.h>
  11. static const struct mtk_gate_regs vdec0_cg_regs = {
  12. .set_ofs = 0x0,
  13. .clr_ofs = 0x4,
  14. .sta_ofs = 0x0,
  15. };
  16. static const struct mtk_gate_regs vdec1_cg_regs = {
  17. .set_ofs = 0x190,
  18. .clr_ofs = 0x190,
  19. .sta_ofs = 0x190,
  20. };
  21. static const struct mtk_gate_regs vdec2_cg_regs = {
  22. .set_ofs = 0x200,
  23. .clr_ofs = 0x204,
  24. .sta_ofs = 0x200,
  25. };
  26. static const struct mtk_gate_regs vdec3_cg_regs = {
  27. .set_ofs = 0x8,
  28. .clr_ofs = 0xc,
  29. .sta_ofs = 0x8,
  30. };
  31. #define GATE_VDEC0(_id, _name, _parent, _shift) \
  32. GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
  33. #define GATE_VDEC1(_id, _name, _parent, _shift) \
  34. GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
  35. #define GATE_VDEC2(_id, _name, _parent, _shift) \
  36. GATE_MTK(_id, _name, _parent, &vdec2_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
  37. #define GATE_VDEC3(_id, _name, _parent, _shift) \
  38. GATE_MTK(_id, _name, _parent, &vdec3_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
  39. static const struct mtk_gate vdec_clks[] = {
  40. /* VDEC0 */
  41. GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "top_vdec", 0),
  42. GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "top_vdec", 4),
  43. GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "top_vdec", 8),
  44. /* VDEC1 */
  45. GATE_VDEC1(CLK_VDEC_MINI_MDP_CKEN_CFG_RG, "vdec_mini_mdp_cken_cfg_rg", "top_vdec", 0),
  46. /* VDEC2 */
  47. GATE_VDEC2(CLK_VDEC_LAT_CKEN, "vdec_lat_cken", "top_vdec", 0),
  48. GATE_VDEC2(CLK_VDEC_LAT_ACTIVE, "vdec_lat_active", "top_vdec", 4),
  49. GATE_VDEC2(CLK_VDEC_LAT_CKEN_ENG, "vdec_lat_cken_eng", "top_vdec", 8),
  50. /* VDEC3 */
  51. GATE_VDEC3(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "top_vdec", 0),
  52. };
  53. static const struct mtk_clk_desc vdec_desc = {
  54. .clks = vdec_clks,
  55. .num_clks = ARRAY_SIZE(vdec_clks),
  56. };
  57. static const struct of_device_id of_match_clk_mt8186_vdec[] = {
  58. {
  59. .compatible = "mediatek,mt8186-vdecsys",
  60. .data = &vdec_desc,
  61. }, {
  62. /* sentinel */
  63. }
  64. };
  65. static struct platform_driver clk_mt8186_vdec_drv = {
  66. .probe = mtk_clk_simple_probe,
  67. .remove = mtk_clk_simple_remove,
  68. .driver = {
  69. .name = "clk-mt8186-vdec",
  70. .of_match_table = of_match_clk_mt8186_vdec,
  71. },
  72. };
  73. builtin_platform_driver(clk_mt8186_vdec_drv);