clk-mt6779-aud.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2019 MediaTek Inc.
  4. * Author: Wendell Lin <[email protected]>
  5. */
  6. #include <linux/module.h>
  7. #include <linux/clk-provider.h>
  8. #include <linux/of.h>
  9. #include <linux/of_address.h>
  10. #include <linux/of_device.h>
  11. #include <linux/platform_device.h>
  12. #include "clk-mtk.h"
  13. #include "clk-gate.h"
  14. #include <dt-bindings/clock/mt6779-clk.h>
  15. static const struct mtk_gate_regs audio0_cg_regs = {
  16. .set_ofs = 0x0,
  17. .clr_ofs = 0x0,
  18. .sta_ofs = 0x0,
  19. };
  20. static const struct mtk_gate_regs audio1_cg_regs = {
  21. .set_ofs = 0x4,
  22. .clr_ofs = 0x4,
  23. .sta_ofs = 0x4,
  24. };
  25. #define GATE_AUDIO0(_id, _name, _parent, _shift) \
  26. GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \
  27. &mtk_clk_gate_ops_no_setclr)
  28. #define GATE_AUDIO1(_id, _name, _parent, _shift) \
  29. GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \
  30. &mtk_clk_gate_ops_no_setclr)
  31. static const struct mtk_gate audio_clks[] = {
  32. /* AUDIO0 */
  33. GATE_AUDIO0(CLK_AUD_AFE, "aud_afe", "audio_sel", 2),
  34. GATE_AUDIO0(CLK_AUD_22M, "aud_22m", "aud_eng1_sel", 8),
  35. GATE_AUDIO0(CLK_AUD_24M, "aud_24m", "aud_eng2_sel", 9),
  36. GATE_AUDIO0(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner",
  37. "aud_eng2_sel", 18),
  38. GATE_AUDIO0(CLK_AUD_APLL_TUNER, "aud_apll_tuner",
  39. "aud_eng1_sel", 19),
  40. GATE_AUDIO0(CLK_AUD_TDM, "aud_tdm", "aud_eng1_sel", 20),
  41. GATE_AUDIO0(CLK_AUD_ADC, "aud_adc", "audio_sel", 24),
  42. GATE_AUDIO0(CLK_AUD_DAC, "aud_dac", "audio_sel", 25),
  43. GATE_AUDIO0(CLK_AUD_DAC_PREDIS, "aud_dac_predis",
  44. "audio_sel", 26),
  45. GATE_AUDIO0(CLK_AUD_TML, "aud_tml", "audio_sel", 27),
  46. GATE_AUDIO0(CLK_AUD_NLE, "aud_nle", "audio_sel", 28),
  47. /* AUDIO1 */
  48. GATE_AUDIO1(CLK_AUD_I2S1_BCLK_SW, "aud_i2s1_bclk",
  49. "audio_sel", 4),
  50. GATE_AUDIO1(CLK_AUD_I2S2_BCLK_SW, "aud_i2s2_bclk",
  51. "audio_sel", 5),
  52. GATE_AUDIO1(CLK_AUD_I2S3_BCLK_SW, "aud_i2s3_bclk",
  53. "audio_sel", 6),
  54. GATE_AUDIO1(CLK_AUD_I2S4_BCLK_SW, "aud_i2s4_bclk",
  55. "audio_sel", 7),
  56. GATE_AUDIO1(CLK_AUD_I2S5_BCLK_SW, "aud_i2s5_bclk",
  57. "audio_sel", 8),
  58. GATE_AUDIO1(CLK_AUD_CONN_I2S_ASRC, "aud_conn_i2s",
  59. "audio_sel", 12),
  60. GATE_AUDIO1(CLK_AUD_GENERAL1_ASRC, "aud_general1",
  61. "audio_sel", 13),
  62. GATE_AUDIO1(CLK_AUD_GENERAL2_ASRC, "aud_general2",
  63. "audio_sel", 14),
  64. GATE_AUDIO1(CLK_AUD_DAC_HIRES, "aud_dac_hires",
  65. "audio_h_sel", 15),
  66. GATE_AUDIO1(CLK_AUD_ADC_HIRES, "aud_adc_hires",
  67. "audio_h_sel", 16),
  68. GATE_AUDIO1(CLK_AUD_ADC_HIRES_TML, "aud_adc_hires_tml",
  69. "audio_h_sel", 17),
  70. GATE_AUDIO1(CLK_AUD_PDN_ADDA6_ADC, "aud_pdn_adda6_adc",
  71. "audio_sel", 20),
  72. GATE_AUDIO1(CLK_AUD_ADDA6_ADC_HIRES, "aud_adda6_adc_hires",
  73. "audio_h_sel",
  74. 21),
  75. GATE_AUDIO1(CLK_AUD_3RD_DAC, "aud_3rd_dac", "audio_sel",
  76. 28),
  77. GATE_AUDIO1(CLK_AUD_3RD_DAC_PREDIS, "aud_3rd_dac_predis",
  78. "audio_sel", 29),
  79. GATE_AUDIO1(CLK_AUD_3RD_DAC_TML, "aud_3rd_dac_tml",
  80. "audio_sel", 30),
  81. GATE_AUDIO1(CLK_AUD_3RD_DAC_HIRES, "aud_3rd_dac_hires",
  82. "audio_h_sel", 31),
  83. };
  84. static const struct mtk_clk_desc audio_desc = {
  85. .clks = audio_clks,
  86. .num_clks = ARRAY_SIZE(audio_clks),
  87. };
  88. static const struct of_device_id of_match_clk_mt6779_aud[] = {
  89. {
  90. .compatible = "mediatek,mt6779-audio",
  91. .data = &audio_desc,
  92. }, {
  93. /* sentinel */
  94. }
  95. };
  96. static struct platform_driver clk_mt6779_aud_drv = {
  97. .probe = mtk_clk_simple_probe,
  98. .remove = mtk_clk_simple_remove,
  99. .driver = {
  100. .name = "clk-mt6779-aud",
  101. .of_match_table = of_match_clk_mt6779_aud,
  102. },
  103. };
  104. module_platform_driver(clk_mt6779_aud_drv);
  105. MODULE_LICENSE("GPL");