tpm_i2c_nuvoton.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /******************************************************************************
  3. * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
  4. * based on the TCG TPM Interface Spec version 1.2.
  5. * Specifications at www.trustedcomputinggroup.org
  6. *
  7. * Copyright (C) 2011, Nuvoton Technology Corporation.
  8. * Dan Morav <[email protected]>
  9. * Copyright (C) 2013, Obsidian Research Corp.
  10. * Jason Gunthorpe <[email protected]>
  11. *
  12. * Nuvoton contact information: [email protected]
  13. *****************************************************************************/
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/slab.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/wait.h>
  20. #include <linux/i2c.h>
  21. #include <linux/of_device.h>
  22. #include "tpm.h"
  23. /* I2C interface offsets */
  24. #define TPM_STS 0x00
  25. #define TPM_BURST_COUNT 0x01
  26. #define TPM_DATA_FIFO_W 0x20
  27. #define TPM_DATA_FIFO_R 0x40
  28. #define TPM_VID_DID_RID 0x60
  29. #define TPM_I2C_RETRIES 5
  30. /*
  31. * I2C bus device maximum buffer size w/o counting I2C address or command
  32. * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
  33. */
  34. #define TPM_I2C_MAX_BUF_SIZE 32
  35. #define TPM_I2C_RETRY_COUNT 32
  36. #define TPM_I2C_BUS_DELAY 1000 /* usec */
  37. #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
  38. #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
  39. #define TPM_I2C_DELAY_RANGE 300 /* usec */
  40. #define OF_IS_TPM2 ((void *)1)
  41. #define I2C_IS_TPM2 1
  42. struct priv_data {
  43. int irq;
  44. unsigned int intrs;
  45. wait_queue_head_t read_queue;
  46. };
  47. static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
  48. u8 *data)
  49. {
  50. s32 status;
  51. status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
  52. dev_dbg(&client->dev,
  53. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  54. offset, size, (int)size, data, status);
  55. return status;
  56. }
  57. static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
  58. u8 *data)
  59. {
  60. s32 status;
  61. status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
  62. dev_dbg(&client->dev,
  63. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  64. offset, size, (int)size, data, status);
  65. return status;
  66. }
  67. #define TPM_STS_VALID 0x80
  68. #define TPM_STS_COMMAND_READY 0x40
  69. #define TPM_STS_GO 0x20
  70. #define TPM_STS_DATA_AVAIL 0x10
  71. #define TPM_STS_EXPECT 0x08
  72. #define TPM_STS_RESPONSE_RETRY 0x02
  73. #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
  74. #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
  75. #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
  76. /* read TPM_STS register */
  77. static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
  78. {
  79. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  80. s32 status;
  81. u8 data;
  82. status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
  83. if (status <= 0) {
  84. dev_err(&chip->dev, "%s() error return %d\n", __func__,
  85. status);
  86. data = TPM_STS_ERR_VAL;
  87. }
  88. return data;
  89. }
  90. /* write byte to TPM_STS register */
  91. static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
  92. {
  93. s32 status;
  94. int i;
  95. /* this causes the current command to be aborted */
  96. for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
  97. status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
  98. if (status < 0)
  99. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  100. + TPM_I2C_DELAY_RANGE);
  101. }
  102. return status;
  103. }
  104. /* write commandReady to TPM_STS register */
  105. static void i2c_nuvoton_ready(struct tpm_chip *chip)
  106. {
  107. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  108. s32 status;
  109. /* this causes the current command to be aborted */
  110. status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
  111. if (status < 0)
  112. dev_err(&chip->dev,
  113. "%s() fail to write TPM_STS.commandReady\n", __func__);
  114. }
  115. /* read burstCount field from TPM_STS register
  116. * return -1 on fail to read */
  117. static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
  118. struct tpm_chip *chip)
  119. {
  120. unsigned long stop = jiffies + chip->timeout_d;
  121. s32 status;
  122. int burst_count = -1;
  123. u8 data;
  124. /* wait for burstcount to be non-zero */
  125. do {
  126. /* in I2C burstCount is 1 byte */
  127. status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
  128. &data);
  129. if (status > 0 && data > 0) {
  130. burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
  131. break;
  132. }
  133. usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
  134. + TPM_I2C_DELAY_RANGE);
  135. } while (time_before(jiffies, stop));
  136. return burst_count;
  137. }
  138. /*
  139. * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
  140. * any call to this function which is not waiting for dataAvail will
  141. * set queue to NULL to avoid waiting for interrupt
  142. */
  143. static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
  144. {
  145. u8 status = i2c_nuvoton_read_status(chip);
  146. return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
  147. }
  148. static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
  149. u32 timeout, wait_queue_head_t *queue)
  150. {
  151. if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) {
  152. s32 rc;
  153. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  154. unsigned int cur_intrs = priv->intrs;
  155. enable_irq(priv->irq);
  156. rc = wait_event_interruptible_timeout(*queue,
  157. cur_intrs != priv->intrs,
  158. timeout);
  159. if (rc > 0)
  160. return 0;
  161. /* At this point we know that the SINT pin is asserted, so we
  162. * do not need to do i2c_nuvoton_check_status */
  163. } else {
  164. unsigned long ten_msec, stop;
  165. bool status_valid;
  166. /* check current status */
  167. status_valid = i2c_nuvoton_check_status(chip, mask, value);
  168. if (status_valid)
  169. return 0;
  170. /* use polling to wait for the event */
  171. ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
  172. stop = jiffies + timeout;
  173. do {
  174. if (time_before(jiffies, ten_msec))
  175. usleep_range(TPM_I2C_RETRY_DELAY_SHORT,
  176. TPM_I2C_RETRY_DELAY_SHORT
  177. + TPM_I2C_DELAY_RANGE);
  178. else
  179. usleep_range(TPM_I2C_RETRY_DELAY_LONG,
  180. TPM_I2C_RETRY_DELAY_LONG
  181. + TPM_I2C_DELAY_RANGE);
  182. status_valid = i2c_nuvoton_check_status(chip, mask,
  183. value);
  184. if (status_valid)
  185. return 0;
  186. } while (time_before(jiffies, stop));
  187. }
  188. dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
  189. value);
  190. return -ETIMEDOUT;
  191. }
  192. /* wait for dataAvail field to be set in the TPM_STS register */
  193. static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
  194. wait_queue_head_t *queue)
  195. {
  196. return i2c_nuvoton_wait_for_stat(chip,
  197. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  198. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  199. timeout, queue);
  200. }
  201. /* Read @count bytes into @buf from TPM_RD_FIFO register */
  202. static int i2c_nuvoton_recv_data(struct i2c_client *client,
  203. struct tpm_chip *chip, u8 *buf, size_t count)
  204. {
  205. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  206. s32 rc;
  207. int burst_count, bytes2read, size = 0;
  208. while (size < count &&
  209. i2c_nuvoton_wait_for_data_avail(chip,
  210. chip->timeout_c,
  211. &priv->read_queue) == 0) {
  212. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  213. if (burst_count < 0) {
  214. dev_err(&chip->dev,
  215. "%s() fail to read burstCount=%d\n", __func__,
  216. burst_count);
  217. return -EIO;
  218. }
  219. bytes2read = min_t(size_t, burst_count, count - size);
  220. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
  221. bytes2read, &buf[size]);
  222. if (rc < 0) {
  223. dev_err(&chip->dev,
  224. "%s() fail on i2c_nuvoton_read_buf()=%d\n",
  225. __func__, rc);
  226. return -EIO;
  227. }
  228. dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
  229. size += bytes2read;
  230. }
  231. return size;
  232. }
  233. /* Read TPM command results */
  234. static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  235. {
  236. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  237. struct device *dev = chip->dev.parent;
  238. struct i2c_client *client = to_i2c_client(dev);
  239. s32 rc;
  240. int status;
  241. int burst_count;
  242. int retries;
  243. int size = 0;
  244. u32 expected;
  245. if (count < TPM_HEADER_SIZE) {
  246. i2c_nuvoton_ready(chip); /* return to idle */
  247. dev_err(dev, "%s() count < header size\n", __func__);
  248. return -EIO;
  249. }
  250. for (retries = 0; retries < TPM_I2C_RETRIES; retries++) {
  251. if (retries > 0) {
  252. /* if this is not the first trial, set responseRetry */
  253. i2c_nuvoton_write_status(client,
  254. TPM_STS_RESPONSE_RETRY);
  255. }
  256. /*
  257. * read first available (> 10 bytes), including:
  258. * tag, paramsize, and result
  259. */
  260. status = i2c_nuvoton_wait_for_data_avail(
  261. chip, chip->timeout_c, &priv->read_queue);
  262. if (status != 0) {
  263. dev_err(dev, "%s() timeout on dataAvail\n", __func__);
  264. size = -ETIMEDOUT;
  265. continue;
  266. }
  267. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  268. if (burst_count < 0) {
  269. dev_err(dev, "%s() fail to get burstCount\n", __func__);
  270. size = -EIO;
  271. continue;
  272. }
  273. size = i2c_nuvoton_recv_data(client, chip, buf,
  274. burst_count);
  275. if (size < TPM_HEADER_SIZE) {
  276. dev_err(dev, "%s() fail to read header\n", __func__);
  277. size = -EIO;
  278. continue;
  279. }
  280. /*
  281. * convert number of expected bytes field from big endian 32 bit
  282. * to machine native
  283. */
  284. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  285. if (expected > count || expected < size) {
  286. dev_err(dev, "%s() expected > count\n", __func__);
  287. size = -EIO;
  288. continue;
  289. }
  290. rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
  291. expected - size);
  292. size += rc;
  293. if (rc < 0 || size < expected) {
  294. dev_err(dev, "%s() fail to read remainder of result\n",
  295. __func__);
  296. size = -EIO;
  297. continue;
  298. }
  299. if (i2c_nuvoton_wait_for_stat(
  300. chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
  301. TPM_STS_VALID, chip->timeout_c,
  302. NULL)) {
  303. dev_err(dev, "%s() error left over data\n", __func__);
  304. size = -ETIMEDOUT;
  305. continue;
  306. }
  307. break;
  308. }
  309. i2c_nuvoton_ready(chip);
  310. dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
  311. return size;
  312. }
  313. /*
  314. * Send TPM command.
  315. *
  316. * If interrupts are used (signaled by an irq set in the vendor structure)
  317. * tpm.c can skip polling for the data to be available as the interrupt is
  318. * waited for here
  319. */
  320. static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
  321. {
  322. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  323. struct device *dev = chip->dev.parent;
  324. struct i2c_client *client = to_i2c_client(dev);
  325. u32 ordinal;
  326. unsigned long duration;
  327. size_t count = 0;
  328. int burst_count, bytes2write, retries, rc = -EIO;
  329. for (retries = 0; retries < TPM_RETRY; retries++) {
  330. i2c_nuvoton_ready(chip);
  331. if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
  332. TPM_STS_COMMAND_READY,
  333. chip->timeout_b, NULL)) {
  334. dev_err(dev, "%s() timeout on commandReady\n",
  335. __func__);
  336. rc = -EIO;
  337. continue;
  338. }
  339. rc = 0;
  340. while (count < len - 1) {
  341. burst_count = i2c_nuvoton_get_burstcount(client,
  342. chip);
  343. if (burst_count < 0) {
  344. dev_err(dev, "%s() fail get burstCount\n",
  345. __func__);
  346. rc = -EIO;
  347. break;
  348. }
  349. bytes2write = min_t(size_t, burst_count,
  350. len - 1 - count);
  351. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
  352. bytes2write, &buf[count]);
  353. if (rc < 0) {
  354. dev_err(dev, "%s() fail i2cWriteBuf\n",
  355. __func__);
  356. break;
  357. }
  358. dev_dbg(dev, "%s(%d):", __func__, bytes2write);
  359. count += bytes2write;
  360. rc = i2c_nuvoton_wait_for_stat(chip,
  361. TPM_STS_VALID |
  362. TPM_STS_EXPECT,
  363. TPM_STS_VALID |
  364. TPM_STS_EXPECT,
  365. chip->timeout_c,
  366. NULL);
  367. if (rc < 0) {
  368. dev_err(dev, "%s() timeout on Expect\n",
  369. __func__);
  370. rc = -ETIMEDOUT;
  371. break;
  372. }
  373. }
  374. if (rc < 0)
  375. continue;
  376. /* write last byte */
  377. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
  378. &buf[count]);
  379. if (rc < 0) {
  380. dev_err(dev, "%s() fail to write last byte\n",
  381. __func__);
  382. rc = -EIO;
  383. continue;
  384. }
  385. dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
  386. rc = i2c_nuvoton_wait_for_stat(chip,
  387. TPM_STS_VALID | TPM_STS_EXPECT,
  388. TPM_STS_VALID,
  389. chip->timeout_c, NULL);
  390. if (rc) {
  391. dev_err(dev, "%s() timeout on Expect to clear\n",
  392. __func__);
  393. rc = -ETIMEDOUT;
  394. continue;
  395. }
  396. break;
  397. }
  398. if (rc < 0) {
  399. /* retries == TPM_RETRY */
  400. i2c_nuvoton_ready(chip);
  401. return rc;
  402. }
  403. /* execute the TPM command */
  404. rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
  405. if (rc < 0) {
  406. dev_err(dev, "%s() fail to write Go\n", __func__);
  407. i2c_nuvoton_ready(chip);
  408. return rc;
  409. }
  410. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  411. duration = tpm_calc_ordinal_duration(chip, ordinal);
  412. rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue);
  413. if (rc) {
  414. dev_err(dev, "%s() timeout command duration %ld\n",
  415. __func__, duration);
  416. i2c_nuvoton_ready(chip);
  417. return rc;
  418. }
  419. dev_dbg(dev, "%s() -> %zd\n", __func__, len);
  420. return 0;
  421. }
  422. static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
  423. {
  424. return (status == TPM_STS_COMMAND_READY);
  425. }
  426. static const struct tpm_class_ops tpm_i2c = {
  427. .flags = TPM_OPS_AUTO_STARTUP,
  428. .status = i2c_nuvoton_read_status,
  429. .recv = i2c_nuvoton_recv,
  430. .send = i2c_nuvoton_send,
  431. .cancel = i2c_nuvoton_ready,
  432. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  433. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  434. .req_canceled = i2c_nuvoton_req_canceled,
  435. };
  436. /* The only purpose for the handler is to signal to any waiting threads that
  437. * the interrupt is currently being asserted. The driver does not do any
  438. * processing triggered by interrupts, and the chip provides no way to mask at
  439. * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
  440. * this means it cannot be shared. */
  441. static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
  442. {
  443. struct tpm_chip *chip = dev_id;
  444. struct priv_data *priv = dev_get_drvdata(&chip->dev);
  445. priv->intrs++;
  446. wake_up(&priv->read_queue);
  447. disable_irq_nosync(priv->irq);
  448. return IRQ_HANDLED;
  449. }
  450. static int get_vid(struct i2c_client *client, u32 *res)
  451. {
  452. static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
  453. u32 temp;
  454. s32 rc;
  455. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  456. return -ENODEV;
  457. rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
  458. if (rc < 0)
  459. return rc;
  460. /* check WPCT301 values - ignore RID */
  461. if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
  462. /*
  463. * f/w rev 2.81 has an issue where the VID_DID_RID is not
  464. * reporting the right value. so give it another chance at
  465. * offset 0x20 (FIFO_W).
  466. */
  467. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
  468. (u8 *) (&temp));
  469. if (rc < 0)
  470. return rc;
  471. /* check WPCT301 values - ignore RID */
  472. if (memcmp(&temp, vid_did_rid_value,
  473. sizeof(vid_did_rid_value)))
  474. return -ENODEV;
  475. }
  476. *res = temp;
  477. return 0;
  478. }
  479. static int i2c_nuvoton_probe(struct i2c_client *client,
  480. const struct i2c_device_id *id)
  481. {
  482. int rc;
  483. struct tpm_chip *chip;
  484. struct device *dev = &client->dev;
  485. struct priv_data *priv;
  486. u32 vid = 0;
  487. rc = get_vid(client, &vid);
  488. if (rc)
  489. return rc;
  490. dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
  491. (u8) (vid >> 16), (u8) (vid >> 24));
  492. chip = tpmm_chip_alloc(dev, &tpm_i2c);
  493. if (IS_ERR(chip))
  494. return PTR_ERR(chip);
  495. priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
  496. if (!priv)
  497. return -ENOMEM;
  498. if (dev->of_node) {
  499. const struct of_device_id *of_id;
  500. of_id = of_match_device(dev->driver->of_match_table, dev);
  501. if (of_id && of_id->data == OF_IS_TPM2)
  502. chip->flags |= TPM_CHIP_FLAG_TPM2;
  503. } else
  504. if (id->driver_data == I2C_IS_TPM2)
  505. chip->flags |= TPM_CHIP_FLAG_TPM2;
  506. init_waitqueue_head(&priv->read_queue);
  507. /* Default timeouts */
  508. chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  509. chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
  510. chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  511. chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  512. dev_set_drvdata(&chip->dev, priv);
  513. /*
  514. * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
  515. * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
  516. * The IRQ should be set in the i2c_board_info (which is done
  517. * automatically in of_i2c_register_devices, for device tree users */
  518. priv->irq = client->irq;
  519. if (client->irq) {
  520. dev_dbg(dev, "%s() priv->irq\n", __func__);
  521. rc = devm_request_irq(dev, client->irq,
  522. i2c_nuvoton_int_handler,
  523. IRQF_TRIGGER_LOW,
  524. dev_name(&chip->dev),
  525. chip);
  526. if (rc) {
  527. dev_err(dev, "%s() Unable to request irq: %d for use\n",
  528. __func__, priv->irq);
  529. priv->irq = 0;
  530. } else {
  531. chip->flags |= TPM_CHIP_FLAG_IRQ;
  532. /* Clear any pending interrupt */
  533. i2c_nuvoton_ready(chip);
  534. /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
  535. rc = i2c_nuvoton_wait_for_stat(chip,
  536. TPM_STS_COMMAND_READY,
  537. TPM_STS_COMMAND_READY,
  538. chip->timeout_b,
  539. NULL);
  540. if (rc == 0) {
  541. /*
  542. * TIS is in ready state
  543. * write dummy byte to enter reception state
  544. * TPM_DATA_FIFO_W <- rc (0)
  545. */
  546. rc = i2c_nuvoton_write_buf(client,
  547. TPM_DATA_FIFO_W,
  548. 1, (u8 *) (&rc));
  549. if (rc < 0)
  550. return rc;
  551. /* TPM_STS <- 0x40 (commandReady) */
  552. i2c_nuvoton_ready(chip);
  553. } else {
  554. /*
  555. * timeout_b reached - command was
  556. * aborted. TIS should now be in idle state -
  557. * only TPM_STS_VALID should be set
  558. */
  559. if (i2c_nuvoton_read_status(chip) !=
  560. TPM_STS_VALID)
  561. return -EIO;
  562. }
  563. }
  564. }
  565. return tpm_chip_register(chip);
  566. }
  567. static void i2c_nuvoton_remove(struct i2c_client *client)
  568. {
  569. struct tpm_chip *chip = i2c_get_clientdata(client);
  570. tpm_chip_unregister(chip);
  571. }
  572. static const struct i2c_device_id i2c_nuvoton_id[] = {
  573. {"tpm_i2c_nuvoton"},
  574. {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2},
  575. {}
  576. };
  577. MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
  578. #ifdef CONFIG_OF
  579. static const struct of_device_id i2c_nuvoton_of_match[] = {
  580. {.compatible = "nuvoton,npct501"},
  581. {.compatible = "winbond,wpct301"},
  582. {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2},
  583. {},
  584. };
  585. MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
  586. #endif
  587. static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
  588. static struct i2c_driver i2c_nuvoton_driver = {
  589. .id_table = i2c_nuvoton_id,
  590. .probe = i2c_nuvoton_probe,
  591. .remove = i2c_nuvoton_remove,
  592. .driver = {
  593. .name = "tpm_i2c_nuvoton",
  594. .pm = &i2c_nuvoton_pm_ops,
  595. .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
  596. },
  597. };
  598. module_i2c_driver(i2c_nuvoton_driver);
  599. MODULE_AUTHOR("Dan Morav ([email protected])");
  600. MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
  601. MODULE_LICENSE("GPL");