moxtet.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Turris Mox module configuration bus driver
  4. *
  5. * Copyright (C) 2019 Marek Behún <[email protected]>
  6. */
  7. #include <dt-bindings/bus/moxtet.h>
  8. #include <linux/bitops.h>
  9. #include <linux/debugfs.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/module.h>
  12. #include <linux/moxtet.h>
  13. #include <linux/mutex.h>
  14. #include <linux/of_device.h>
  15. #include <linux/of_irq.h>
  16. #include <linux/spi/spi.h>
  17. /*
  18. * @name: module name for sysfs
  19. * @hwirq_base: base index for IRQ for this module (-1 if no IRQs)
  20. * @nirqs: how many interrupts does the shift register provide
  21. * @desc: module description for kernel log
  22. */
  23. static const struct {
  24. const char *name;
  25. int hwirq_base;
  26. int nirqs;
  27. const char *desc;
  28. } mox_module_table[] = {
  29. /* do not change order of this array! */
  30. { NULL, 0, 0, NULL },
  31. { "sfp", -1, 0, "MOX D (SFP cage)" },
  32. { "pci", MOXTET_IRQ_PCI, 1, "MOX B (Mini-PCIe)" },
  33. { "topaz", MOXTET_IRQ_TOPAZ, 1, "MOX C (4 port switch)" },
  34. { "peridot", MOXTET_IRQ_PERIDOT(0), 1, "MOX E (8 port switch)" },
  35. { "usb3", MOXTET_IRQ_USB3, 2, "MOX F (USB 3.0)" },
  36. { "pci-bridge", -1, 0, "MOX G (Mini-PCIe bridge)" },
  37. };
  38. static inline bool mox_module_known(unsigned int id)
  39. {
  40. return id >= TURRIS_MOX_MODULE_FIRST && id <= TURRIS_MOX_MODULE_LAST;
  41. }
  42. static inline const char *mox_module_name(unsigned int id)
  43. {
  44. if (mox_module_known(id))
  45. return mox_module_table[id].name;
  46. else
  47. return "unknown";
  48. }
  49. #define DEF_MODULE_ATTR(name, fmt, ...) \
  50. static ssize_t \
  51. module_##name##_show(struct device *dev, struct device_attribute *a, \
  52. char *buf) \
  53. { \
  54. struct moxtet_device *mdev = to_moxtet_device(dev); \
  55. return sprintf(buf, (fmt), __VA_ARGS__); \
  56. } \
  57. static DEVICE_ATTR_RO(module_##name)
  58. DEF_MODULE_ATTR(id, "0x%x\n", mdev->id);
  59. DEF_MODULE_ATTR(name, "%s\n", mox_module_name(mdev->id));
  60. DEF_MODULE_ATTR(description, "%s\n",
  61. mox_module_known(mdev->id) ? mox_module_table[mdev->id].desc
  62. : "");
  63. static struct attribute *moxtet_dev_attrs[] = {
  64. &dev_attr_module_id.attr,
  65. &dev_attr_module_name.attr,
  66. &dev_attr_module_description.attr,
  67. NULL,
  68. };
  69. static const struct attribute_group moxtet_dev_group = {
  70. .attrs = moxtet_dev_attrs,
  71. };
  72. static const struct attribute_group *moxtet_dev_groups[] = {
  73. &moxtet_dev_group,
  74. NULL,
  75. };
  76. static int moxtet_match(struct device *dev, struct device_driver *drv)
  77. {
  78. struct moxtet_device *mdev = to_moxtet_device(dev);
  79. struct moxtet_driver *tdrv = to_moxtet_driver(drv);
  80. const enum turris_mox_module_id *t;
  81. if (of_driver_match_device(dev, drv))
  82. return 1;
  83. if (!tdrv->id_table)
  84. return 0;
  85. for (t = tdrv->id_table; *t; ++t)
  86. if (*t == mdev->id)
  87. return 1;
  88. return 0;
  89. }
  90. static struct bus_type moxtet_bus_type = {
  91. .name = "moxtet",
  92. .dev_groups = moxtet_dev_groups,
  93. .match = moxtet_match,
  94. };
  95. int __moxtet_register_driver(struct module *owner,
  96. struct moxtet_driver *mdrv)
  97. {
  98. mdrv->driver.owner = owner;
  99. mdrv->driver.bus = &moxtet_bus_type;
  100. return driver_register(&mdrv->driver);
  101. }
  102. EXPORT_SYMBOL_GPL(__moxtet_register_driver);
  103. static int moxtet_dev_check(struct device *dev, void *data)
  104. {
  105. struct moxtet_device *mdev = to_moxtet_device(dev);
  106. struct moxtet_device *new_dev = data;
  107. if (mdev->moxtet == new_dev->moxtet && mdev->id == new_dev->id &&
  108. mdev->idx == new_dev->idx)
  109. return -EBUSY;
  110. return 0;
  111. }
  112. static void moxtet_dev_release(struct device *dev)
  113. {
  114. struct moxtet_device *mdev = to_moxtet_device(dev);
  115. put_device(mdev->moxtet->dev);
  116. kfree(mdev);
  117. }
  118. static struct moxtet_device *
  119. moxtet_alloc_device(struct moxtet *moxtet)
  120. {
  121. struct moxtet_device *dev;
  122. if (!get_device(moxtet->dev))
  123. return NULL;
  124. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  125. if (!dev) {
  126. put_device(moxtet->dev);
  127. return NULL;
  128. }
  129. dev->moxtet = moxtet;
  130. dev->dev.parent = moxtet->dev;
  131. dev->dev.bus = &moxtet_bus_type;
  132. dev->dev.release = moxtet_dev_release;
  133. device_initialize(&dev->dev);
  134. return dev;
  135. }
  136. static int moxtet_add_device(struct moxtet_device *dev)
  137. {
  138. static DEFINE_MUTEX(add_mutex);
  139. int ret;
  140. if (dev->idx >= TURRIS_MOX_MAX_MODULES || dev->id > 0xf)
  141. return -EINVAL;
  142. dev_set_name(&dev->dev, "moxtet-%s.%u", mox_module_name(dev->id),
  143. dev->idx);
  144. mutex_lock(&add_mutex);
  145. ret = bus_for_each_dev(&moxtet_bus_type, NULL, dev,
  146. moxtet_dev_check);
  147. if (ret)
  148. goto done;
  149. ret = device_add(&dev->dev);
  150. if (ret < 0)
  151. dev_err(dev->moxtet->dev, "can't add %s, status %d\n",
  152. dev_name(dev->moxtet->dev), ret);
  153. done:
  154. mutex_unlock(&add_mutex);
  155. return ret;
  156. }
  157. static int __unregister(struct device *dev, void *null)
  158. {
  159. if (dev->of_node) {
  160. of_node_clear_flag(dev->of_node, OF_POPULATED);
  161. of_node_put(dev->of_node);
  162. }
  163. device_unregister(dev);
  164. return 0;
  165. }
  166. static struct moxtet_device *
  167. of_register_moxtet_device(struct moxtet *moxtet, struct device_node *nc)
  168. {
  169. struct moxtet_device *dev;
  170. u32 val;
  171. int ret;
  172. dev = moxtet_alloc_device(moxtet);
  173. if (!dev) {
  174. dev_err(moxtet->dev,
  175. "Moxtet device alloc error for %pOF\n", nc);
  176. return ERR_PTR(-ENOMEM);
  177. }
  178. ret = of_property_read_u32(nc, "reg", &val);
  179. if (ret) {
  180. dev_err(moxtet->dev, "%pOF has no valid 'reg' property (%d)\n",
  181. nc, ret);
  182. goto err_put;
  183. }
  184. dev->idx = val;
  185. if (dev->idx >= TURRIS_MOX_MAX_MODULES) {
  186. dev_err(moxtet->dev, "%pOF Moxtet address 0x%x out of range\n",
  187. nc, dev->idx);
  188. ret = -EINVAL;
  189. goto err_put;
  190. }
  191. dev->id = moxtet->modules[dev->idx];
  192. if (!dev->id) {
  193. dev_err(moxtet->dev, "%pOF Moxtet address 0x%x is empty\n", nc,
  194. dev->idx);
  195. ret = -ENODEV;
  196. goto err_put;
  197. }
  198. of_node_get(nc);
  199. dev->dev.of_node = nc;
  200. ret = moxtet_add_device(dev);
  201. if (ret) {
  202. dev_err(moxtet->dev,
  203. "Moxtet device register error for %pOF\n", nc);
  204. of_node_put(nc);
  205. goto err_put;
  206. }
  207. return dev;
  208. err_put:
  209. put_device(&dev->dev);
  210. return ERR_PTR(ret);
  211. }
  212. static void of_register_moxtet_devices(struct moxtet *moxtet)
  213. {
  214. struct moxtet_device *dev;
  215. struct device_node *nc;
  216. if (!moxtet->dev->of_node)
  217. return;
  218. for_each_available_child_of_node(moxtet->dev->of_node, nc) {
  219. if (of_node_test_and_set_flag(nc, OF_POPULATED))
  220. continue;
  221. dev = of_register_moxtet_device(moxtet, nc);
  222. if (IS_ERR(dev)) {
  223. dev_warn(moxtet->dev,
  224. "Failed to create Moxtet device for %pOF\n",
  225. nc);
  226. of_node_clear_flag(nc, OF_POPULATED);
  227. }
  228. }
  229. }
  230. static void
  231. moxtet_register_devices_from_topology(struct moxtet *moxtet)
  232. {
  233. struct moxtet_device *dev;
  234. int i, ret;
  235. for (i = 0; i < moxtet->count; ++i) {
  236. dev = moxtet_alloc_device(moxtet);
  237. if (!dev) {
  238. dev_err(moxtet->dev, "Moxtet device %u alloc error\n",
  239. i);
  240. continue;
  241. }
  242. dev->idx = i;
  243. dev->id = moxtet->modules[i];
  244. ret = moxtet_add_device(dev);
  245. if (ret && ret != -EBUSY) {
  246. put_device(&dev->dev);
  247. dev_err(moxtet->dev,
  248. "Moxtet device %u register error: %i\n", i,
  249. ret);
  250. }
  251. }
  252. }
  253. /*
  254. * @nsame: how many modules with same id are already in moxtet->modules
  255. */
  256. static int moxtet_set_irq(struct moxtet *moxtet, int idx, int id, int nsame)
  257. {
  258. int i, first;
  259. struct moxtet_irqpos *pos;
  260. first = mox_module_table[id].hwirq_base +
  261. nsame * mox_module_table[id].nirqs;
  262. if (first + mox_module_table[id].nirqs > MOXTET_NIRQS)
  263. return -EINVAL;
  264. for (i = 0; i < mox_module_table[id].nirqs; ++i) {
  265. pos = &moxtet->irq.position[first + i];
  266. pos->idx = idx;
  267. pos->bit = i;
  268. moxtet->irq.exists |= BIT(first + i);
  269. }
  270. return 0;
  271. }
  272. static int moxtet_find_topology(struct moxtet *moxtet)
  273. {
  274. u8 buf[TURRIS_MOX_MAX_MODULES];
  275. int cnts[TURRIS_MOX_MODULE_LAST];
  276. int i, ret;
  277. memset(cnts, 0, sizeof(cnts));
  278. ret = spi_read(to_spi_device(moxtet->dev), buf, TURRIS_MOX_MAX_MODULES);
  279. if (ret < 0)
  280. return ret;
  281. if (buf[0] == TURRIS_MOX_CPU_ID_EMMC) {
  282. dev_info(moxtet->dev, "Found MOX A (eMMC CPU) module\n");
  283. } else if (buf[0] == TURRIS_MOX_CPU_ID_SD) {
  284. dev_info(moxtet->dev, "Found MOX A (CPU) module\n");
  285. } else {
  286. dev_err(moxtet->dev, "Invalid Turris MOX A CPU module 0x%02x\n",
  287. buf[0]);
  288. return -ENODEV;
  289. }
  290. moxtet->count = 0;
  291. for (i = 1; i < TURRIS_MOX_MAX_MODULES; ++i) {
  292. int id;
  293. if (buf[i] == 0xff)
  294. break;
  295. id = buf[i] & 0xf;
  296. moxtet->modules[i-1] = id;
  297. ++moxtet->count;
  298. if (mox_module_known(id)) {
  299. dev_info(moxtet->dev, "Found %s module\n",
  300. mox_module_table[id].desc);
  301. if (moxtet_set_irq(moxtet, i-1, id, cnts[id]++) < 0)
  302. dev_err(moxtet->dev,
  303. " Cannot set IRQ for module %s\n",
  304. mox_module_table[id].desc);
  305. } else {
  306. dev_warn(moxtet->dev,
  307. "Unknown Moxtet module found (ID 0x%02x)\n",
  308. id);
  309. }
  310. }
  311. return 0;
  312. }
  313. static int moxtet_spi_read(struct moxtet *moxtet, u8 *buf)
  314. {
  315. struct spi_transfer xfer = {
  316. .rx_buf = buf,
  317. .tx_buf = moxtet->tx,
  318. .len = moxtet->count + 1
  319. };
  320. int ret;
  321. mutex_lock(&moxtet->lock);
  322. ret = spi_sync_transfer(to_spi_device(moxtet->dev), &xfer, 1);
  323. mutex_unlock(&moxtet->lock);
  324. return ret;
  325. }
  326. int moxtet_device_read(struct device *dev)
  327. {
  328. struct moxtet_device *mdev = to_moxtet_device(dev);
  329. struct moxtet *moxtet = mdev->moxtet;
  330. u8 buf[TURRIS_MOX_MAX_MODULES];
  331. int ret;
  332. if (mdev->idx >= moxtet->count)
  333. return -EINVAL;
  334. ret = moxtet_spi_read(moxtet, buf);
  335. if (ret < 0)
  336. return ret;
  337. return buf[mdev->idx + 1] >> 4;
  338. }
  339. EXPORT_SYMBOL_GPL(moxtet_device_read);
  340. int moxtet_device_write(struct device *dev, u8 val)
  341. {
  342. struct moxtet_device *mdev = to_moxtet_device(dev);
  343. struct moxtet *moxtet = mdev->moxtet;
  344. int ret;
  345. if (mdev->idx >= moxtet->count)
  346. return -EINVAL;
  347. mutex_lock(&moxtet->lock);
  348. moxtet->tx[moxtet->count - mdev->idx] = val;
  349. ret = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
  350. moxtet->count + 1);
  351. mutex_unlock(&moxtet->lock);
  352. return ret;
  353. }
  354. EXPORT_SYMBOL_GPL(moxtet_device_write);
  355. int moxtet_device_written(struct device *dev)
  356. {
  357. struct moxtet_device *mdev = to_moxtet_device(dev);
  358. struct moxtet *moxtet = mdev->moxtet;
  359. if (mdev->idx >= moxtet->count)
  360. return -EINVAL;
  361. return moxtet->tx[moxtet->count - mdev->idx];
  362. }
  363. EXPORT_SYMBOL_GPL(moxtet_device_written);
  364. #ifdef CONFIG_DEBUG_FS
  365. static int moxtet_debug_open(struct inode *inode, struct file *file)
  366. {
  367. file->private_data = inode->i_private;
  368. return nonseekable_open(inode, file);
  369. }
  370. static ssize_t input_read(struct file *file, char __user *buf, size_t len,
  371. loff_t *ppos)
  372. {
  373. struct moxtet *moxtet = file->private_data;
  374. u8 bin[TURRIS_MOX_MAX_MODULES];
  375. u8 hex[sizeof(bin) * 2 + 1];
  376. int ret, n;
  377. ret = moxtet_spi_read(moxtet, bin);
  378. if (ret < 0)
  379. return ret;
  380. n = moxtet->count + 1;
  381. bin2hex(hex, bin, n);
  382. hex[2*n] = '\n';
  383. return simple_read_from_buffer(buf, len, ppos, hex, 2*n + 1);
  384. }
  385. static const struct file_operations input_fops = {
  386. .owner = THIS_MODULE,
  387. .open = moxtet_debug_open,
  388. .read = input_read,
  389. .llseek = no_llseek,
  390. };
  391. static ssize_t output_read(struct file *file, char __user *buf, size_t len,
  392. loff_t *ppos)
  393. {
  394. struct moxtet *moxtet = file->private_data;
  395. u8 hex[TURRIS_MOX_MAX_MODULES * 2 + 1];
  396. u8 *p = hex;
  397. int i;
  398. mutex_lock(&moxtet->lock);
  399. for (i = 0; i < moxtet->count; ++i)
  400. p = hex_byte_pack(p, moxtet->tx[moxtet->count - i]);
  401. mutex_unlock(&moxtet->lock);
  402. *p++ = '\n';
  403. return simple_read_from_buffer(buf, len, ppos, hex, p - hex);
  404. }
  405. static ssize_t output_write(struct file *file, const char __user *buf,
  406. size_t len, loff_t *ppos)
  407. {
  408. struct moxtet *moxtet = file->private_data;
  409. u8 bin[TURRIS_MOX_MAX_MODULES];
  410. u8 hex[sizeof(bin) * 2 + 1];
  411. ssize_t res;
  412. loff_t dummy = 0;
  413. int err, i;
  414. if (len > 2 * moxtet->count + 1 || len < 2 * moxtet->count)
  415. return -EINVAL;
  416. res = simple_write_to_buffer(hex, sizeof(hex), &dummy, buf, len);
  417. if (res < 0)
  418. return res;
  419. if (len % 2 == 1 && hex[len - 1] != '\n')
  420. return -EINVAL;
  421. err = hex2bin(bin, hex, moxtet->count);
  422. if (err < 0)
  423. return -EINVAL;
  424. mutex_lock(&moxtet->lock);
  425. for (i = 0; i < moxtet->count; ++i)
  426. moxtet->tx[moxtet->count - i] = bin[i];
  427. err = spi_write(to_spi_device(moxtet->dev), moxtet->tx,
  428. moxtet->count + 1);
  429. mutex_unlock(&moxtet->lock);
  430. return err < 0 ? err : len;
  431. }
  432. static const struct file_operations output_fops = {
  433. .owner = THIS_MODULE,
  434. .open = moxtet_debug_open,
  435. .read = output_read,
  436. .write = output_write,
  437. .llseek = no_llseek,
  438. };
  439. static int moxtet_register_debugfs(struct moxtet *moxtet)
  440. {
  441. struct dentry *root, *entry;
  442. root = debugfs_create_dir("moxtet", NULL);
  443. if (IS_ERR(root))
  444. return PTR_ERR(root);
  445. entry = debugfs_create_file_unsafe("input", 0444, root, moxtet,
  446. &input_fops);
  447. if (IS_ERR(entry))
  448. goto err_remove;
  449. entry = debugfs_create_file_unsafe("output", 0644, root, moxtet,
  450. &output_fops);
  451. if (IS_ERR(entry))
  452. goto err_remove;
  453. moxtet->debugfs_root = root;
  454. return 0;
  455. err_remove:
  456. debugfs_remove_recursive(root);
  457. return PTR_ERR(entry);
  458. }
  459. static void moxtet_unregister_debugfs(struct moxtet *moxtet)
  460. {
  461. debugfs_remove_recursive(moxtet->debugfs_root);
  462. }
  463. #else
  464. static inline int moxtet_register_debugfs(struct moxtet *moxtet)
  465. {
  466. return 0;
  467. }
  468. static inline void moxtet_unregister_debugfs(struct moxtet *moxtet)
  469. {
  470. }
  471. #endif
  472. static int moxtet_irq_domain_map(struct irq_domain *d, unsigned int irq,
  473. irq_hw_number_t hw)
  474. {
  475. struct moxtet *moxtet = d->host_data;
  476. if (hw >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(hw))) {
  477. dev_err(moxtet->dev, "Invalid hw irq number\n");
  478. return -EINVAL;
  479. }
  480. irq_set_chip_data(irq, d->host_data);
  481. irq_set_chip_and_handler(irq, &moxtet->irq.chip, handle_level_irq);
  482. return 0;
  483. }
  484. static int moxtet_irq_domain_xlate(struct irq_domain *d,
  485. struct device_node *ctrlr,
  486. const u32 *intspec, unsigned int intsize,
  487. unsigned long *out_hwirq,
  488. unsigned int *out_type)
  489. {
  490. struct moxtet *moxtet = d->host_data;
  491. int irq;
  492. if (WARN_ON(intsize < 1))
  493. return -EINVAL;
  494. irq = intspec[0];
  495. if (irq >= MOXTET_NIRQS || !(moxtet->irq.exists & BIT(irq)))
  496. return -EINVAL;
  497. *out_hwirq = irq;
  498. *out_type = IRQ_TYPE_NONE;
  499. return 0;
  500. }
  501. static const struct irq_domain_ops moxtet_irq_domain = {
  502. .map = moxtet_irq_domain_map,
  503. .xlate = moxtet_irq_domain_xlate,
  504. };
  505. static void moxtet_irq_mask(struct irq_data *d)
  506. {
  507. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  508. moxtet->irq.masked |= BIT(d->hwirq);
  509. }
  510. static void moxtet_irq_unmask(struct irq_data *d)
  511. {
  512. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  513. moxtet->irq.masked &= ~BIT(d->hwirq);
  514. }
  515. static void moxtet_irq_print_chip(struct irq_data *d, struct seq_file *p)
  516. {
  517. struct moxtet *moxtet = irq_data_get_irq_chip_data(d);
  518. struct moxtet_irqpos *pos = &moxtet->irq.position[d->hwirq];
  519. int id;
  520. id = moxtet->modules[pos->idx];
  521. seq_printf(p, " moxtet-%s.%i#%i", mox_module_name(id), pos->idx,
  522. pos->bit);
  523. }
  524. static const struct irq_chip moxtet_irq_chip = {
  525. .name = "moxtet",
  526. .irq_mask = moxtet_irq_mask,
  527. .irq_unmask = moxtet_irq_unmask,
  528. .irq_print_chip = moxtet_irq_print_chip,
  529. };
  530. static int moxtet_irq_read(struct moxtet *moxtet, unsigned long *map)
  531. {
  532. struct moxtet_irqpos *pos = moxtet->irq.position;
  533. u8 buf[TURRIS_MOX_MAX_MODULES];
  534. int i, ret;
  535. ret = moxtet_spi_read(moxtet, buf);
  536. if (ret < 0)
  537. return ret;
  538. *map = 0;
  539. for_each_set_bit(i, &moxtet->irq.exists, MOXTET_NIRQS) {
  540. if (!(buf[pos[i].idx + 1] & BIT(4 + pos[i].bit)))
  541. set_bit(i, map);
  542. }
  543. return 0;
  544. }
  545. static irqreturn_t moxtet_irq_thread_fn(int irq, void *data)
  546. {
  547. struct moxtet *moxtet = data;
  548. unsigned long set;
  549. int nhandled = 0, i, sub_irq, ret;
  550. ret = moxtet_irq_read(moxtet, &set);
  551. if (ret < 0)
  552. goto out;
  553. set &= ~moxtet->irq.masked;
  554. do {
  555. for_each_set_bit(i, &set, MOXTET_NIRQS) {
  556. sub_irq = irq_find_mapping(moxtet->irq.domain, i);
  557. handle_nested_irq(sub_irq);
  558. dev_dbg(moxtet->dev, "%i irq\n", i);
  559. ++nhandled;
  560. }
  561. ret = moxtet_irq_read(moxtet, &set);
  562. if (ret < 0)
  563. goto out;
  564. set &= ~moxtet->irq.masked;
  565. } while (set);
  566. out:
  567. return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
  568. }
  569. static void moxtet_irq_free(struct moxtet *moxtet)
  570. {
  571. int i, irq;
  572. for (i = 0; i < MOXTET_NIRQS; ++i) {
  573. if (moxtet->irq.exists & BIT(i)) {
  574. irq = irq_find_mapping(moxtet->irq.domain, i);
  575. irq_dispose_mapping(irq);
  576. }
  577. }
  578. irq_domain_remove(moxtet->irq.domain);
  579. }
  580. static int moxtet_irq_setup(struct moxtet *moxtet)
  581. {
  582. int i, ret;
  583. moxtet->irq.domain = irq_domain_add_simple(moxtet->dev->of_node,
  584. MOXTET_NIRQS, 0,
  585. &moxtet_irq_domain, moxtet);
  586. if (moxtet->irq.domain == NULL) {
  587. dev_err(moxtet->dev, "Could not add IRQ domain\n");
  588. return -ENOMEM;
  589. }
  590. for (i = 0; i < MOXTET_NIRQS; ++i)
  591. if (moxtet->irq.exists & BIT(i))
  592. irq_create_mapping(moxtet->irq.domain, i);
  593. moxtet->irq.chip = moxtet_irq_chip;
  594. moxtet->irq.masked = ~0;
  595. ret = request_threaded_irq(moxtet->dev_irq, NULL, moxtet_irq_thread_fn,
  596. IRQF_ONESHOT, "moxtet", moxtet);
  597. if (ret < 0)
  598. goto err_free;
  599. return 0;
  600. err_free:
  601. moxtet_irq_free(moxtet);
  602. return ret;
  603. }
  604. static int moxtet_probe(struct spi_device *spi)
  605. {
  606. struct moxtet *moxtet;
  607. int ret;
  608. ret = spi_setup(spi);
  609. if (ret < 0)
  610. return ret;
  611. moxtet = devm_kzalloc(&spi->dev, sizeof(struct moxtet),
  612. GFP_KERNEL);
  613. if (!moxtet)
  614. return -ENOMEM;
  615. moxtet->dev = &spi->dev;
  616. spi_set_drvdata(spi, moxtet);
  617. mutex_init(&moxtet->lock);
  618. moxtet->dev_irq = of_irq_get(moxtet->dev->of_node, 0);
  619. if (moxtet->dev_irq == -EPROBE_DEFER)
  620. return -EPROBE_DEFER;
  621. if (moxtet->dev_irq <= 0) {
  622. dev_err(moxtet->dev, "No IRQ resource found\n");
  623. return -ENXIO;
  624. }
  625. ret = moxtet_find_topology(moxtet);
  626. if (ret < 0)
  627. return ret;
  628. if (moxtet->irq.exists) {
  629. ret = moxtet_irq_setup(moxtet);
  630. if (ret < 0)
  631. return ret;
  632. }
  633. of_register_moxtet_devices(moxtet);
  634. moxtet_register_devices_from_topology(moxtet);
  635. ret = moxtet_register_debugfs(moxtet);
  636. if (ret < 0)
  637. dev_warn(moxtet->dev, "Failed creating debugfs entries: %i\n",
  638. ret);
  639. return 0;
  640. }
  641. static void moxtet_remove(struct spi_device *spi)
  642. {
  643. struct moxtet *moxtet = spi_get_drvdata(spi);
  644. free_irq(moxtet->dev_irq, moxtet);
  645. moxtet_irq_free(moxtet);
  646. moxtet_unregister_debugfs(moxtet);
  647. device_for_each_child(moxtet->dev, NULL, __unregister);
  648. mutex_destroy(&moxtet->lock);
  649. }
  650. static const struct of_device_id moxtet_dt_ids[] = {
  651. { .compatible = "cznic,moxtet" },
  652. {},
  653. };
  654. MODULE_DEVICE_TABLE(of, moxtet_dt_ids);
  655. static struct spi_driver moxtet_spi_driver = {
  656. .driver = {
  657. .name = "moxtet",
  658. .of_match_table = moxtet_dt_ids,
  659. },
  660. .probe = moxtet_probe,
  661. .remove = moxtet_remove,
  662. };
  663. static int __init moxtet_init(void)
  664. {
  665. int ret;
  666. ret = bus_register(&moxtet_bus_type);
  667. if (ret < 0) {
  668. pr_err("moxtet bus registration failed: %d\n", ret);
  669. goto error;
  670. }
  671. ret = spi_register_driver(&moxtet_spi_driver);
  672. if (ret < 0) {
  673. pr_err("moxtet spi driver registration failed: %d\n", ret);
  674. goto error_bus;
  675. }
  676. return 0;
  677. error_bus:
  678. bus_unregister(&moxtet_bus_type);
  679. error:
  680. return ret;
  681. }
  682. postcore_initcall_sync(moxtet_init);
  683. static void __exit moxtet_exit(void)
  684. {
  685. spi_unregister_driver(&moxtet_spi_driver);
  686. bus_unregister(&moxtet_bus_type);
  687. }
  688. module_exit(moxtet_exit);
  689. MODULE_AUTHOR("Marek Behun <[email protected]>");
  690. MODULE_DESCRIPTION("CZ.NIC's Turris Mox module configuration bus");
  691. MODULE_LICENSE("GPL v2");