pata_cs5536.c 7.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * pata_cs5536.c - CS5536 PATA for new ATA layer
  4. * (C) 2007 Martin K. Petersen <[email protected]>
  5. * (C) 2011 Bartlomiej Zolnierkiewicz
  6. *
  7. * Documentation:
  8. * Available from AMD web site.
  9. *
  10. * The IDE timing registers for the CS5536 live in the Geode Machine
  11. * Specific Register file and not PCI config space. Most BIOSes
  12. * virtualize the PCI registers so the chip looks like a standard IDE
  13. * controller. Unfortunately not all implementations get this right.
  14. * In particular some have problems with unaligned accesses to the
  15. * virtualized PCI registers. This driver always does full dword
  16. * writes to work around the issue. Also, in case of a bad BIOS this
  17. * driver can be loaded with the "msr=1" parameter which forces using
  18. * the Machine Specific Registers to configure the device.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/pci.h>
  23. #include <linux/blkdev.h>
  24. #include <linux/delay.h>
  25. #include <linux/libata.h>
  26. #include <scsi/scsi_host.h>
  27. #include <linux/dmi.h>
  28. #ifdef CONFIG_X86_32
  29. #include <asm/msr.h>
  30. static int use_msr;
  31. module_param_named(msr, use_msr, int, 0644);
  32. MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)");
  33. #else
  34. #undef rdmsr /* avoid accidental MSR usage on, e.g. x86-64 */
  35. #undef wrmsr
  36. #define rdmsr(x, y, z) do { } while (0)
  37. #define wrmsr(x, y, z) do { } while (0)
  38. #define use_msr 0
  39. #endif
  40. #define DRV_NAME "pata_cs5536"
  41. #define DRV_VERSION "0.0.8"
  42. enum {
  43. MSR_IDE_CFG = 0x51300010,
  44. PCI_IDE_CFG = 0x40,
  45. CFG = 0,
  46. DTC = 2,
  47. CAST = 3,
  48. ETC = 4,
  49. IDE_CFG_CHANEN = (1 << 1),
  50. IDE_CFG_CABLE = (1 << 17) | (1 << 16),
  51. IDE_D0_SHIFT = 24,
  52. IDE_D1_SHIFT = 16,
  53. IDE_DRV_MASK = 0xff,
  54. IDE_CAST_D0_SHIFT = 6,
  55. IDE_CAST_D1_SHIFT = 4,
  56. IDE_CAST_DRV_MASK = 0x3,
  57. IDE_CAST_CMD_MASK = 0xff,
  58. IDE_CAST_CMD_SHIFT = 24,
  59. IDE_ETC_UDMA_MASK = 0xc0,
  60. };
  61. /* Some Bachmann OT200 devices have a non working UDMA support due a
  62. * missing resistor.
  63. */
  64. static const struct dmi_system_id udma_quirk_dmi_table[] = {
  65. {
  66. .ident = "Bachmann electronic OT200",
  67. .matches = {
  68. DMI_MATCH(DMI_SYS_VENDOR, "Bachmann electronic"),
  69. DMI_MATCH(DMI_PRODUCT_NAME, "OT200"),
  70. DMI_MATCH(DMI_PRODUCT_VERSION, "1")
  71. },
  72. },
  73. { }
  74. };
  75. static int cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
  76. {
  77. if (unlikely(use_msr)) {
  78. u32 dummy __maybe_unused;
  79. rdmsr(MSR_IDE_CFG + reg, *val, dummy);
  80. return 0;
  81. }
  82. return pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
  83. }
  84. static int cs5536_write(struct pci_dev *pdev, int reg, int val)
  85. {
  86. if (unlikely(use_msr)) {
  87. wrmsr(MSR_IDE_CFG + reg, val, 0);
  88. return 0;
  89. }
  90. return pci_write_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
  91. }
  92. static void cs5536_program_dtc(struct ata_device *adev, u8 tim)
  93. {
  94. struct pci_dev *pdev = to_pci_dev(adev->link->ap->host->dev);
  95. int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
  96. u32 dtc;
  97. cs5536_read(pdev, DTC, &dtc);
  98. dtc &= ~(IDE_DRV_MASK << dshift);
  99. dtc |= tim << dshift;
  100. cs5536_write(pdev, DTC, dtc);
  101. }
  102. /**
  103. * cs5536_cable_detect - detect cable type
  104. * @ap: Port to detect on
  105. *
  106. * Perform cable detection for ATA66 capable cable.
  107. *
  108. * Returns a cable type.
  109. */
  110. static int cs5536_cable_detect(struct ata_port *ap)
  111. {
  112. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  113. u32 cfg;
  114. cs5536_read(pdev, CFG, &cfg);
  115. if (cfg & IDE_CFG_CABLE)
  116. return ATA_CBL_PATA80;
  117. else
  118. return ATA_CBL_PATA40;
  119. }
  120. /**
  121. * cs5536_set_piomode - PIO setup
  122. * @ap: ATA interface
  123. * @adev: device on the interface
  124. */
  125. static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev)
  126. {
  127. static const u8 drv_timings[5] = {
  128. 0x98, 0x55, 0x32, 0x21, 0x20,
  129. };
  130. static const u8 addr_timings[5] = {
  131. 0x2, 0x1, 0x0, 0x0, 0x0,
  132. };
  133. static const u8 cmd_timings[5] = {
  134. 0x99, 0x92, 0x90, 0x22, 0x20,
  135. };
  136. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  137. struct ata_device *pair = ata_dev_pair(adev);
  138. int mode = adev->pio_mode - XFER_PIO_0;
  139. int cmdmode = mode;
  140. int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
  141. u32 cast;
  142. if (pair)
  143. cmdmode = min(mode, pair->pio_mode - XFER_PIO_0);
  144. cs5536_program_dtc(adev, drv_timings[mode]);
  145. cs5536_read(pdev, CAST, &cast);
  146. cast &= ~(IDE_CAST_DRV_MASK << cshift);
  147. cast |= addr_timings[mode] << cshift;
  148. cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT);
  149. cast |= cmd_timings[cmdmode] << IDE_CAST_CMD_SHIFT;
  150. cs5536_write(pdev, CAST, cast);
  151. }
  152. /**
  153. * cs5536_set_dmamode - DMA timing setup
  154. * @ap: ATA interface
  155. * @adev: Device being configured
  156. *
  157. */
  158. static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  159. {
  160. static const u8 udma_timings[6] = {
  161. 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6,
  162. };
  163. static const u8 mwdma_timings[3] = {
  164. 0x67, 0x21, 0x20,
  165. };
  166. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  167. u32 etc;
  168. int mode = adev->dma_mode;
  169. int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
  170. cs5536_read(pdev, ETC, &etc);
  171. if (mode >= XFER_UDMA_0) {
  172. etc &= ~(IDE_DRV_MASK << dshift);
  173. etc |= udma_timings[mode - XFER_UDMA_0] << dshift;
  174. } else { /* MWDMA */
  175. etc &= ~(IDE_ETC_UDMA_MASK << dshift);
  176. cs5536_program_dtc(adev, mwdma_timings[mode - XFER_MW_DMA_0]);
  177. }
  178. cs5536_write(pdev, ETC, etc);
  179. }
  180. static struct scsi_host_template cs5536_sht = {
  181. ATA_BMDMA_SHT(DRV_NAME),
  182. };
  183. static struct ata_port_operations cs5536_port_ops = {
  184. .inherits = &ata_bmdma32_port_ops,
  185. .cable_detect = cs5536_cable_detect,
  186. .set_piomode = cs5536_set_piomode,
  187. .set_dmamode = cs5536_set_dmamode,
  188. };
  189. /**
  190. * cs5536_init_one
  191. * @dev: PCI device
  192. * @id: Entry in match table
  193. *
  194. */
  195. static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  196. {
  197. static const struct ata_port_info info = {
  198. .flags = ATA_FLAG_SLAVE_POSS,
  199. .pio_mask = ATA_PIO4,
  200. .mwdma_mask = ATA_MWDMA2,
  201. .udma_mask = ATA_UDMA5,
  202. .port_ops = &cs5536_port_ops,
  203. };
  204. static const struct ata_port_info no_udma_info = {
  205. .flags = ATA_FLAG_SLAVE_POSS,
  206. .pio_mask = ATA_PIO4,
  207. .port_ops = &cs5536_port_ops,
  208. };
  209. const struct ata_port_info *ppi[2];
  210. u32 cfg;
  211. if (dmi_check_system(udma_quirk_dmi_table))
  212. ppi[0] = &no_udma_info;
  213. else
  214. ppi[0] = &info;
  215. ppi[1] = &ata_dummy_port_info;
  216. if (use_msr)
  217. dev_err(&dev->dev, DRV_NAME ": Using MSR regs instead of PCI\n");
  218. cs5536_read(dev, CFG, &cfg);
  219. if ((cfg & IDE_CFG_CHANEN) == 0) {
  220. dev_err(&dev->dev, DRV_NAME ": disabled by BIOS\n");
  221. return -ENODEV;
  222. }
  223. return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0);
  224. }
  225. static const struct pci_device_id cs5536[] = {
  226. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), },
  227. { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_DEV_IDE), },
  228. { },
  229. };
  230. static struct pci_driver cs5536_pci_driver = {
  231. .name = DRV_NAME,
  232. .id_table = cs5536,
  233. .probe = cs5536_init_one,
  234. .remove = ata_pci_remove_one,
  235. #ifdef CONFIG_PM_SLEEP
  236. .suspend = ata_pci_device_suspend,
  237. .resume = ata_pci_device_resume,
  238. #endif
  239. };
  240. module_pci_driver(cs5536_pci_driver);
  241. MODULE_AUTHOR("Martin K. Petersen");
  242. MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller");
  243. MODULE_LICENSE("GPL");
  244. MODULE_DEVICE_TABLE(pci, cs5536);
  245. MODULE_VERSION(DRV_VERSION);