tm-signal-context-chk-vsx.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2016, Cyril Bur, IBM Corp.
  4. *
  5. * Test the kernel's signal frame code.
  6. *
  7. * The kernel sets up two sets of ucontexts if the signal was to be
  8. * delivered while the thread was in a transaction (referred too as
  9. * first and second contexts).
  10. * Expected behaviour is that the checkpointed state is in the user
  11. * context passed to the signal handler (first context). The speculated
  12. * state can be accessed with the uc_link pointer (second context).
  13. *
  14. * The rationale for this is that if TM unaware code (which linked
  15. * against TM libs) installs a signal handler it will not know of the
  16. * speculative nature of the 'live' registers and may infer the wrong
  17. * thing.
  18. */
  19. #include <stdlib.h>
  20. #include <stdio.h>
  21. #include <string.h>
  22. #include <signal.h>
  23. #include <unistd.h>
  24. #include <altivec.h>
  25. #include "utils.h"
  26. #include "tm.h"
  27. #define MAX_ATTEMPT 500000
  28. #define NV_VSX_REGS 12 /* Number of VSX registers to check. */
  29. #define VSX20 20 /* First VSX register to check in vsr20-vsr31 subset */
  30. #define FPR20 20 /* FPR20 overlaps VSX20 most significant doubleword */
  31. long tm_signal_self_context_load(pid_t pid, long *gprs, double *fps, vector int *vms, vector int *vss);
  32. static sig_atomic_t fail, broken;
  33. /* Test only 12 vsx registers from vsr20 to vsr31 */
  34. vector int vsxs[] = {
  35. /* First context will be set with these values, i.e. non-speculative */
  36. /* VSX20 , VSX21 , ... */
  37. { 1, 2, 3, 4},{ 5, 6, 7, 8},{ 9,10,11,12},
  38. {13,14,15,16},{17,18,19,20},{21,22,23,24},
  39. {25,26,27,28},{29,30,31,32},{33,34,35,36},
  40. {37,38,39,40},{41,42,43,44},{45,46,47,48},
  41. /* Second context will be set with these values, i.e. speculative */
  42. /* VSX20 , VSX21 , ... */
  43. {-1, -2, -3, -4 },{-5, -6, -7, -8 },{-9, -10,-11,-12},
  44. {-13,-14,-15,-16},{-17,-18,-19,-20},{-21,-22,-23,-24},
  45. {-25,-26,-27,-28},{-29,-30,-31,-32},{-33,-34,-35,-36},
  46. {-37,-38,-39,-40},{-41,-42,-43,-44},{-45,-46,-47,-48}
  47. };
  48. static void signal_usr1(int signum, siginfo_t *info, void *uc)
  49. {
  50. int i, j;
  51. uint8_t vsx[sizeof(vector int)];
  52. uint8_t vsx_tm[sizeof(vector int)];
  53. ucontext_t *ucp = uc;
  54. ucontext_t *tm_ucp = ucp->uc_link;
  55. /*
  56. * FP registers and VMX registers overlap the VSX registers.
  57. *
  58. * FP registers (f0-31) overlap the most significant 64 bits of VSX
  59. * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like
  60. * the VSX registers, overlap fully the other half of VSX registers,
  61. * i.e. vr0-31 overlaps fully vsr32-63.
  62. *
  63. * Due to compatibility and historical reasons (VMX/Altivec support
  64. * appeared first on the architecture), VMX registers vr0-31 (so VSX
  65. * half vsr32-63 too) are stored right after the v_regs pointer, in an
  66. * area allocated for 'vmx_reverse' array (please see
  67. * arch/powerpc/include/uapi/asm/sigcontext.h for details about the
  68. * mcontext_t structure on Power).
  69. *
  70. * The other VSX half (vsr0-31) is hence stored below vr0-31/vsr32-63
  71. * registers, but only the least significant 64 bits of vsr0-31. The
  72. * most significant 64 bits of vsr0-31 (f0-31), as it overlaps the FP
  73. * registers, is kept in fp_regs.
  74. *
  75. * v_regs is a 16 byte aligned pointer at the start of vmx_reserve
  76. * (vmx_reserve may or may not be 16 aligned) where the v_regs structure
  77. * exists, so v_regs points to where vr0-31 / vsr32-63 registers are
  78. * fully stored. Since v_regs type is elf_vrregset_t, v_regs + 1
  79. * skips all the slots used to store vr0-31 / vsr32-64 and points to
  80. * part of one VSX half, i.e. v_regs + 1 points to the least significant
  81. * 64 bits of vsr0-31. The other part of this half (the most significant
  82. * part of vsr0-31) is stored in fp_regs.
  83. *
  84. */
  85. /* Get pointer to least significant doubleword of vsr0-31 */
  86. long *vsx_ptr = (long *)(ucp->uc_mcontext.v_regs + 1);
  87. long *tm_vsx_ptr = (long *)(tm_ucp->uc_mcontext.v_regs + 1);
  88. /* Check first context. Print all mismatches. */
  89. for (i = 0; i < NV_VSX_REGS; i++) {
  90. /*
  91. * Copy VSX most significant doubleword from fp_regs and
  92. * copy VSX least significant one from 64-bit slots below
  93. * saved VMX registers.
  94. */
  95. memcpy(vsx, &ucp->uc_mcontext.fp_regs[FPR20 + i], 8);
  96. memcpy(vsx + 8, &vsx_ptr[VSX20 + i], 8);
  97. fail = memcmp(vsx, &vsxs[i], sizeof(vector int));
  98. if (fail) {
  99. broken = 1;
  100. printf("VSX%d (1st context) == 0x", VSX20 + i);
  101. for (j = 0; j < 16; j++)
  102. printf("%02x", vsx[j]);
  103. printf(" instead of 0x");
  104. for (j = 0; j < 4; j++)
  105. printf("%08x", vsxs[i][j]);
  106. printf(" (expected)\n");
  107. }
  108. }
  109. /* Check second context. Print all mismatches. */
  110. for (i = 0; i < NV_VSX_REGS; i++) {
  111. /*
  112. * Copy VSX most significant doubleword from fp_regs and
  113. * copy VSX least significant one from 64-bit slots below
  114. * saved VMX registers.
  115. */
  116. memcpy(vsx_tm, &tm_ucp->uc_mcontext.fp_regs[FPR20 + i], 8);
  117. memcpy(vsx_tm + 8, &tm_vsx_ptr[VSX20 + i], 8);
  118. fail = memcmp(vsx_tm, &vsxs[NV_VSX_REGS + i], sizeof(vector int));
  119. if (fail) {
  120. broken = 1;
  121. printf("VSX%d (2nd context) == 0x", VSX20 + i);
  122. for (j = 0; j < 16; j++)
  123. printf("%02x", vsx_tm[j]);
  124. printf(" instead of 0x");
  125. for (j = 0; j < 4; j++)
  126. printf("%08x", vsxs[NV_VSX_REGS + i][j]);
  127. printf("(expected)\n");
  128. }
  129. }
  130. }
  131. static int tm_signal_context_chk()
  132. {
  133. struct sigaction act;
  134. int i;
  135. long rc;
  136. pid_t pid = getpid();
  137. SKIP_IF(!have_htm());
  138. SKIP_IF(htm_is_synthetic());
  139. act.sa_sigaction = signal_usr1;
  140. sigemptyset(&act.sa_mask);
  141. act.sa_flags = SA_SIGINFO;
  142. if (sigaction(SIGUSR1, &act, NULL) < 0) {
  143. perror("sigaction sigusr1");
  144. exit(1);
  145. }
  146. i = 0;
  147. while (i < MAX_ATTEMPT && !broken) {
  148. /*
  149. * tm_signal_self_context_load will set both first and second
  150. * contexts accordingly to the values passed through non-NULL
  151. * array pointers to it, in that case 'vsxs', and invoke the
  152. * signal handler installed for SIGUSR1.
  153. */
  154. rc = tm_signal_self_context_load(pid, NULL, NULL, NULL, vsxs);
  155. FAIL_IF(rc != pid);
  156. i++;
  157. }
  158. return (broken);
  159. }
  160. int main(void)
  161. {
  162. return test_harness(tm_signal_context_chk, "tm_signal_context_chk_vsx");
  163. }