div0.c 3.8 KB

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  1. {
  2. "DIV32 by 0, zero check 1",
  3. .insns = {
  4. BPF_MOV32_IMM(BPF_REG_0, 42),
  5. BPF_MOV32_IMM(BPF_REG_1, 0),
  6. BPF_MOV32_IMM(BPF_REG_2, 1),
  7. BPF_ALU32_REG(BPF_DIV, BPF_REG_2, BPF_REG_1),
  8. BPF_EXIT_INSN(),
  9. },
  10. .result = ACCEPT,
  11. .retval = 42,
  12. },
  13. {
  14. "DIV32 by 0, zero check 2",
  15. .insns = {
  16. BPF_MOV32_IMM(BPF_REG_0, 42),
  17. BPF_LD_IMM64(BPF_REG_1, 0xffffffff00000000LL),
  18. BPF_MOV32_IMM(BPF_REG_2, 1),
  19. BPF_ALU32_REG(BPF_DIV, BPF_REG_2, BPF_REG_1),
  20. BPF_EXIT_INSN(),
  21. },
  22. .result = ACCEPT,
  23. .retval = 42,
  24. },
  25. {
  26. "DIV64 by 0, zero check",
  27. .insns = {
  28. BPF_MOV32_IMM(BPF_REG_0, 42),
  29. BPF_MOV32_IMM(BPF_REG_1, 0),
  30. BPF_MOV32_IMM(BPF_REG_2, 1),
  31. BPF_ALU64_REG(BPF_DIV, BPF_REG_2, BPF_REG_1),
  32. BPF_EXIT_INSN(),
  33. },
  34. .result = ACCEPT,
  35. .retval = 42,
  36. },
  37. {
  38. "MOD32 by 0, zero check 1",
  39. .insns = {
  40. BPF_MOV32_IMM(BPF_REG_0, 42),
  41. BPF_MOV32_IMM(BPF_REG_1, 0),
  42. BPF_MOV32_IMM(BPF_REG_2, 1),
  43. BPF_ALU32_REG(BPF_MOD, BPF_REG_2, BPF_REG_1),
  44. BPF_EXIT_INSN(),
  45. },
  46. .result = ACCEPT,
  47. .retval = 42,
  48. },
  49. {
  50. "MOD32 by 0, zero check 2",
  51. .insns = {
  52. BPF_MOV32_IMM(BPF_REG_0, 42),
  53. BPF_LD_IMM64(BPF_REG_1, 0xffffffff00000000LL),
  54. BPF_MOV32_IMM(BPF_REG_2, 1),
  55. BPF_ALU32_REG(BPF_MOD, BPF_REG_2, BPF_REG_1),
  56. BPF_EXIT_INSN(),
  57. },
  58. .result = ACCEPT,
  59. .retval = 42,
  60. },
  61. {
  62. "MOD64 by 0, zero check",
  63. .insns = {
  64. BPF_MOV32_IMM(BPF_REG_0, 42),
  65. BPF_MOV32_IMM(BPF_REG_1, 0),
  66. BPF_MOV32_IMM(BPF_REG_2, 1),
  67. BPF_ALU64_REG(BPF_MOD, BPF_REG_2, BPF_REG_1),
  68. BPF_EXIT_INSN(),
  69. },
  70. .result = ACCEPT,
  71. .retval = 42,
  72. },
  73. {
  74. "DIV32 by 0, zero check ok, cls",
  75. .insns = {
  76. BPF_MOV32_IMM(BPF_REG_0, 42),
  77. BPF_MOV32_IMM(BPF_REG_1, 2),
  78. BPF_MOV32_IMM(BPF_REG_2, 16),
  79. BPF_ALU32_REG(BPF_DIV, BPF_REG_2, BPF_REG_1),
  80. BPF_MOV64_REG(BPF_REG_0, BPF_REG_2),
  81. BPF_EXIT_INSN(),
  82. },
  83. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  84. .result = ACCEPT,
  85. .retval = 8,
  86. },
  87. {
  88. "DIV32 by 0, zero check 1, cls",
  89. .insns = {
  90. BPF_MOV32_IMM(BPF_REG_1, 0),
  91. BPF_MOV32_IMM(BPF_REG_0, 1),
  92. BPF_ALU32_REG(BPF_DIV, BPF_REG_0, BPF_REG_1),
  93. BPF_EXIT_INSN(),
  94. },
  95. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  96. .result = ACCEPT,
  97. .retval = 0,
  98. },
  99. {
  100. "DIV32 by 0, zero check 2, cls",
  101. .insns = {
  102. BPF_LD_IMM64(BPF_REG_1, 0xffffffff00000000LL),
  103. BPF_MOV32_IMM(BPF_REG_0, 1),
  104. BPF_ALU32_REG(BPF_DIV, BPF_REG_0, BPF_REG_1),
  105. BPF_EXIT_INSN(),
  106. },
  107. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  108. .result = ACCEPT,
  109. .retval = 0,
  110. },
  111. {
  112. "DIV64 by 0, zero check, cls",
  113. .insns = {
  114. BPF_MOV32_IMM(BPF_REG_1, 0),
  115. BPF_MOV32_IMM(BPF_REG_0, 1),
  116. BPF_ALU64_REG(BPF_DIV, BPF_REG_0, BPF_REG_1),
  117. BPF_EXIT_INSN(),
  118. },
  119. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  120. .result = ACCEPT,
  121. .retval = 0,
  122. },
  123. {
  124. "MOD32 by 0, zero check ok, cls",
  125. .insns = {
  126. BPF_MOV32_IMM(BPF_REG_0, 42),
  127. BPF_MOV32_IMM(BPF_REG_1, 3),
  128. BPF_MOV32_IMM(BPF_REG_2, 5),
  129. BPF_ALU32_REG(BPF_MOD, BPF_REG_2, BPF_REG_1),
  130. BPF_MOV64_REG(BPF_REG_0, BPF_REG_2),
  131. BPF_EXIT_INSN(),
  132. },
  133. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  134. .result = ACCEPT,
  135. .retval = 2,
  136. },
  137. {
  138. "MOD32 by 0, zero check 1, cls",
  139. .insns = {
  140. BPF_MOV32_IMM(BPF_REG_1, 0),
  141. BPF_MOV32_IMM(BPF_REG_0, 1),
  142. BPF_ALU32_REG(BPF_MOD, BPF_REG_0, BPF_REG_1),
  143. BPF_EXIT_INSN(),
  144. },
  145. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  146. .result = ACCEPT,
  147. .retval = 1,
  148. },
  149. {
  150. "MOD32 by 0, zero check 2, cls",
  151. .insns = {
  152. BPF_LD_IMM64(BPF_REG_1, 0xffffffff00000000LL),
  153. BPF_MOV32_IMM(BPF_REG_0, 1),
  154. BPF_ALU32_REG(BPF_MOD, BPF_REG_0, BPF_REG_1),
  155. BPF_EXIT_INSN(),
  156. },
  157. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  158. .result = ACCEPT,
  159. .retval = 1,
  160. },
  161. {
  162. "MOD64 by 0, zero check 1, cls",
  163. .insns = {
  164. BPF_MOV32_IMM(BPF_REG_1, 0),
  165. BPF_MOV32_IMM(BPF_REG_0, 2),
  166. BPF_ALU64_REG(BPF_MOD, BPF_REG_0, BPF_REG_1),
  167. BPF_EXIT_INSN(),
  168. },
  169. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  170. .result = ACCEPT,
  171. .retval = 2,
  172. },
  173. {
  174. "MOD64 by 0, zero check 2, cls",
  175. .insns = {
  176. BPF_MOV32_IMM(BPF_REG_1, 0),
  177. BPF_MOV32_IMM(BPF_REG_0, -1),
  178. BPF_ALU64_REG(BPF_MOD, BPF_REG_0, BPF_REG_1),
  179. BPF_EXIT_INSN(),
  180. },
  181. .prog_type = BPF_PROG_TYPE_SCHED_CLS,
  182. .result = ACCEPT,
  183. .retval = -1,
  184. },