ux500_msp_dai.h 1.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) ST-Ericsson SA 2012
  4. *
  5. * Author: Ola Lilja <[email protected]>,
  6. * Roger Nilsson <[email protected]>
  7. * for ST-Ericsson.
  8. */
  9. #ifndef UX500_msp_dai_H
  10. #define UX500_msp_dai_H
  11. #include <linux/types.h>
  12. #include <linux/spinlock.h>
  13. #include "ux500_msp_i2s.h"
  14. #define UX500_NBR_OF_DAI 4
  15. #define UX500_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | \
  16. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
  17. #define UX500_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
  18. #define FRAME_PER_SINGLE_SLOT_8_KHZ 31
  19. #define FRAME_PER_SINGLE_SLOT_16_KHZ 124
  20. #define FRAME_PER_SINGLE_SLOT_44_1_KHZ 63
  21. #define FRAME_PER_SINGLE_SLOT_48_KHZ 49
  22. #define FRAME_PER_2_SLOTS 31
  23. #define FRAME_PER_8_SLOTS 138
  24. #define FRAME_PER_16_SLOTS 277
  25. #define UX500_MSP_INTERNAL_CLOCK_FREQ 40000000
  26. #define UX500_MSP1_INTERNAL_CLOCK_FREQ UX500_MSP_INTERNAL_CLOCK_FREQ
  27. #define UX500_MSP_MIN_CHANNELS 1
  28. #define UX500_MSP_MAX_CHANNELS 8
  29. #define PLAYBACK_CONFIGURED 1
  30. #define CAPTURE_CONFIGURED 2
  31. enum ux500_msp_clock_id {
  32. UX500_MSP_MASTER_CLOCK,
  33. };
  34. struct ux500_msp_i2s_drvdata {
  35. struct ux500_msp *msp;
  36. struct regulator *reg_vape;
  37. unsigned int fmt;
  38. unsigned int tx_mask;
  39. unsigned int rx_mask;
  40. int slots;
  41. int slot_width;
  42. /* Clocks */
  43. unsigned int master_clk;
  44. struct clk *clk;
  45. struct clk *pclk;
  46. /* Regulators */
  47. int vape_opp_constraint;
  48. };
  49. int ux500_msp_dai_set_data_delay(struct snd_soc_dai *dai, int delay);
  50. #endif