ux500_msp_dai.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) ST-Ericsson SA 2012
  4. *
  5. * Author: Ola Lilja <[email protected]>,
  6. * Roger Nilsson <[email protected]>
  7. * for ST-Ericsson.
  8. */
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include <linux/bitops.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/clk.h>
  14. #include <linux/of.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/mfd/dbx500-prcmu.h>
  17. #include <linux/platform_data/asoc-ux500-msp.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dai.h>
  20. #include <sound/dmaengine_pcm.h>
  21. #include "ux500_msp_i2s.h"
  22. #include "ux500_msp_dai.h"
  23. #include "ux500_pcm.h"
  24. static int setup_pcm_multichan(struct snd_soc_dai *dai,
  25. struct ux500_msp_config *msp_config)
  26. {
  27. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  28. struct msp_multichannel_config *multi =
  29. &msp_config->multichannel_config;
  30. if (drvdata->slots > 1) {
  31. msp_config->multichannel_configured = 1;
  32. multi->tx_multichannel_enable = true;
  33. multi->rx_multichannel_enable = true;
  34. multi->rx_comparison_enable_mode = MSP_COMPARISON_DISABLED;
  35. multi->tx_channel_0_enable = drvdata->tx_mask;
  36. multi->tx_channel_1_enable = 0;
  37. multi->tx_channel_2_enable = 0;
  38. multi->tx_channel_3_enable = 0;
  39. multi->rx_channel_0_enable = drvdata->rx_mask;
  40. multi->rx_channel_1_enable = 0;
  41. multi->rx_channel_2_enable = 0;
  42. multi->rx_channel_3_enable = 0;
  43. dev_dbg(dai->dev,
  44. "%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
  45. __func__, drvdata->slots, multi->tx_channel_0_enable,
  46. multi->rx_channel_0_enable);
  47. }
  48. return 0;
  49. }
  50. static int setup_frameper(struct snd_soc_dai *dai, unsigned int rate,
  51. struct msp_protdesc *prot_desc)
  52. {
  53. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  54. switch (drvdata->slots) {
  55. case 1:
  56. switch (rate) {
  57. case 8000:
  58. prot_desc->frame_period =
  59. FRAME_PER_SINGLE_SLOT_8_KHZ;
  60. break;
  61. case 16000:
  62. prot_desc->frame_period =
  63. FRAME_PER_SINGLE_SLOT_16_KHZ;
  64. break;
  65. case 44100:
  66. prot_desc->frame_period =
  67. FRAME_PER_SINGLE_SLOT_44_1_KHZ;
  68. break;
  69. case 48000:
  70. prot_desc->frame_period =
  71. FRAME_PER_SINGLE_SLOT_48_KHZ;
  72. break;
  73. default:
  74. dev_err(dai->dev,
  75. "%s: Error: Unsupported sample-rate (freq = %d)!\n",
  76. __func__, rate);
  77. return -EINVAL;
  78. }
  79. break;
  80. case 2:
  81. prot_desc->frame_period = FRAME_PER_2_SLOTS;
  82. break;
  83. case 8:
  84. prot_desc->frame_period = FRAME_PER_8_SLOTS;
  85. break;
  86. case 16:
  87. prot_desc->frame_period = FRAME_PER_16_SLOTS;
  88. break;
  89. default:
  90. dev_err(dai->dev,
  91. "%s: Error: Unsupported slot-count (slots = %d)!\n",
  92. __func__, drvdata->slots);
  93. return -EINVAL;
  94. }
  95. prot_desc->clocks_per_frame =
  96. prot_desc->frame_period+1;
  97. dev_dbg(dai->dev, "%s: Clocks per frame: %u\n",
  98. __func__,
  99. prot_desc->clocks_per_frame);
  100. return 0;
  101. }
  102. static int setup_pcm_framing(struct snd_soc_dai *dai, unsigned int rate,
  103. struct msp_protdesc *prot_desc)
  104. {
  105. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  106. u32 frame_length = MSP_FRAME_LEN_1;
  107. prot_desc->frame_width = 0;
  108. switch (drvdata->slots) {
  109. case 1:
  110. frame_length = MSP_FRAME_LEN_1;
  111. break;
  112. case 2:
  113. frame_length = MSP_FRAME_LEN_2;
  114. break;
  115. case 8:
  116. frame_length = MSP_FRAME_LEN_8;
  117. break;
  118. case 16:
  119. frame_length = MSP_FRAME_LEN_16;
  120. break;
  121. default:
  122. dev_err(dai->dev,
  123. "%s: Error: Unsupported slot-count (slots = %d)!\n",
  124. __func__, drvdata->slots);
  125. return -EINVAL;
  126. }
  127. prot_desc->tx_frame_len_1 = frame_length;
  128. prot_desc->rx_frame_len_1 = frame_length;
  129. prot_desc->tx_frame_len_2 = frame_length;
  130. prot_desc->rx_frame_len_2 = frame_length;
  131. prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
  132. prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
  133. prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
  134. prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
  135. return setup_frameper(dai, rate, prot_desc);
  136. }
  137. static int setup_clocking(struct snd_soc_dai *dai,
  138. unsigned int fmt,
  139. struct ux500_msp_config *msp_config)
  140. {
  141. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  142. case SND_SOC_DAIFMT_NB_NF:
  143. break;
  144. case SND_SOC_DAIFMT_NB_IF:
  145. msp_config->tx_fsync_pol ^= 1 << TFSPOL_SHIFT;
  146. msp_config->rx_fsync_pol ^= 1 << RFSPOL_SHIFT;
  147. break;
  148. default:
  149. dev_err(dai->dev,
  150. "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
  151. __func__, fmt);
  152. return -EINVAL;
  153. }
  154. switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
  155. case SND_SOC_DAIFMT_BC_FC:
  156. dev_dbg(dai->dev, "%s: Codec is master.\n", __func__);
  157. msp_config->iodelay = 0x20;
  158. msp_config->rx_fsync_sel = 0;
  159. msp_config->tx_fsync_sel = 1 << TFSSEL_SHIFT;
  160. msp_config->tx_clk_sel = 0;
  161. msp_config->rx_clk_sel = 0;
  162. msp_config->srg_clk_sel = 0x2 << SCKSEL_SHIFT;
  163. break;
  164. case SND_SOC_DAIFMT_BP_FP:
  165. dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__);
  166. msp_config->tx_clk_sel = TX_CLK_SEL_SRG;
  167. msp_config->tx_fsync_sel = TX_SYNC_SRG_PROG;
  168. msp_config->rx_clk_sel = RX_CLK_SEL_SRG;
  169. msp_config->rx_fsync_sel = RX_SYNC_SRG;
  170. msp_config->srg_clk_sel = 1 << SCKSEL_SHIFT;
  171. break;
  172. default:
  173. dev_err(dai->dev, "%s: Error: Unsupported master (fmt = 0x%x)!\n",
  174. __func__, fmt);
  175. return -EINVAL;
  176. }
  177. return 0;
  178. }
  179. static int setup_pcm_protdesc(struct snd_soc_dai *dai,
  180. unsigned int fmt,
  181. struct msp_protdesc *prot_desc)
  182. {
  183. prot_desc->rx_phase_mode = MSP_SINGLE_PHASE;
  184. prot_desc->tx_phase_mode = MSP_SINGLE_PHASE;
  185. prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
  186. prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
  187. prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
  188. prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
  189. prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI);
  190. prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_HI << RFSPOL_SHIFT;
  191. if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_DSP_A) {
  192. dev_dbg(dai->dev, "%s: DSP_A.\n", __func__);
  193. prot_desc->rx_clk_pol = MSP_RISING_EDGE;
  194. prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
  195. prot_desc->rx_data_delay = MSP_DELAY_1;
  196. prot_desc->tx_data_delay = MSP_DELAY_1;
  197. } else {
  198. dev_dbg(dai->dev, "%s: DSP_B.\n", __func__);
  199. prot_desc->rx_clk_pol = MSP_FALLING_EDGE;
  200. prot_desc->tx_clk_pol = MSP_RISING_EDGE;
  201. prot_desc->rx_data_delay = MSP_DELAY_0;
  202. prot_desc->tx_data_delay = MSP_DELAY_0;
  203. }
  204. prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
  205. prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
  206. prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
  207. prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
  208. prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
  209. return 0;
  210. }
  211. static int setup_i2s_protdesc(struct msp_protdesc *prot_desc)
  212. {
  213. prot_desc->rx_phase_mode = MSP_DUAL_PHASE;
  214. prot_desc->tx_phase_mode = MSP_DUAL_PHASE;
  215. prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
  216. prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
  217. prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
  218. prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
  219. prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO);
  220. prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_LO << RFSPOL_SHIFT;
  221. prot_desc->rx_frame_len_1 = MSP_FRAME_LEN_1;
  222. prot_desc->rx_frame_len_2 = MSP_FRAME_LEN_1;
  223. prot_desc->tx_frame_len_1 = MSP_FRAME_LEN_1;
  224. prot_desc->tx_frame_len_2 = MSP_FRAME_LEN_1;
  225. prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
  226. prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
  227. prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
  228. prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
  229. prot_desc->rx_clk_pol = MSP_RISING_EDGE;
  230. prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
  231. prot_desc->rx_data_delay = MSP_DELAY_0;
  232. prot_desc->tx_data_delay = MSP_DELAY_0;
  233. prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
  234. prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
  235. prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
  236. prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
  237. prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
  238. return 0;
  239. }
  240. static int setup_msp_config(struct snd_pcm_substream *substream,
  241. struct snd_soc_dai *dai,
  242. struct ux500_msp_config *msp_config)
  243. {
  244. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  245. struct msp_protdesc *prot_desc = &msp_config->protdesc;
  246. struct snd_pcm_runtime *runtime = substream->runtime;
  247. unsigned int fmt = drvdata->fmt;
  248. int ret;
  249. memset(msp_config, 0, sizeof(*msp_config));
  250. msp_config->f_inputclk = drvdata->master_clk;
  251. msp_config->tx_fifo_config = TX_FIFO_ENABLE;
  252. msp_config->rx_fifo_config = RX_FIFO_ENABLE;
  253. msp_config->def_elem_len = 1;
  254. msp_config->direction = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  255. MSP_DIR_TX : MSP_DIR_RX;
  256. msp_config->data_size = MSP_DATA_BITS_32;
  257. msp_config->frame_freq = runtime->rate;
  258. dev_dbg(dai->dev, "%s: f_inputclk = %u, frame_freq = %u.\n",
  259. __func__, msp_config->f_inputclk, msp_config->frame_freq);
  260. /* To avoid division by zero */
  261. prot_desc->clocks_per_frame = 1;
  262. dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__,
  263. runtime->rate, runtime->channels);
  264. switch (fmt &
  265. (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
  266. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
  267. dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
  268. msp_config->default_protdesc = 1;
  269. msp_config->protocol = MSP_I2S_PROTOCOL;
  270. break;
  271. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
  272. dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
  273. msp_config->data_size = MSP_DATA_BITS_16;
  274. msp_config->protocol = MSP_I2S_PROTOCOL;
  275. ret = setup_i2s_protdesc(prot_desc);
  276. if (ret < 0)
  277. return ret;
  278. break;
  279. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
  280. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
  281. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
  282. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
  283. dev_dbg(dai->dev, "%s: PCM format.\n", __func__);
  284. msp_config->data_size = MSP_DATA_BITS_16;
  285. msp_config->protocol = MSP_PCM_PROTOCOL;
  286. ret = setup_pcm_protdesc(dai, fmt, prot_desc);
  287. if (ret < 0)
  288. return ret;
  289. ret = setup_pcm_multichan(dai, msp_config);
  290. if (ret < 0)
  291. return ret;
  292. ret = setup_pcm_framing(dai, runtime->rate, prot_desc);
  293. if (ret < 0)
  294. return ret;
  295. break;
  296. default:
  297. dev_err(dai->dev, "%s: Error: Unsupported format (%d)!\n",
  298. __func__, fmt);
  299. return -EINVAL;
  300. }
  301. return setup_clocking(dai, fmt, msp_config);
  302. }
  303. static int ux500_msp_dai_startup(struct snd_pcm_substream *substream,
  304. struct snd_soc_dai *dai)
  305. {
  306. int ret = 0;
  307. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  308. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
  309. snd_pcm_stream_str(substream));
  310. /* Enable regulator */
  311. ret = regulator_enable(drvdata->reg_vape);
  312. if (ret != 0) {
  313. dev_err(drvdata->msp->dev,
  314. "%s: Failed to enable regulator!\n", __func__);
  315. return ret;
  316. }
  317. /* Prepare and enable clocks */
  318. dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__);
  319. ret = clk_prepare_enable(drvdata->pclk);
  320. if (ret) {
  321. dev_err(drvdata->msp->dev,
  322. "%s: Failed to prepare/enable pclk!\n", __func__);
  323. goto err_pclk;
  324. }
  325. ret = clk_prepare_enable(drvdata->clk);
  326. if (ret) {
  327. dev_err(drvdata->msp->dev,
  328. "%s: Failed to prepare/enable clk!\n", __func__);
  329. goto err_clk;
  330. }
  331. return ret;
  332. err_clk:
  333. clk_disable_unprepare(drvdata->pclk);
  334. err_pclk:
  335. regulator_disable(drvdata->reg_vape);
  336. return ret;
  337. }
  338. static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream,
  339. struct snd_soc_dai *dai)
  340. {
  341. int ret;
  342. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  343. bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
  344. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
  345. snd_pcm_stream_str(substream));
  346. if (drvdata->vape_opp_constraint == 1) {
  347. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  348. "ux500_msp_i2s", 50);
  349. drvdata->vape_opp_constraint = 0;
  350. }
  351. if (ux500_msp_i2s_close(drvdata->msp,
  352. is_playback ? MSP_DIR_TX : MSP_DIR_RX)) {
  353. dev_err(dai->dev,
  354. "%s: Error: MSP %d (%s): Unable to close i2s.\n",
  355. __func__, dai->id, snd_pcm_stream_str(substream));
  356. }
  357. /* Disable and unprepare clocks */
  358. clk_disable_unprepare(drvdata->clk);
  359. clk_disable_unprepare(drvdata->pclk);
  360. /* Disable regulator */
  361. ret = regulator_disable(drvdata->reg_vape);
  362. if (ret < 0)
  363. dev_err(dai->dev,
  364. "%s: ERROR: Failed to disable regulator (%d)!\n",
  365. __func__, ret);
  366. }
  367. static int ux500_msp_dai_prepare(struct snd_pcm_substream *substream,
  368. struct snd_soc_dai *dai)
  369. {
  370. int ret = 0;
  371. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  372. struct snd_pcm_runtime *runtime = substream->runtime;
  373. struct ux500_msp_config msp_config;
  374. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__,
  375. dai->id, snd_pcm_stream_str(substream), runtime->rate);
  376. setup_msp_config(substream, dai, &msp_config);
  377. ret = ux500_msp_i2s_open(drvdata->msp, &msp_config);
  378. if (ret < 0) {
  379. dev_err(dai->dev, "%s: Error: msp_setup failed (ret = %d)!\n",
  380. __func__, ret);
  381. return ret;
  382. }
  383. /* Set OPP-level */
  384. if ((drvdata->fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) &&
  385. (drvdata->msp->f_bitclk > 19200000)) {
  386. /* If the bit-clock is higher than 19.2MHz, Vape should be
  387. * run in 100% OPP. Only when bit-clock is used (MSP master)
  388. */
  389. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  390. "ux500-msp-i2s", 100);
  391. drvdata->vape_opp_constraint = 1;
  392. } else {
  393. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  394. "ux500-msp-i2s", 50);
  395. drvdata->vape_opp_constraint = 0;
  396. }
  397. return ret;
  398. }
  399. static int ux500_msp_dai_hw_params(struct snd_pcm_substream *substream,
  400. struct snd_pcm_hw_params *params,
  401. struct snd_soc_dai *dai)
  402. {
  403. unsigned int mask, slots_active;
  404. struct snd_pcm_runtime *runtime = substream->runtime;
  405. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  406. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n",
  407. __func__, dai->id, snd_pcm_stream_str(substream));
  408. switch (drvdata->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  409. case SND_SOC_DAIFMT_I2S:
  410. snd_pcm_hw_constraint_minmax(runtime,
  411. SNDRV_PCM_HW_PARAM_CHANNELS,
  412. 1, 2);
  413. break;
  414. case SND_SOC_DAIFMT_DSP_B:
  415. case SND_SOC_DAIFMT_DSP_A:
  416. mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  417. drvdata->tx_mask :
  418. drvdata->rx_mask;
  419. slots_active = hweight32(mask);
  420. dev_dbg(dai->dev, "TDM-slots active: %d", slots_active);
  421. snd_pcm_hw_constraint_single(runtime,
  422. SNDRV_PCM_HW_PARAM_CHANNELS,
  423. slots_active);
  424. break;
  425. default:
  426. dev_err(dai->dev,
  427. "%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
  428. __func__, drvdata->fmt);
  429. return -EINVAL;
  430. }
  431. return 0;
  432. }
  433. static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai *dai,
  434. unsigned int fmt)
  435. {
  436. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  437. dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id);
  438. switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
  439. SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK)) {
  440. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BP_FP:
  441. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_BC_FC:
  442. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BP_FP:
  443. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_BC_FC:
  444. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BP_FP:
  445. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_BC_FC:
  446. break;
  447. default:
  448. dev_err(dai->dev,
  449. "%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
  450. __func__, drvdata->fmt);
  451. return -EINVAL;
  452. }
  453. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  454. case SND_SOC_DAIFMT_NB_NF:
  455. case SND_SOC_DAIFMT_NB_IF:
  456. case SND_SOC_DAIFMT_IB_IF:
  457. break;
  458. default:
  459. dev_err(dai->dev,
  460. "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
  461. __func__, drvdata->fmt);
  462. return -EINVAL;
  463. }
  464. drvdata->fmt = fmt;
  465. return 0;
  466. }
  467. static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai *dai,
  468. unsigned int tx_mask,
  469. unsigned int rx_mask,
  470. int slots, int slot_width)
  471. {
  472. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  473. unsigned int cap;
  474. switch (slots) {
  475. case 1:
  476. cap = 0x01;
  477. break;
  478. case 2:
  479. cap = 0x03;
  480. break;
  481. case 8:
  482. cap = 0xFF;
  483. break;
  484. case 16:
  485. cap = 0xFFFF;
  486. break;
  487. default:
  488. dev_err(dai->dev, "%s: Error: Unsupported slot-count (%d)!\n",
  489. __func__, slots);
  490. return -EINVAL;
  491. }
  492. drvdata->slots = slots;
  493. if (!(slot_width == 16)) {
  494. dev_err(dai->dev, "%s: Error: Unsupported slot-width (%d)!\n",
  495. __func__, slot_width);
  496. return -EINVAL;
  497. }
  498. drvdata->slot_width = slot_width;
  499. drvdata->tx_mask = tx_mask & cap;
  500. drvdata->rx_mask = rx_mask & cap;
  501. return 0;
  502. }
  503. static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai *dai,
  504. int clk_id, unsigned int freq, int dir)
  505. {
  506. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  507. dev_dbg(dai->dev, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
  508. __func__, dai->id, clk_id, freq);
  509. switch (clk_id) {
  510. case UX500_MSP_MASTER_CLOCK:
  511. drvdata->master_clk = freq;
  512. break;
  513. default:
  514. dev_err(dai->dev, "%s: MSP %d: Invalid clk-id (%d)!\n",
  515. __func__, dai->id, clk_id);
  516. return -EINVAL;
  517. }
  518. return 0;
  519. }
  520. static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream,
  521. int cmd, struct snd_soc_dai *dai)
  522. {
  523. int ret = 0;
  524. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  525. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
  526. __func__, dai->id, snd_pcm_stream_str(substream),
  527. (int)drvdata->msp->id, cmd);
  528. ret = ux500_msp_i2s_trigger(drvdata->msp, cmd, substream->stream);
  529. return ret;
  530. }
  531. static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
  532. {
  533. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  534. struct snd_dmaengine_dai_dma_data *playback_dma_data;
  535. struct snd_dmaengine_dai_dma_data *capture_dma_data;
  536. playback_dma_data = devm_kzalloc(dai->dev,
  537. sizeof(*playback_dma_data),
  538. GFP_KERNEL);
  539. if (!playback_dma_data)
  540. return -ENOMEM;
  541. capture_dma_data = devm_kzalloc(dai->dev,
  542. sizeof(*capture_dma_data),
  543. GFP_KERNEL);
  544. if (!capture_dma_data)
  545. return -ENOMEM;
  546. playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr;
  547. capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr;
  548. playback_dma_data->maxburst = 4;
  549. capture_dma_data->maxburst = 4;
  550. snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
  551. return 0;
  552. }
  553. static int ux500_msp_dai_probe(struct snd_soc_dai *dai)
  554. {
  555. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  556. struct msp_i2s_platform_data *pdata = dai->dev->platform_data;
  557. int ret;
  558. if (!pdata) {
  559. ret = ux500_msp_dai_of_probe(dai);
  560. return ret;
  561. }
  562. drvdata->msp->playback_dma_data.data_size = drvdata->slot_width;
  563. drvdata->msp->capture_dma_data.data_size = drvdata->slot_width;
  564. snd_soc_dai_init_dma_data(dai,
  565. &drvdata->msp->playback_dma_data,
  566. &drvdata->msp->capture_dma_data);
  567. return 0;
  568. }
  569. static const struct snd_soc_dai_ops ux500_msp_dai_ops[] = {
  570. {
  571. .set_sysclk = ux500_msp_dai_set_dai_sysclk,
  572. .set_fmt = ux500_msp_dai_set_dai_fmt,
  573. .set_tdm_slot = ux500_msp_dai_set_tdm_slot,
  574. .startup = ux500_msp_dai_startup,
  575. .shutdown = ux500_msp_dai_shutdown,
  576. .prepare = ux500_msp_dai_prepare,
  577. .trigger = ux500_msp_dai_trigger,
  578. .hw_params = ux500_msp_dai_hw_params,
  579. }
  580. };
  581. static struct snd_soc_dai_driver ux500_msp_dai_drv = {
  582. .probe = ux500_msp_dai_probe,
  583. .playback.channels_min = UX500_MSP_MIN_CHANNELS,
  584. .playback.channels_max = UX500_MSP_MAX_CHANNELS,
  585. .playback.rates = UX500_I2S_RATES,
  586. .playback.formats = UX500_I2S_FORMATS,
  587. .capture.channels_min = UX500_MSP_MIN_CHANNELS,
  588. .capture.channels_max = UX500_MSP_MAX_CHANNELS,
  589. .capture.rates = UX500_I2S_RATES,
  590. .capture.formats = UX500_I2S_FORMATS,
  591. .ops = ux500_msp_dai_ops,
  592. };
  593. static const struct snd_soc_component_driver ux500_msp_component = {
  594. .name = "ux500-msp",
  595. .legacy_dai_naming = 1,
  596. };
  597. static int ux500_msp_drv_probe(struct platform_device *pdev)
  598. {
  599. struct ux500_msp_i2s_drvdata *drvdata;
  600. struct msp_i2s_platform_data *pdata = pdev->dev.platform_data;
  601. struct device_node *np = pdev->dev.of_node;
  602. int ret = 0;
  603. if (!pdata && !np) {
  604. dev_err(&pdev->dev, "No platform data or Device Tree found\n");
  605. return -ENODEV;
  606. }
  607. drvdata = devm_kzalloc(&pdev->dev,
  608. sizeof(struct ux500_msp_i2s_drvdata),
  609. GFP_KERNEL);
  610. if (!drvdata)
  611. return -ENOMEM;
  612. drvdata->fmt = 0;
  613. drvdata->slots = 1;
  614. drvdata->tx_mask = 0x01;
  615. drvdata->rx_mask = 0x01;
  616. drvdata->slot_width = 16;
  617. drvdata->master_clk = MSP_INPUT_FREQ_APB;
  618. drvdata->reg_vape = devm_regulator_get(&pdev->dev, "v-ape");
  619. if (IS_ERR(drvdata->reg_vape)) {
  620. ret = (int)PTR_ERR(drvdata->reg_vape);
  621. dev_err(&pdev->dev,
  622. "%s: ERROR: Failed to get Vape supply (%d)!\n",
  623. __func__, ret);
  624. return ret;
  625. }
  626. prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50);
  627. drvdata->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
  628. if (IS_ERR(drvdata->pclk)) {
  629. ret = (int)PTR_ERR(drvdata->pclk);
  630. dev_err(&pdev->dev,
  631. "%s: ERROR: devm_clk_get of pclk failed (%d)!\n",
  632. __func__, ret);
  633. return ret;
  634. }
  635. drvdata->clk = devm_clk_get(&pdev->dev, NULL);
  636. if (IS_ERR(drvdata->clk)) {
  637. ret = (int)PTR_ERR(drvdata->clk);
  638. dev_err(&pdev->dev,
  639. "%s: ERROR: devm_clk_get failed (%d)!\n",
  640. __func__, ret);
  641. return ret;
  642. }
  643. ret = ux500_msp_i2s_init_msp(pdev, &drvdata->msp,
  644. pdev->dev.platform_data);
  645. if (!drvdata->msp) {
  646. dev_err(&pdev->dev,
  647. "%s: ERROR: Failed to init MSP-struct (%d)!",
  648. __func__, ret);
  649. return ret;
  650. }
  651. dev_set_drvdata(&pdev->dev, drvdata);
  652. ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component,
  653. &ux500_msp_dai_drv, 1);
  654. if (ret < 0) {
  655. dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n",
  656. __func__, drvdata->msp->id);
  657. return ret;
  658. }
  659. ret = ux500_pcm_register_platform(pdev);
  660. if (ret < 0) {
  661. dev_err(&pdev->dev,
  662. "Error: %s: Failed to register PCM platform device!\n",
  663. __func__);
  664. goto err_reg_plat;
  665. }
  666. return 0;
  667. err_reg_plat:
  668. snd_soc_unregister_component(&pdev->dev);
  669. return ret;
  670. }
  671. static int ux500_msp_drv_remove(struct platform_device *pdev)
  672. {
  673. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
  674. ux500_pcm_unregister_platform(pdev);
  675. snd_soc_unregister_component(&pdev->dev);
  676. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s");
  677. ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp);
  678. return 0;
  679. }
  680. static const struct of_device_id ux500_msp_i2s_match[] = {
  681. { .compatible = "stericsson,ux500-msp-i2s", },
  682. {},
  683. };
  684. MODULE_DEVICE_TABLE(of, ux500_msp_i2s_match);
  685. static struct platform_driver msp_i2s_driver = {
  686. .driver = {
  687. .name = "ux500-msp-i2s",
  688. .of_match_table = ux500_msp_i2s_match,
  689. },
  690. .probe = ux500_msp_drv_probe,
  691. .remove = ux500_msp_drv_remove,
  692. };
  693. module_platform_driver(msp_i2s_driver);
  694. MODULE_LICENSE("GPL v2");