dma-sh7760.c 9.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // SH7760 ("camelot") DMABRG audio DMA unit support
  4. //
  5. // Copyright (C) 2007 Manuel Lauss <[email protected]>
  6. //
  7. // The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which
  8. // trigger an interrupt when one half of the programmed transfer size
  9. // has been xmitted.
  10. //
  11. // FIXME: little-endian only for now
  12. #include <linux/module.h>
  13. #include <linux/gfp.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/dma-mapping.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include <asm/dmabrg.h>
  22. /* registers and bits */
  23. #define BRGATXSAR 0x00
  24. #define BRGARXDAR 0x04
  25. #define BRGATXTCR 0x08
  26. #define BRGARXTCR 0x0C
  27. #define BRGACR 0x10
  28. #define BRGATXTCNT 0x14
  29. #define BRGARXTCNT 0x18
  30. #define ACR_RAR (1 << 18)
  31. #define ACR_RDS (1 << 17)
  32. #define ACR_RDE (1 << 16)
  33. #define ACR_TAR (1 << 2)
  34. #define ACR_TDS (1 << 1)
  35. #define ACR_TDE (1 << 0)
  36. /* receiver/transmitter data alignment */
  37. #define ACR_RAM_NONE (0 << 24)
  38. #define ACR_RAM_4BYTE (1 << 24)
  39. #define ACR_RAM_2WORD (2 << 24)
  40. #define ACR_TAM_NONE (0 << 8)
  41. #define ACR_TAM_4BYTE (1 << 8)
  42. #define ACR_TAM_2WORD (2 << 8)
  43. struct camelot_pcm {
  44. unsigned long mmio; /* DMABRG audio channel control reg MMIO */
  45. unsigned int txid; /* ID of first DMABRG IRQ for this unit */
  46. struct snd_pcm_substream *tx_ss;
  47. unsigned long tx_period_size;
  48. unsigned int tx_period;
  49. struct snd_pcm_substream *rx_ss;
  50. unsigned long rx_period_size;
  51. unsigned int rx_period;
  52. } cam_pcm_data[2] = {
  53. {
  54. .mmio = 0xFE3C0040,
  55. .txid = DMABRGIRQ_A0TXF,
  56. },
  57. {
  58. .mmio = 0xFE3C0060,
  59. .txid = DMABRGIRQ_A1TXF,
  60. },
  61. };
  62. #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x)))
  63. /*
  64. * set a minimum of 16kb per period, to avoid interrupt-"storm" and
  65. * resulting skipping. In general, the bigger the minimum size, the
  66. * better for overall system performance. (The SH7760 is a puny CPU
  67. * with a slow SDRAM interface and poor internal bus bandwidth,
  68. * *especially* when the LCDC is active). The minimum for the DMAC
  69. * is 8 bytes; 16kbytes are enough to get skip-free playback of a
  70. * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain
  71. * reasonable responsiveness in MPlayer.
  72. */
  73. #define DMABRG_PERIOD_MIN 16 * 1024
  74. #define DMABRG_PERIOD_MAX 0x03fffffc
  75. #define DMABRG_PREALLOC_BUFFER 32 * 1024
  76. #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024
  77. static const struct snd_pcm_hardware camelot_pcm_hardware = {
  78. .info = (SNDRV_PCM_INFO_MMAP |
  79. SNDRV_PCM_INFO_INTERLEAVED |
  80. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  81. SNDRV_PCM_INFO_MMAP_VALID |
  82. SNDRV_PCM_INFO_BATCH),
  83. .buffer_bytes_max = DMABRG_PERIOD_MAX,
  84. .period_bytes_min = DMABRG_PERIOD_MIN,
  85. .period_bytes_max = DMABRG_PERIOD_MAX / 2,
  86. .periods_min = 2,
  87. .periods_max = 2,
  88. .fifo_size = 128,
  89. };
  90. static void camelot_txdma(void *data)
  91. {
  92. struct camelot_pcm *cam = data;
  93. cam->tx_period ^= 1;
  94. snd_pcm_period_elapsed(cam->tx_ss);
  95. }
  96. static void camelot_rxdma(void *data)
  97. {
  98. struct camelot_pcm *cam = data;
  99. cam->rx_period ^= 1;
  100. snd_pcm_period_elapsed(cam->rx_ss);
  101. }
  102. static int camelot_pcm_open(struct snd_soc_component *component,
  103. struct snd_pcm_substream *substream)
  104. {
  105. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  106. struct camelot_pcm *cam = &cam_pcm_data[asoc_rtd_to_cpu(rtd, 0)->id];
  107. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  108. int ret, dmairq;
  109. snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware);
  110. /* DMABRG buffer half/full events */
  111. dmairq = (recv) ? cam->txid + 2 : cam->txid;
  112. if (recv) {
  113. cam->rx_ss = substream;
  114. ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam);
  115. if (unlikely(ret)) {
  116. pr_debug("audio unit %d irqs already taken!\n",
  117. asoc_rtd_to_cpu(rtd, 0)->id);
  118. return -EBUSY;
  119. }
  120. (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam);
  121. } else {
  122. cam->tx_ss = substream;
  123. ret = dmabrg_request_irq(dmairq, camelot_txdma, cam);
  124. if (unlikely(ret)) {
  125. pr_debug("audio unit %d irqs already taken!\n",
  126. asoc_rtd_to_cpu(rtd, 0)->id);
  127. return -EBUSY;
  128. }
  129. (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam);
  130. }
  131. return 0;
  132. }
  133. static int camelot_pcm_close(struct snd_soc_component *component,
  134. struct snd_pcm_substream *substream)
  135. {
  136. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  137. struct camelot_pcm *cam = &cam_pcm_data[asoc_rtd_to_cpu(rtd, 0)->id];
  138. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  139. int dmairq;
  140. dmairq = (recv) ? cam->txid + 2 : cam->txid;
  141. if (recv)
  142. cam->rx_ss = NULL;
  143. else
  144. cam->tx_ss = NULL;
  145. dmabrg_free_irq(dmairq + 1);
  146. dmabrg_free_irq(dmairq);
  147. return 0;
  148. }
  149. static int camelot_hw_params(struct snd_soc_component *component,
  150. struct snd_pcm_substream *substream,
  151. struct snd_pcm_hw_params *hw_params)
  152. {
  153. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  154. struct camelot_pcm *cam = &cam_pcm_data[asoc_rtd_to_cpu(rtd, 0)->id];
  155. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  156. if (recv) {
  157. cam->rx_period_size = params_period_bytes(hw_params);
  158. cam->rx_period = 0;
  159. } else {
  160. cam->tx_period_size = params_period_bytes(hw_params);
  161. cam->tx_period = 0;
  162. }
  163. return 0;
  164. }
  165. static int camelot_prepare(struct snd_soc_component *component,
  166. struct snd_pcm_substream *substream)
  167. {
  168. struct snd_pcm_runtime *runtime = substream->runtime;
  169. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  170. struct camelot_pcm *cam = &cam_pcm_data[asoc_rtd_to_cpu(rtd, 0)->id];
  171. pr_debug("PCM data: addr 0x%08lx len %d\n",
  172. (u32)runtime->dma_addr, runtime->dma_bytes);
  173. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  174. BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area;
  175. BRGREG(BRGATXTCR) = runtime->dma_bytes;
  176. } else {
  177. BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area;
  178. BRGREG(BRGARXTCR) = runtime->dma_bytes;
  179. }
  180. return 0;
  181. }
  182. static inline void dmabrg_play_dma_start(struct camelot_pcm *cam)
  183. {
  184. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  185. /* start DMABRG engine: XFER start, auto-addr-reload */
  186. BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD;
  187. }
  188. static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam)
  189. {
  190. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  191. /* forcibly terminate data transmission */
  192. BRGREG(BRGACR) = acr | ACR_TDS;
  193. }
  194. static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam)
  195. {
  196. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  197. /* start DMABRG engine: recv start, auto-reload */
  198. BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD;
  199. }
  200. static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam)
  201. {
  202. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  203. /* forcibly terminate data receiver */
  204. BRGREG(BRGACR) = acr | ACR_RDS;
  205. }
  206. static int camelot_trigger(struct snd_soc_component *component,
  207. struct snd_pcm_substream *substream, int cmd)
  208. {
  209. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  210. struct camelot_pcm *cam = &cam_pcm_data[asoc_rtd_to_cpu(rtd, 0)->id];
  211. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  212. switch (cmd) {
  213. case SNDRV_PCM_TRIGGER_START:
  214. if (recv)
  215. dmabrg_rec_dma_start(cam);
  216. else
  217. dmabrg_play_dma_start(cam);
  218. break;
  219. case SNDRV_PCM_TRIGGER_STOP:
  220. if (recv)
  221. dmabrg_rec_dma_stop(cam);
  222. else
  223. dmabrg_play_dma_stop(cam);
  224. break;
  225. default:
  226. return -EINVAL;
  227. }
  228. return 0;
  229. }
  230. static snd_pcm_uframes_t camelot_pos(struct snd_soc_component *component,
  231. struct snd_pcm_substream *substream)
  232. {
  233. struct snd_pcm_runtime *runtime = substream->runtime;
  234. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  235. struct camelot_pcm *cam = &cam_pcm_data[asoc_rtd_to_cpu(rtd, 0)->id];
  236. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  237. unsigned long pos;
  238. /* cannot use the DMABRG pointer register: under load, by the
  239. * time ALSA comes around to read the register, it is already
  240. * far ahead (or worse, already done with the fragment) of the
  241. * position at the time the IRQ was triggered, which results in
  242. * fast-playback sound in my test application (ScummVM)
  243. */
  244. if (recv)
  245. pos = cam->rx_period ? cam->rx_period_size : 0;
  246. else
  247. pos = cam->tx_period ? cam->tx_period_size : 0;
  248. return bytes_to_frames(runtime, pos);
  249. }
  250. static int camelot_pcm_new(struct snd_soc_component *component,
  251. struct snd_soc_pcm_runtime *rtd)
  252. {
  253. struct snd_pcm *pcm = rtd->pcm;
  254. /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
  255. * in MMAP mode (i.e. aplay -M)
  256. */
  257. snd_pcm_set_managed_buffer_all(pcm,
  258. SNDRV_DMA_TYPE_CONTINUOUS,
  259. NULL,
  260. DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX);
  261. return 0;
  262. }
  263. static const struct snd_soc_component_driver sh7760_soc_component = {
  264. .open = camelot_pcm_open,
  265. .close = camelot_pcm_close,
  266. .hw_params = camelot_hw_params,
  267. .prepare = camelot_prepare,
  268. .trigger = camelot_trigger,
  269. .pointer = camelot_pos,
  270. .pcm_construct = camelot_pcm_new,
  271. };
  272. static int sh7760_soc_platform_probe(struct platform_device *pdev)
  273. {
  274. return devm_snd_soc_register_component(&pdev->dev, &sh7760_soc_component,
  275. NULL, 0);
  276. }
  277. static struct platform_driver sh7760_pcm_driver = {
  278. .driver = {
  279. .name = "sh7760-pcm-audio",
  280. },
  281. .probe = sh7760_soc_platform_probe,
  282. };
  283. module_platform_driver(sh7760_pcm_driver);
  284. MODULE_LICENSE("GPL v2");
  285. MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver");
  286. MODULE_AUTHOR("Manuel Lauss <[email protected]>");