spdif.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // ALSA SoC Audio Layer - Samsung S/PDIF Controller driver
  4. //
  5. // Copyright (c) 2010 Samsung Electronics Co. Ltd
  6. // http://www.samsung.com/
  7. #include <linux/clk.h>
  8. #include <linux/io.h>
  9. #include <linux/module.h>
  10. #include <sound/soc.h>
  11. #include <sound/pcm_params.h>
  12. #include <linux/platform_data/asoc-s3c.h>
  13. #include "dma.h"
  14. #include "spdif.h"
  15. /* Registers */
  16. #define CLKCON 0x00
  17. #define CON 0x04
  18. #define BSTAS 0x08
  19. #define CSTAS 0x0C
  20. #define DATA_OUTBUF 0x10
  21. #define DCNT 0x14
  22. #define BSTAS_S 0x18
  23. #define DCNT_S 0x1C
  24. #define CLKCTL_MASK 0x7
  25. #define CLKCTL_MCLK_EXT (0x1 << 2)
  26. #define CLKCTL_PWR_ON (0x1 << 0)
  27. #define CON_MASK 0x3ffffff
  28. #define CON_FIFO_TH_SHIFT 19
  29. #define CON_FIFO_TH_MASK (0x7 << 19)
  30. #define CON_USERDATA_23RDBIT (0x1 << 12)
  31. #define CON_SW_RESET (0x1 << 5)
  32. #define CON_MCLKDIV_MASK (0x3 << 3)
  33. #define CON_MCLKDIV_256FS (0x0 << 3)
  34. #define CON_MCLKDIV_384FS (0x1 << 3)
  35. #define CON_MCLKDIV_512FS (0x2 << 3)
  36. #define CON_PCM_MASK (0x3 << 1)
  37. #define CON_PCM_16BIT (0x0 << 1)
  38. #define CON_PCM_20BIT (0x1 << 1)
  39. #define CON_PCM_24BIT (0x2 << 1)
  40. #define CON_PCM_DATA (0x1 << 0)
  41. #define CSTAS_MASK 0x3fffffff
  42. #define CSTAS_SAMP_FREQ_MASK (0xF << 24)
  43. #define CSTAS_SAMP_FREQ_44 (0x0 << 24)
  44. #define CSTAS_SAMP_FREQ_48 (0x2 << 24)
  45. #define CSTAS_SAMP_FREQ_32 (0x3 << 24)
  46. #define CSTAS_SAMP_FREQ_96 (0xA << 24)
  47. #define CSTAS_CATEGORY_MASK (0xFF << 8)
  48. #define CSTAS_CATEGORY_CODE_CDP (0x01 << 8)
  49. #define CSTAS_NO_COPYRIGHT (0x1 << 2)
  50. /**
  51. * struct samsung_spdif_info - Samsung S/PDIF Controller information
  52. * @lock: Spin lock for S/PDIF.
  53. * @dev: The parent device passed to use from the probe.
  54. * @regs: The pointer to the device register block.
  55. * @clk_rate: Current clock rate for calcurate ratio.
  56. * @pclk: The peri-clock pointer for spdif master operation.
  57. * @sclk: The source clock pointer for making sync signals.
  58. * @saved_clkcon: Backup clkcon reg. in suspend.
  59. * @saved_con: Backup con reg. in suspend.
  60. * @saved_cstas: Backup cstas reg. in suspend.
  61. * @dma_playback: DMA information for playback channel.
  62. */
  63. struct samsung_spdif_info {
  64. spinlock_t lock;
  65. struct device *dev;
  66. void __iomem *regs;
  67. unsigned long clk_rate;
  68. struct clk *pclk;
  69. struct clk *sclk;
  70. u32 saved_clkcon;
  71. u32 saved_con;
  72. u32 saved_cstas;
  73. struct snd_dmaengine_dai_dma_data *dma_playback;
  74. };
  75. static struct snd_dmaengine_dai_dma_data spdif_stereo_out;
  76. static struct samsung_spdif_info spdif_info;
  77. static inline struct samsung_spdif_info
  78. *component_to_info(struct snd_soc_component *component)
  79. {
  80. return snd_soc_component_get_drvdata(component);
  81. }
  82. static inline struct samsung_spdif_info *to_info(struct snd_soc_dai *cpu_dai)
  83. {
  84. return snd_soc_dai_get_drvdata(cpu_dai);
  85. }
  86. static void spdif_snd_txctrl(struct samsung_spdif_info *spdif, int on)
  87. {
  88. void __iomem *regs = spdif->regs;
  89. u32 clkcon;
  90. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  91. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  92. if (on)
  93. writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON);
  94. else
  95. writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
  96. }
  97. static int spdif_set_sysclk(struct snd_soc_dai *cpu_dai,
  98. int clk_id, unsigned int freq, int dir)
  99. {
  100. struct samsung_spdif_info *spdif = to_info(cpu_dai);
  101. u32 clkcon;
  102. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  103. clkcon = readl(spdif->regs + CLKCON);
  104. if (clk_id == SND_SOC_SPDIF_INT_MCLK)
  105. clkcon &= ~CLKCTL_MCLK_EXT;
  106. else
  107. clkcon |= CLKCTL_MCLK_EXT;
  108. writel(clkcon, spdif->regs + CLKCON);
  109. spdif->clk_rate = freq;
  110. return 0;
  111. }
  112. static int spdif_trigger(struct snd_pcm_substream *substream, int cmd,
  113. struct snd_soc_dai *dai)
  114. {
  115. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  116. struct samsung_spdif_info *spdif = to_info(asoc_rtd_to_cpu(rtd, 0));
  117. unsigned long flags;
  118. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  119. switch (cmd) {
  120. case SNDRV_PCM_TRIGGER_START:
  121. case SNDRV_PCM_TRIGGER_RESUME:
  122. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  123. spin_lock_irqsave(&spdif->lock, flags);
  124. spdif_snd_txctrl(spdif, 1);
  125. spin_unlock_irqrestore(&spdif->lock, flags);
  126. break;
  127. case SNDRV_PCM_TRIGGER_STOP:
  128. case SNDRV_PCM_TRIGGER_SUSPEND:
  129. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  130. spin_lock_irqsave(&spdif->lock, flags);
  131. spdif_snd_txctrl(spdif, 0);
  132. spin_unlock_irqrestore(&spdif->lock, flags);
  133. break;
  134. default:
  135. return -EINVAL;
  136. }
  137. return 0;
  138. }
  139. static int spdif_sysclk_ratios[] = {
  140. 512, 384, 256,
  141. };
  142. static int spdif_hw_params(struct snd_pcm_substream *substream,
  143. struct snd_pcm_hw_params *params,
  144. struct snd_soc_dai *socdai)
  145. {
  146. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  147. struct samsung_spdif_info *spdif = to_info(asoc_rtd_to_cpu(rtd, 0));
  148. void __iomem *regs = spdif->regs;
  149. struct snd_dmaengine_dai_dma_data *dma_data;
  150. u32 con, clkcon, cstas;
  151. unsigned long flags;
  152. int i, ratio;
  153. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  154. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  155. dma_data = spdif->dma_playback;
  156. else {
  157. dev_err(spdif->dev, "Capture is not supported\n");
  158. return -EINVAL;
  159. }
  160. snd_soc_dai_set_dma_data(asoc_rtd_to_cpu(rtd, 0), substream, dma_data);
  161. spin_lock_irqsave(&spdif->lock, flags);
  162. con = readl(regs + CON) & CON_MASK;
  163. cstas = readl(regs + CSTAS) & CSTAS_MASK;
  164. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  165. con &= ~CON_FIFO_TH_MASK;
  166. con |= (0x7 << CON_FIFO_TH_SHIFT);
  167. con |= CON_USERDATA_23RDBIT;
  168. con |= CON_PCM_DATA;
  169. con &= ~CON_PCM_MASK;
  170. switch (params_width(params)) {
  171. case 16:
  172. con |= CON_PCM_16BIT;
  173. break;
  174. default:
  175. dev_err(spdif->dev, "Unsupported data size.\n");
  176. goto err;
  177. }
  178. ratio = spdif->clk_rate / params_rate(params);
  179. for (i = 0; i < ARRAY_SIZE(spdif_sysclk_ratios); i++)
  180. if (ratio == spdif_sysclk_ratios[i])
  181. break;
  182. if (i == ARRAY_SIZE(spdif_sysclk_ratios)) {
  183. dev_err(spdif->dev, "Invalid clock ratio %ld/%d\n",
  184. spdif->clk_rate, params_rate(params));
  185. goto err;
  186. }
  187. con &= ~CON_MCLKDIV_MASK;
  188. switch (ratio) {
  189. case 256:
  190. con |= CON_MCLKDIV_256FS;
  191. break;
  192. case 384:
  193. con |= CON_MCLKDIV_384FS;
  194. break;
  195. case 512:
  196. con |= CON_MCLKDIV_512FS;
  197. break;
  198. }
  199. cstas &= ~CSTAS_SAMP_FREQ_MASK;
  200. switch (params_rate(params)) {
  201. case 44100:
  202. cstas |= CSTAS_SAMP_FREQ_44;
  203. break;
  204. case 48000:
  205. cstas |= CSTAS_SAMP_FREQ_48;
  206. break;
  207. case 32000:
  208. cstas |= CSTAS_SAMP_FREQ_32;
  209. break;
  210. case 96000:
  211. cstas |= CSTAS_SAMP_FREQ_96;
  212. break;
  213. default:
  214. dev_err(spdif->dev, "Invalid sampling rate %d\n",
  215. params_rate(params));
  216. goto err;
  217. }
  218. cstas &= ~CSTAS_CATEGORY_MASK;
  219. cstas |= CSTAS_CATEGORY_CODE_CDP;
  220. cstas |= CSTAS_NO_COPYRIGHT;
  221. writel(con, regs + CON);
  222. writel(cstas, regs + CSTAS);
  223. writel(clkcon, regs + CLKCON);
  224. spin_unlock_irqrestore(&spdif->lock, flags);
  225. return 0;
  226. err:
  227. spin_unlock_irqrestore(&spdif->lock, flags);
  228. return -EINVAL;
  229. }
  230. static void spdif_shutdown(struct snd_pcm_substream *substream,
  231. struct snd_soc_dai *dai)
  232. {
  233. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  234. struct samsung_spdif_info *spdif = to_info(asoc_rtd_to_cpu(rtd, 0));
  235. void __iomem *regs = spdif->regs;
  236. u32 con, clkcon;
  237. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  238. con = readl(regs + CON) & CON_MASK;
  239. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  240. writel(con | CON_SW_RESET, regs + CON);
  241. cpu_relax();
  242. writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
  243. }
  244. #ifdef CONFIG_PM
  245. static int spdif_suspend(struct snd_soc_component *component)
  246. {
  247. struct samsung_spdif_info *spdif = component_to_info(component);
  248. u32 con = spdif->saved_con;
  249. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  250. spdif->saved_clkcon = readl(spdif->regs + CLKCON) & CLKCTL_MASK;
  251. spdif->saved_con = readl(spdif->regs + CON) & CON_MASK;
  252. spdif->saved_cstas = readl(spdif->regs + CSTAS) & CSTAS_MASK;
  253. writel(con | CON_SW_RESET, spdif->regs + CON);
  254. cpu_relax();
  255. return 0;
  256. }
  257. static int spdif_resume(struct snd_soc_component *component)
  258. {
  259. struct samsung_spdif_info *spdif = component_to_info(component);
  260. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  261. writel(spdif->saved_clkcon, spdif->regs + CLKCON);
  262. writel(spdif->saved_con, spdif->regs + CON);
  263. writel(spdif->saved_cstas, spdif->regs + CSTAS);
  264. return 0;
  265. }
  266. #else
  267. #define spdif_suspend NULL
  268. #define spdif_resume NULL
  269. #endif
  270. static const struct snd_soc_dai_ops spdif_dai_ops = {
  271. .set_sysclk = spdif_set_sysclk,
  272. .trigger = spdif_trigger,
  273. .hw_params = spdif_hw_params,
  274. .shutdown = spdif_shutdown,
  275. };
  276. static struct snd_soc_dai_driver samsung_spdif_dai = {
  277. .name = "samsung-spdif",
  278. .playback = {
  279. .stream_name = "S/PDIF Playback",
  280. .channels_min = 2,
  281. .channels_max = 2,
  282. .rates = (SNDRV_PCM_RATE_32000 |
  283. SNDRV_PCM_RATE_44100 |
  284. SNDRV_PCM_RATE_48000 |
  285. SNDRV_PCM_RATE_96000),
  286. .formats = SNDRV_PCM_FMTBIT_S16_LE, },
  287. .ops = &spdif_dai_ops,
  288. };
  289. static const struct snd_soc_component_driver samsung_spdif_component = {
  290. .name = "samsung-spdif",
  291. .suspend = spdif_suspend,
  292. .resume = spdif_resume,
  293. .legacy_dai_naming = 1,
  294. };
  295. static int spdif_probe(struct platform_device *pdev)
  296. {
  297. struct s3c_audio_pdata *spdif_pdata;
  298. struct resource *mem_res;
  299. struct samsung_spdif_info *spdif;
  300. dma_filter_fn filter;
  301. int ret;
  302. spdif_pdata = pdev->dev.platform_data;
  303. dev_dbg(&pdev->dev, "Entered %s\n", __func__);
  304. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  305. if (!mem_res) {
  306. dev_err(&pdev->dev, "Unable to get register resource.\n");
  307. return -ENXIO;
  308. }
  309. if (spdif_pdata && spdif_pdata->cfg_gpio
  310. && spdif_pdata->cfg_gpio(pdev)) {
  311. dev_err(&pdev->dev, "Unable to configure GPIO pins\n");
  312. return -EINVAL;
  313. }
  314. spdif = &spdif_info;
  315. spdif->dev = &pdev->dev;
  316. spin_lock_init(&spdif->lock);
  317. spdif->pclk = devm_clk_get(&pdev->dev, "spdif");
  318. if (IS_ERR(spdif->pclk)) {
  319. dev_err(&pdev->dev, "failed to get peri-clock\n");
  320. ret = -ENOENT;
  321. goto err0;
  322. }
  323. ret = clk_prepare_enable(spdif->pclk);
  324. if (ret)
  325. goto err0;
  326. spdif->sclk = devm_clk_get(&pdev->dev, "sclk_spdif");
  327. if (IS_ERR(spdif->sclk)) {
  328. dev_err(&pdev->dev, "failed to get internal source clock\n");
  329. ret = -ENOENT;
  330. goto err1;
  331. }
  332. ret = clk_prepare_enable(spdif->sclk);
  333. if (ret)
  334. goto err1;
  335. /* Request S/PDIF Register's memory region */
  336. if (!request_mem_region(mem_res->start,
  337. resource_size(mem_res), "samsung-spdif")) {
  338. dev_err(&pdev->dev, "Unable to request register region\n");
  339. ret = -EBUSY;
  340. goto err2;
  341. }
  342. spdif->regs = ioremap(mem_res->start, 0x100);
  343. if (spdif->regs == NULL) {
  344. dev_err(&pdev->dev, "Cannot ioremap registers\n");
  345. ret = -ENXIO;
  346. goto err3;
  347. }
  348. spdif_stereo_out.addr_width = 2;
  349. spdif_stereo_out.addr = mem_res->start + DATA_OUTBUF;
  350. filter = NULL;
  351. if (spdif_pdata) {
  352. spdif_stereo_out.filter_data = spdif_pdata->dma_playback;
  353. filter = spdif_pdata->dma_filter;
  354. }
  355. spdif->dma_playback = &spdif_stereo_out;
  356. ret = samsung_asoc_dma_platform_register(&pdev->dev, filter,
  357. NULL, NULL, NULL);
  358. if (ret) {
  359. dev_err(&pdev->dev, "failed to register DMA: %d\n", ret);
  360. goto err4;
  361. }
  362. dev_set_drvdata(&pdev->dev, spdif);
  363. ret = devm_snd_soc_register_component(&pdev->dev,
  364. &samsung_spdif_component, &samsung_spdif_dai, 1);
  365. if (ret != 0) {
  366. dev_err(&pdev->dev, "fail to register dai\n");
  367. goto err4;
  368. }
  369. return 0;
  370. err4:
  371. iounmap(spdif->regs);
  372. err3:
  373. release_mem_region(mem_res->start, resource_size(mem_res));
  374. err2:
  375. clk_disable_unprepare(spdif->sclk);
  376. err1:
  377. clk_disable_unprepare(spdif->pclk);
  378. err0:
  379. return ret;
  380. }
  381. static int spdif_remove(struct platform_device *pdev)
  382. {
  383. struct samsung_spdif_info *spdif = &spdif_info;
  384. struct resource *mem_res;
  385. iounmap(spdif->regs);
  386. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  387. release_mem_region(mem_res->start, resource_size(mem_res));
  388. clk_disable_unprepare(spdif->sclk);
  389. clk_disable_unprepare(spdif->pclk);
  390. return 0;
  391. }
  392. static struct platform_driver samsung_spdif_driver = {
  393. .probe = spdif_probe,
  394. .remove = spdif_remove,
  395. .driver = {
  396. .name = "samsung-spdif",
  397. },
  398. };
  399. module_platform_driver(samsung_spdif_driver);
  400. MODULE_AUTHOR("Seungwhan Youn, <[email protected]>");
  401. MODULE_DESCRIPTION("Samsung S/PDIF Controller Driver");
  402. MODULE_LICENSE("GPL");
  403. MODULE_ALIAS("platform:samsung-spdif");