g12a-toacodec.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2020 BayLibre, SAS.
  4. // Author: Jerome Brunet <[email protected]>
  5. #include <linux/bitfield.h>
  6. #include <linux/clk.h>
  7. #include <linux/module.h>
  8. #include <sound/pcm_params.h>
  9. #include <linux/regmap.h>
  10. #include <linux/regulator/consumer.h>
  11. #include <linux/reset.h>
  12. #include <sound/soc.h>
  13. #include <sound/soc-dai.h>
  14. #include <dt-bindings/sound/meson-g12a-toacodec.h>
  15. #include "axg-tdm.h"
  16. #include "meson-codec-glue.h"
  17. #define G12A_TOACODEC_DRV_NAME "g12a-toacodec"
  18. #define TOACODEC_CTRL0 0x0
  19. #define CTRL0_ENABLE_SHIFT 31
  20. #define CTRL0_DAT_SEL_SM1_MSB 19
  21. #define CTRL0_DAT_SEL_SM1_LSB 18
  22. #define CTRL0_DAT_SEL_MSB 15
  23. #define CTRL0_DAT_SEL_LSB 14
  24. #define CTRL0_LANE_SEL_SM1 16
  25. #define CTRL0_LANE_SEL 12
  26. #define CTRL0_LRCLK_SEL_SM1_MSB 14
  27. #define CTRL0_LRCLK_SEL_SM1_LSB 12
  28. #define CTRL0_LRCLK_SEL_MSB 9
  29. #define CTRL0_LRCLK_SEL_LSB 8
  30. #define CTRL0_LRCLK_INV_SM1 BIT(10)
  31. #define CTRL0_BLK_CAP_INV_SM1 BIT(9)
  32. #define CTRL0_BLK_CAP_INV BIT(7)
  33. #define CTRL0_BCLK_O_INV_SM1 BIT(8)
  34. #define CTRL0_BCLK_O_INV BIT(6)
  35. #define CTRL0_BCLK_SEL_SM1_MSB 6
  36. #define CTRL0_BCLK_SEL_MSB 5
  37. #define CTRL0_BCLK_SEL_LSB 4
  38. #define CTRL0_MCLK_SEL GENMASK(2, 0)
  39. #define TOACODEC_OUT_CHMAX 2
  40. struct g12a_toacodec {
  41. struct regmap_field *field_dat_sel;
  42. struct regmap_field *field_lrclk_sel;
  43. struct regmap_field *field_bclk_sel;
  44. };
  45. struct g12a_toacodec_match_data {
  46. const struct snd_soc_component_driver *component_drv;
  47. struct reg_field field_dat_sel;
  48. struct reg_field field_lrclk_sel;
  49. struct reg_field field_bclk_sel;
  50. };
  51. static const char * const g12a_toacodec_mux_texts[] = {
  52. "I2S A", "I2S B", "I2S C",
  53. };
  54. static int g12a_toacodec_mux_put_enum(struct snd_kcontrol *kcontrol,
  55. struct snd_ctl_elem_value *ucontrol)
  56. {
  57. struct snd_soc_component *component =
  58. snd_soc_dapm_kcontrol_component(kcontrol);
  59. struct g12a_toacodec *priv = snd_soc_component_get_drvdata(component);
  60. struct snd_soc_dapm_context *dapm =
  61. snd_soc_dapm_kcontrol_dapm(kcontrol);
  62. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  63. unsigned int mux, reg;
  64. mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]);
  65. regmap_field_read(priv->field_dat_sel, &reg);
  66. if (mux == reg)
  67. return 0;
  68. /* Force disconnect of the mux while updating */
  69. snd_soc_dapm_mux_update_power(dapm, kcontrol, 0, NULL, NULL);
  70. regmap_field_write(priv->field_dat_sel, mux);
  71. regmap_field_write(priv->field_lrclk_sel, mux);
  72. regmap_field_write(priv->field_bclk_sel, mux);
  73. /*
  74. * FIXME:
  75. * On this soc, the glue gets the MCLK directly from the clock
  76. * controller instead of going the through the TDM interface.
  77. *
  78. * Here we assume interface A uses clock A, etc ... While it is
  79. * true for now, it could be different. Instead the glue should
  80. * find out the clock used by the interface and select the same
  81. * source. For that, we will need regmap backed clock mux which
  82. * is a work in progress
  83. */
  84. snd_soc_component_update_bits(component, e->reg,
  85. CTRL0_MCLK_SEL,
  86. FIELD_PREP(CTRL0_MCLK_SEL, mux));
  87. snd_soc_dapm_mux_update_power(dapm, kcontrol, mux, e, NULL);
  88. return 0;
  89. }
  90. static SOC_ENUM_SINGLE_DECL(g12a_toacodec_mux_enum, TOACODEC_CTRL0,
  91. CTRL0_DAT_SEL_LSB,
  92. g12a_toacodec_mux_texts);
  93. static SOC_ENUM_SINGLE_DECL(sm1_toacodec_mux_enum, TOACODEC_CTRL0,
  94. CTRL0_DAT_SEL_SM1_LSB,
  95. g12a_toacodec_mux_texts);
  96. static const struct snd_kcontrol_new g12a_toacodec_mux =
  97. SOC_DAPM_ENUM_EXT("Source", g12a_toacodec_mux_enum,
  98. snd_soc_dapm_get_enum_double,
  99. g12a_toacodec_mux_put_enum);
  100. static const struct snd_kcontrol_new sm1_toacodec_mux =
  101. SOC_DAPM_ENUM_EXT("Source", sm1_toacodec_mux_enum,
  102. snd_soc_dapm_get_enum_double,
  103. g12a_toacodec_mux_put_enum);
  104. static const struct snd_kcontrol_new g12a_toacodec_out_enable =
  105. SOC_DAPM_SINGLE_AUTODISABLE("Switch", TOACODEC_CTRL0,
  106. CTRL0_ENABLE_SHIFT, 1, 0);
  107. static const struct snd_soc_dapm_widget g12a_toacodec_widgets[] = {
  108. SND_SOC_DAPM_MUX("SRC", SND_SOC_NOPM, 0, 0,
  109. &g12a_toacodec_mux),
  110. SND_SOC_DAPM_SWITCH("OUT EN", SND_SOC_NOPM, 0, 0,
  111. &g12a_toacodec_out_enable),
  112. };
  113. static const struct snd_soc_dapm_widget sm1_toacodec_widgets[] = {
  114. SND_SOC_DAPM_MUX("SRC", SND_SOC_NOPM, 0, 0,
  115. &sm1_toacodec_mux),
  116. SND_SOC_DAPM_SWITCH("OUT EN", SND_SOC_NOPM, 0, 0,
  117. &g12a_toacodec_out_enable),
  118. };
  119. static int g12a_toacodec_input_hw_params(struct snd_pcm_substream *substream,
  120. struct snd_pcm_hw_params *params,
  121. struct snd_soc_dai *dai)
  122. {
  123. struct meson_codec_glue_input *data;
  124. int ret;
  125. ret = meson_codec_glue_input_hw_params(substream, params, dai);
  126. if (ret)
  127. return ret;
  128. /* The glue will provide 1 lane out of the 4 to the output */
  129. data = meson_codec_glue_input_get_data(dai);
  130. data->params.channels_min = min_t(unsigned int, TOACODEC_OUT_CHMAX,
  131. data->params.channels_min);
  132. data->params.channels_max = min_t(unsigned int, TOACODEC_OUT_CHMAX,
  133. data->params.channels_max);
  134. return 0;
  135. }
  136. static const struct snd_soc_dai_ops g12a_toacodec_input_ops = {
  137. .hw_params = g12a_toacodec_input_hw_params,
  138. .set_fmt = meson_codec_glue_input_set_fmt,
  139. };
  140. static const struct snd_soc_dai_ops g12a_toacodec_output_ops = {
  141. .startup = meson_codec_glue_output_startup,
  142. };
  143. #define TOACODEC_STREAM(xname, xsuffix, xchmax) \
  144. { \
  145. .stream_name = xname " " xsuffix, \
  146. .channels_min = 1, \
  147. .channels_max = (xchmax), \
  148. .rate_min = 5512, \
  149. .rate_max = 192000, \
  150. .formats = AXG_TDM_FORMATS, \
  151. }
  152. #define TOACODEC_INPUT(xname, xid) { \
  153. .name = xname, \
  154. .id = (xid), \
  155. .playback = TOACODEC_STREAM(xname, "Playback", 8), \
  156. .ops = &g12a_toacodec_input_ops, \
  157. .probe = meson_codec_glue_input_dai_probe, \
  158. .remove = meson_codec_glue_input_dai_remove, \
  159. }
  160. #define TOACODEC_OUTPUT(xname, xid) { \
  161. .name = xname, \
  162. .id = (xid), \
  163. .capture = TOACODEC_STREAM(xname, "Capture", TOACODEC_OUT_CHMAX), \
  164. .ops = &g12a_toacodec_output_ops, \
  165. }
  166. static struct snd_soc_dai_driver g12a_toacodec_dai_drv[] = {
  167. TOACODEC_INPUT("IN A", TOACODEC_IN_A),
  168. TOACODEC_INPUT("IN B", TOACODEC_IN_B),
  169. TOACODEC_INPUT("IN C", TOACODEC_IN_C),
  170. TOACODEC_OUTPUT("OUT", TOACODEC_OUT),
  171. };
  172. static int g12a_toacodec_component_probe(struct snd_soc_component *c)
  173. {
  174. /* Initialize the static clock parameters */
  175. return snd_soc_component_write(c, TOACODEC_CTRL0,
  176. CTRL0_BLK_CAP_INV);
  177. }
  178. static int sm1_toacodec_component_probe(struct snd_soc_component *c)
  179. {
  180. /* Initialize the static clock parameters */
  181. return snd_soc_component_write(c, TOACODEC_CTRL0,
  182. CTRL0_BLK_CAP_INV_SM1);
  183. }
  184. static const struct snd_soc_dapm_route g12a_toacodec_routes[] = {
  185. { "SRC", "I2S A", "IN A Playback" },
  186. { "SRC", "I2S B", "IN B Playback" },
  187. { "SRC", "I2S C", "IN C Playback" },
  188. { "OUT EN", "Switch", "SRC" },
  189. { "OUT Capture", NULL, "OUT EN" },
  190. };
  191. static const struct snd_kcontrol_new g12a_toacodec_controls[] = {
  192. SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL, 3, 0),
  193. };
  194. static const struct snd_kcontrol_new sm1_toacodec_controls[] = {
  195. SOC_SINGLE("Lane Select", TOACODEC_CTRL0, CTRL0_LANE_SEL_SM1, 3, 0),
  196. };
  197. static const struct snd_soc_component_driver g12a_toacodec_component_drv = {
  198. .probe = g12a_toacodec_component_probe,
  199. .controls = g12a_toacodec_controls,
  200. .num_controls = ARRAY_SIZE(g12a_toacodec_controls),
  201. .dapm_widgets = g12a_toacodec_widgets,
  202. .num_dapm_widgets = ARRAY_SIZE(g12a_toacodec_widgets),
  203. .dapm_routes = g12a_toacodec_routes,
  204. .num_dapm_routes = ARRAY_SIZE(g12a_toacodec_routes),
  205. .endianness = 1,
  206. };
  207. static const struct snd_soc_component_driver sm1_toacodec_component_drv = {
  208. .probe = sm1_toacodec_component_probe,
  209. .controls = sm1_toacodec_controls,
  210. .num_controls = ARRAY_SIZE(sm1_toacodec_controls),
  211. .dapm_widgets = sm1_toacodec_widgets,
  212. .num_dapm_widgets = ARRAY_SIZE(sm1_toacodec_widgets),
  213. .dapm_routes = g12a_toacodec_routes,
  214. .num_dapm_routes = ARRAY_SIZE(g12a_toacodec_routes),
  215. .endianness = 1,
  216. };
  217. static const struct regmap_config g12a_toacodec_regmap_cfg = {
  218. .reg_bits = 32,
  219. .val_bits = 32,
  220. .reg_stride = 4,
  221. };
  222. static const struct g12a_toacodec_match_data g12a_toacodec_match_data = {
  223. .component_drv = &g12a_toacodec_component_drv,
  224. .field_dat_sel = REG_FIELD(TOACODEC_CTRL0, 14, 15),
  225. .field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, 8, 9),
  226. .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, 4, 5),
  227. };
  228. static const struct g12a_toacodec_match_data sm1_toacodec_match_data = {
  229. .component_drv = &sm1_toacodec_component_drv,
  230. .field_dat_sel = REG_FIELD(TOACODEC_CTRL0, 18, 19),
  231. .field_lrclk_sel = REG_FIELD(TOACODEC_CTRL0, 12, 14),
  232. .field_bclk_sel = REG_FIELD(TOACODEC_CTRL0, 4, 6),
  233. };
  234. static const struct of_device_id g12a_toacodec_of_match[] = {
  235. {
  236. .compatible = "amlogic,g12a-toacodec",
  237. .data = &g12a_toacodec_match_data,
  238. },
  239. {
  240. .compatible = "amlogic,sm1-toacodec",
  241. .data = &sm1_toacodec_match_data,
  242. },
  243. {}
  244. };
  245. MODULE_DEVICE_TABLE(of, g12a_toacodec_of_match);
  246. static int g12a_toacodec_probe(struct platform_device *pdev)
  247. {
  248. const struct g12a_toacodec_match_data *data;
  249. struct device *dev = &pdev->dev;
  250. struct g12a_toacodec *priv;
  251. void __iomem *regs;
  252. struct regmap *map;
  253. int ret;
  254. data = device_get_match_data(dev);
  255. if (!data) {
  256. dev_err(dev, "failed to match device\n");
  257. return -ENODEV;
  258. }
  259. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  260. if (!priv)
  261. return -ENOMEM;
  262. platform_set_drvdata(pdev, priv);
  263. ret = device_reset(dev);
  264. if (ret)
  265. return ret;
  266. regs = devm_platform_ioremap_resource(pdev, 0);
  267. if (IS_ERR(regs))
  268. return PTR_ERR(regs);
  269. map = devm_regmap_init_mmio(dev, regs, &g12a_toacodec_regmap_cfg);
  270. if (IS_ERR(map)) {
  271. dev_err(dev, "failed to init regmap: %ld\n",
  272. PTR_ERR(map));
  273. return PTR_ERR(map);
  274. }
  275. priv->field_dat_sel = devm_regmap_field_alloc(dev, map, data->field_dat_sel);
  276. if (IS_ERR(priv->field_dat_sel))
  277. return PTR_ERR(priv->field_dat_sel);
  278. priv->field_lrclk_sel = devm_regmap_field_alloc(dev, map, data->field_lrclk_sel);
  279. if (IS_ERR(priv->field_lrclk_sel))
  280. return PTR_ERR(priv->field_lrclk_sel);
  281. priv->field_bclk_sel = devm_regmap_field_alloc(dev, map, data->field_bclk_sel);
  282. if (IS_ERR(priv->field_bclk_sel))
  283. return PTR_ERR(priv->field_bclk_sel);
  284. return devm_snd_soc_register_component(dev,
  285. data->component_drv, g12a_toacodec_dai_drv,
  286. ARRAY_SIZE(g12a_toacodec_dai_drv));
  287. }
  288. static struct platform_driver g12a_toacodec_pdrv = {
  289. .driver = {
  290. .name = G12A_TOACODEC_DRV_NAME,
  291. .of_match_table = g12a_toacodec_of_match,
  292. },
  293. .probe = g12a_toacodec_probe,
  294. };
  295. module_platform_driver(g12a_toacodec_pdrv);
  296. MODULE_AUTHOR("Jerome Brunet <[email protected]>");
  297. MODULE_DESCRIPTION("Amlogic G12a To Internal DAC Codec Driver");
  298. MODULE_LICENSE("GPL v2");