axg-tdmout.c 9.9 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright (c) 2018 BayLibre, SAS.
  4. // Author: Jerome Brunet <[email protected]>
  5. #include <linux/module.h>
  6. #include <linux/of_platform.h>
  7. #include <linux/regmap.h>
  8. #include <sound/soc.h>
  9. #include <sound/soc-dai.h>
  10. #include "axg-tdm-formatter.h"
  11. #define TDMOUT_CTRL0 0x00
  12. #define TDMOUT_CTRL0_BITNUM_MASK GENMASK(4, 0)
  13. #define TDMOUT_CTRL0_BITNUM(x) ((x) << 0)
  14. #define TDMOUT_CTRL0_SLOTNUM_MASK GENMASK(9, 5)
  15. #define TDMOUT_CTRL0_SLOTNUM(x) ((x) << 5)
  16. #define TDMOUT_CTRL0_INIT_BITNUM_MASK GENMASK(19, 15)
  17. #define TDMOUT_CTRL0_INIT_BITNUM(x) ((x) << 15)
  18. #define TDMOUT_CTRL0_ENABLE BIT(31)
  19. #define TDMOUT_CTRL0_RST_OUT BIT(29)
  20. #define TDMOUT_CTRL0_RST_IN BIT(28)
  21. #define TDMOUT_CTRL1 0x04
  22. #define TDMOUT_CTRL1_TYPE_MASK GENMASK(6, 4)
  23. #define TDMOUT_CTRL1_TYPE(x) ((x) << 4)
  24. #define SM1_TDMOUT_CTRL1_GAIN_EN 7
  25. #define TDMOUT_CTRL1_MSB_POS_MASK GENMASK(12, 8)
  26. #define TDMOUT_CTRL1_MSB_POS(x) ((x) << 8)
  27. #define TDMOUT_CTRL1_SEL_SHIFT 24
  28. #define TDMOUT_CTRL1_GAIN_EN 26
  29. #define TDMOUT_CTRL1_WS_INV BIT(28)
  30. #define TDMOUT_SWAP 0x08
  31. #define TDMOUT_MASK0 0x0c
  32. #define TDMOUT_MASK1 0x10
  33. #define TDMOUT_MASK2 0x14
  34. #define TDMOUT_MASK3 0x18
  35. #define TDMOUT_STAT 0x1c
  36. #define TDMOUT_GAIN0 0x20
  37. #define TDMOUT_GAIN1 0x24
  38. #define TDMOUT_MUTE_VAL 0x28
  39. #define TDMOUT_MUTE0 0x2c
  40. #define TDMOUT_MUTE1 0x30
  41. #define TDMOUT_MUTE2 0x34
  42. #define TDMOUT_MUTE3 0x38
  43. #define TDMOUT_MASK_VAL 0x3c
  44. static const struct regmap_config axg_tdmout_regmap_cfg = {
  45. .reg_bits = 32,
  46. .val_bits = 32,
  47. .reg_stride = 4,
  48. .max_register = TDMOUT_MASK_VAL,
  49. };
  50. static struct snd_soc_dai *
  51. axg_tdmout_get_be(struct snd_soc_dapm_widget *w)
  52. {
  53. struct snd_soc_dapm_path *p;
  54. struct snd_soc_dai *be;
  55. snd_soc_dapm_widget_for_each_sink_path(w, p) {
  56. if (!p->connect)
  57. continue;
  58. if (p->sink->id == snd_soc_dapm_dai_in)
  59. return (struct snd_soc_dai *)p->sink->priv;
  60. be = axg_tdmout_get_be(p->sink);
  61. if (be)
  62. return be;
  63. }
  64. return NULL;
  65. }
  66. static struct axg_tdm_stream *
  67. axg_tdmout_get_tdm_stream(struct snd_soc_dapm_widget *w)
  68. {
  69. struct snd_soc_dai *be = axg_tdmout_get_be(w);
  70. if (!be)
  71. return NULL;
  72. return be->playback_dma_data;
  73. }
  74. static void axg_tdmout_enable(struct regmap *map)
  75. {
  76. /* Apply both reset */
  77. regmap_update_bits(map, TDMOUT_CTRL0,
  78. TDMOUT_CTRL0_RST_OUT | TDMOUT_CTRL0_RST_IN, 0);
  79. /* Clear out reset before in reset */
  80. regmap_update_bits(map, TDMOUT_CTRL0,
  81. TDMOUT_CTRL0_RST_OUT, TDMOUT_CTRL0_RST_OUT);
  82. regmap_update_bits(map, TDMOUT_CTRL0,
  83. TDMOUT_CTRL0_RST_IN, TDMOUT_CTRL0_RST_IN);
  84. /* Actually enable tdmout */
  85. regmap_update_bits(map, TDMOUT_CTRL0,
  86. TDMOUT_CTRL0_ENABLE, TDMOUT_CTRL0_ENABLE);
  87. }
  88. static void axg_tdmout_disable(struct regmap *map)
  89. {
  90. regmap_update_bits(map, TDMOUT_CTRL0, TDMOUT_CTRL0_ENABLE, 0);
  91. }
  92. static int axg_tdmout_prepare(struct regmap *map,
  93. const struct axg_tdm_formatter_hw *quirks,
  94. struct axg_tdm_stream *ts)
  95. {
  96. unsigned int val, skew = quirks->skew_offset;
  97. /* Set the stream skew */
  98. switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  99. case SND_SOC_DAIFMT_I2S:
  100. case SND_SOC_DAIFMT_DSP_A:
  101. break;
  102. case SND_SOC_DAIFMT_LEFT_J:
  103. case SND_SOC_DAIFMT_DSP_B:
  104. skew += 1;
  105. break;
  106. default:
  107. pr_err("Unsupported format: %u\n",
  108. ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
  109. return -EINVAL;
  110. }
  111. val = TDMOUT_CTRL0_INIT_BITNUM(skew);
  112. /* Set the slot width */
  113. val |= TDMOUT_CTRL0_BITNUM(ts->iface->slot_width - 1);
  114. /* Set the slot number */
  115. val |= TDMOUT_CTRL0_SLOTNUM(ts->iface->slots - 1);
  116. regmap_update_bits(map, TDMOUT_CTRL0,
  117. TDMOUT_CTRL0_INIT_BITNUM_MASK |
  118. TDMOUT_CTRL0_BITNUM_MASK |
  119. TDMOUT_CTRL0_SLOTNUM_MASK, val);
  120. /* Set the sample width */
  121. val = TDMOUT_CTRL1_MSB_POS(ts->width - 1);
  122. /* FIFO data are arranged in chunks of 64bits */
  123. switch (ts->physical_width) {
  124. case 8:
  125. /* 8 samples of 8 bits */
  126. val |= TDMOUT_CTRL1_TYPE(0);
  127. break;
  128. case 16:
  129. /* 4 samples of 16 bits - right justified */
  130. val |= TDMOUT_CTRL1_TYPE(2);
  131. break;
  132. case 32:
  133. /* 2 samples of 32 bits - right justified */
  134. val |= TDMOUT_CTRL1_TYPE(4);
  135. break;
  136. default:
  137. pr_err("Unsupported physical width: %u\n",
  138. ts->physical_width);
  139. return -EINVAL;
  140. }
  141. /* If the sample clock is inverted, invert it back for the formatter */
  142. if (axg_tdm_lrclk_invert(ts->iface->fmt))
  143. val |= TDMOUT_CTRL1_WS_INV;
  144. regmap_update_bits(map, TDMOUT_CTRL1,
  145. (TDMOUT_CTRL1_TYPE_MASK | TDMOUT_CTRL1_MSB_POS_MASK |
  146. TDMOUT_CTRL1_WS_INV), val);
  147. /* Set static swap mask configuration */
  148. regmap_write(map, TDMOUT_SWAP, 0x76543210);
  149. return axg_tdm_formatter_set_channel_masks(map, ts, TDMOUT_MASK0);
  150. }
  151. static const struct snd_kcontrol_new axg_tdmout_controls[] = {
  152. SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0, 0, 8, 255, 0),
  153. SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0),
  154. SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1, 0, 8, 255, 0),
  155. SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0),
  156. SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1,
  157. TDMOUT_CTRL1_GAIN_EN, 1, 0),
  158. };
  159. static const char * const axg_tdmout_sel_texts[] = {
  160. "IN 0", "IN 1", "IN 2",
  161. };
  162. static SOC_ENUM_SINGLE_DECL(axg_tdmout_sel_enum, TDMOUT_CTRL1,
  163. TDMOUT_CTRL1_SEL_SHIFT, axg_tdmout_sel_texts);
  164. static const struct snd_kcontrol_new axg_tdmout_in_mux =
  165. SOC_DAPM_ENUM("Input Source", axg_tdmout_sel_enum);
  166. static const struct snd_soc_dapm_widget axg_tdmout_dapm_widgets[] = {
  167. SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
  168. SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
  169. SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
  170. SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmout_in_mux),
  171. SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0,
  172. axg_tdm_formatter_event,
  173. (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
  174. SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
  175. };
  176. static const struct snd_soc_dapm_route axg_tdmout_dapm_routes[] = {
  177. { "SRC SEL", "IN 0", "IN 0" },
  178. { "SRC SEL", "IN 1", "IN 1" },
  179. { "SRC SEL", "IN 2", "IN 2" },
  180. { "ENC", NULL, "SRC SEL" },
  181. { "OUT", NULL, "ENC" },
  182. };
  183. static const struct snd_soc_component_driver axg_tdmout_component_drv = {
  184. .controls = axg_tdmout_controls,
  185. .num_controls = ARRAY_SIZE(axg_tdmout_controls),
  186. .dapm_widgets = axg_tdmout_dapm_widgets,
  187. .num_dapm_widgets = ARRAY_SIZE(axg_tdmout_dapm_widgets),
  188. .dapm_routes = axg_tdmout_dapm_routes,
  189. .num_dapm_routes = ARRAY_SIZE(axg_tdmout_dapm_routes),
  190. };
  191. static const struct axg_tdm_formatter_ops axg_tdmout_ops = {
  192. .get_stream = axg_tdmout_get_tdm_stream,
  193. .prepare = axg_tdmout_prepare,
  194. .enable = axg_tdmout_enable,
  195. .disable = axg_tdmout_disable,
  196. };
  197. static const struct axg_tdm_formatter_driver axg_tdmout_drv = {
  198. .component_drv = &axg_tdmout_component_drv,
  199. .regmap_cfg = &axg_tdmout_regmap_cfg,
  200. .ops = &axg_tdmout_ops,
  201. .quirks = &(const struct axg_tdm_formatter_hw) {
  202. .skew_offset = 1,
  203. },
  204. };
  205. static const struct axg_tdm_formatter_driver g12a_tdmout_drv = {
  206. .component_drv = &axg_tdmout_component_drv,
  207. .regmap_cfg = &axg_tdmout_regmap_cfg,
  208. .ops = &axg_tdmout_ops,
  209. .quirks = &(const struct axg_tdm_formatter_hw) {
  210. .skew_offset = 2,
  211. },
  212. };
  213. static const struct snd_kcontrol_new sm1_tdmout_controls[] = {
  214. SOC_DOUBLE("Lane 0 Volume", TDMOUT_GAIN0, 0, 8, 255, 0),
  215. SOC_DOUBLE("Lane 1 Volume", TDMOUT_GAIN0, 16, 24, 255, 0),
  216. SOC_DOUBLE("Lane 2 Volume", TDMOUT_GAIN1, 0, 8, 255, 0),
  217. SOC_DOUBLE("Lane 3 Volume", TDMOUT_GAIN1, 16, 24, 255, 0),
  218. SOC_SINGLE("Gain Enable Switch", TDMOUT_CTRL1,
  219. SM1_TDMOUT_CTRL1_GAIN_EN, 1, 0),
  220. };
  221. static const char * const sm1_tdmout_sel_texts[] = {
  222. "IN 0", "IN 1", "IN 2", "IN 3", "IN 4",
  223. };
  224. static SOC_ENUM_SINGLE_DECL(sm1_tdmout_sel_enum, TDMOUT_CTRL1,
  225. TDMOUT_CTRL1_SEL_SHIFT, sm1_tdmout_sel_texts);
  226. static const struct snd_kcontrol_new sm1_tdmout_in_mux =
  227. SOC_DAPM_ENUM("Input Source", sm1_tdmout_sel_enum);
  228. static const struct snd_soc_dapm_widget sm1_tdmout_dapm_widgets[] = {
  229. SND_SOC_DAPM_AIF_IN("IN 0", NULL, 0, SND_SOC_NOPM, 0, 0),
  230. SND_SOC_DAPM_AIF_IN("IN 1", NULL, 0, SND_SOC_NOPM, 0, 0),
  231. SND_SOC_DAPM_AIF_IN("IN 2", NULL, 0, SND_SOC_NOPM, 0, 0),
  232. SND_SOC_DAPM_AIF_IN("IN 3", NULL, 0, SND_SOC_NOPM, 0, 0),
  233. SND_SOC_DAPM_AIF_IN("IN 4", NULL, 0, SND_SOC_NOPM, 0, 0),
  234. SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &sm1_tdmout_in_mux),
  235. SND_SOC_DAPM_PGA_E("ENC", SND_SOC_NOPM, 0, 0, NULL, 0,
  236. axg_tdm_formatter_event,
  237. (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
  238. SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
  239. };
  240. static const struct snd_soc_dapm_route sm1_tdmout_dapm_routes[] = {
  241. { "SRC SEL", "IN 0", "IN 0" },
  242. { "SRC SEL", "IN 1", "IN 1" },
  243. { "SRC SEL", "IN 2", "IN 2" },
  244. { "SRC SEL", "IN 3", "IN 3" },
  245. { "SRC SEL", "IN 4", "IN 4" },
  246. { "ENC", NULL, "SRC SEL" },
  247. { "OUT", NULL, "ENC" },
  248. };
  249. static const struct snd_soc_component_driver sm1_tdmout_component_drv = {
  250. .controls = sm1_tdmout_controls,
  251. .num_controls = ARRAY_SIZE(sm1_tdmout_controls),
  252. .dapm_widgets = sm1_tdmout_dapm_widgets,
  253. .num_dapm_widgets = ARRAY_SIZE(sm1_tdmout_dapm_widgets),
  254. .dapm_routes = sm1_tdmout_dapm_routes,
  255. .num_dapm_routes = ARRAY_SIZE(sm1_tdmout_dapm_routes),
  256. };
  257. static const struct axg_tdm_formatter_driver sm1_tdmout_drv = {
  258. .component_drv = &sm1_tdmout_component_drv,
  259. .regmap_cfg = &axg_tdmout_regmap_cfg,
  260. .ops = &axg_tdmout_ops,
  261. .quirks = &(const struct axg_tdm_formatter_hw) {
  262. .skew_offset = 2,
  263. },
  264. };
  265. static const struct of_device_id axg_tdmout_of_match[] = {
  266. {
  267. .compatible = "amlogic,axg-tdmout",
  268. .data = &axg_tdmout_drv,
  269. }, {
  270. .compatible = "amlogic,g12a-tdmout",
  271. .data = &g12a_tdmout_drv,
  272. }, {
  273. .compatible = "amlogic,sm1-tdmout",
  274. .data = &sm1_tdmout_drv,
  275. }, {}
  276. };
  277. MODULE_DEVICE_TABLE(of, axg_tdmout_of_match);
  278. static struct platform_driver axg_tdmout_pdrv = {
  279. .probe = axg_tdm_formatter_probe,
  280. .driver = {
  281. .name = "axg-tdmout",
  282. .of_match_table = axg_tdmout_of_match,
  283. },
  284. };
  285. module_platform_driver(axg_tdmout_pdrv);
  286. MODULE_DESCRIPTION("Amlogic AXG TDM output formatter driver");
  287. MODULE_AUTHOR("Jerome Brunet <[email protected]>");
  288. MODULE_LICENSE("GPL v2");