axg-tdm-formatter.c 10 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. //
  3. // Copyright (c) 2018 BayLibre, SAS.
  4. // Author: Jerome Brunet <[email protected]>
  5. #include <linux/clk.h>
  6. #include <linux/module.h>
  7. #include <linux/of_platform.h>
  8. #include <linux/regmap.h>
  9. #include <linux/reset.h>
  10. #include <sound/soc.h>
  11. #include "axg-tdm-formatter.h"
  12. struct axg_tdm_formatter {
  13. struct list_head list;
  14. struct axg_tdm_stream *stream;
  15. const struct axg_tdm_formatter_driver *drv;
  16. struct clk *pclk;
  17. struct clk *sclk;
  18. struct clk *lrclk;
  19. struct clk *sclk_sel;
  20. struct clk *lrclk_sel;
  21. struct reset_control *reset;
  22. bool enabled;
  23. struct regmap *map;
  24. };
  25. int axg_tdm_formatter_set_channel_masks(struct regmap *map,
  26. struct axg_tdm_stream *ts,
  27. unsigned int offset)
  28. {
  29. unsigned int ch = ts->channels;
  30. u32 val[AXG_TDM_NUM_LANES];
  31. int i, j, k;
  32. /*
  33. * We need to mimick the slot distribution used by the HW to keep the
  34. * channel placement consistent regardless of the number of channel
  35. * in the stream. This is why the odd algorithm below is used.
  36. */
  37. memset(val, 0, sizeof(*val) * AXG_TDM_NUM_LANES);
  38. /*
  39. * Distribute the channels of the stream over the available slots
  40. * of each TDM lane. We need to go over the 32 slots ...
  41. */
  42. for (i = 0; (i < 32) && ch; i += 2) {
  43. /* ... of all the lanes ... */
  44. for (j = 0; j < AXG_TDM_NUM_LANES; j++) {
  45. /* ... then distribute the channels in pairs */
  46. for (k = 0; k < 2; k++) {
  47. if ((BIT(i + k) & ts->mask[j]) && ch) {
  48. val[j] |= BIT(i + k);
  49. ch -= 1;
  50. }
  51. }
  52. }
  53. }
  54. /*
  55. * If we still have channel left at the end of the process, it means
  56. * the stream has more channels than we can accommodate and we should
  57. * have caught this earlier.
  58. */
  59. if (WARN_ON(ch != 0)) {
  60. pr_err("channel mask error\n");
  61. return -EINVAL;
  62. }
  63. for (i = 0; i < AXG_TDM_NUM_LANES; i++) {
  64. regmap_write(map, offset, val[i]);
  65. offset += regmap_get_reg_stride(map);
  66. }
  67. return 0;
  68. }
  69. EXPORT_SYMBOL_GPL(axg_tdm_formatter_set_channel_masks);
  70. static int axg_tdm_formatter_enable(struct axg_tdm_formatter *formatter)
  71. {
  72. struct axg_tdm_stream *ts = formatter->stream;
  73. bool invert;
  74. int ret;
  75. /* Do nothing if the formatter is already enabled */
  76. if (formatter->enabled)
  77. return 0;
  78. /*
  79. * On the g12a (and possibly other SoCs), when a stream using
  80. * multiple lanes is restarted, it will sometimes not start
  81. * from the first lane, but randomly from another used one.
  82. * The result is an unexpected and random channel shift.
  83. *
  84. * The hypothesis is that an HW counter is not properly reset
  85. * and the formatter simply starts on the lane it stopped
  86. * before. Unfortunately, there does not seems to be a way to
  87. * reset this through the registers of the block.
  88. *
  89. * However, the g12a has indenpendent reset lines for each audio
  90. * devices. Using this reset before each start solves the issue.
  91. */
  92. ret = reset_control_reset(formatter->reset);
  93. if (ret)
  94. return ret;
  95. /*
  96. * If sclk is inverted, it means the bit should latched on the
  97. * rising edge which is what our HW expects. If not, we need to
  98. * invert it before the formatter.
  99. */
  100. invert = axg_tdm_sclk_invert(ts->iface->fmt);
  101. ret = clk_set_phase(formatter->sclk, invert ? 0 : 180);
  102. if (ret)
  103. return ret;
  104. /* Setup the stream parameter in the formatter */
  105. ret = formatter->drv->ops->prepare(formatter->map,
  106. formatter->drv->quirks,
  107. formatter->stream);
  108. if (ret)
  109. return ret;
  110. /* Enable the signal clocks feeding the formatter */
  111. ret = clk_prepare_enable(formatter->sclk);
  112. if (ret)
  113. return ret;
  114. ret = clk_prepare_enable(formatter->lrclk);
  115. if (ret) {
  116. clk_disable_unprepare(formatter->sclk);
  117. return ret;
  118. }
  119. /* Finally, actually enable the formatter */
  120. formatter->drv->ops->enable(formatter->map);
  121. formatter->enabled = true;
  122. return 0;
  123. }
  124. static void axg_tdm_formatter_disable(struct axg_tdm_formatter *formatter)
  125. {
  126. /* Do nothing if the formatter is already disabled */
  127. if (!formatter->enabled)
  128. return;
  129. formatter->drv->ops->disable(formatter->map);
  130. clk_disable_unprepare(formatter->lrclk);
  131. clk_disable_unprepare(formatter->sclk);
  132. formatter->enabled = false;
  133. }
  134. static int axg_tdm_formatter_attach(struct axg_tdm_formatter *formatter)
  135. {
  136. struct axg_tdm_stream *ts = formatter->stream;
  137. int ret = 0;
  138. mutex_lock(&ts->lock);
  139. /* Catch up if the stream is already running when we attach */
  140. if (ts->ready) {
  141. ret = axg_tdm_formatter_enable(formatter);
  142. if (ret) {
  143. pr_err("failed to enable formatter\n");
  144. goto out;
  145. }
  146. }
  147. list_add_tail(&formatter->list, &ts->formatter_list);
  148. out:
  149. mutex_unlock(&ts->lock);
  150. return ret;
  151. }
  152. static void axg_tdm_formatter_dettach(struct axg_tdm_formatter *formatter)
  153. {
  154. struct axg_tdm_stream *ts = formatter->stream;
  155. mutex_lock(&ts->lock);
  156. list_del(&formatter->list);
  157. mutex_unlock(&ts->lock);
  158. axg_tdm_formatter_disable(formatter);
  159. }
  160. static int axg_tdm_formatter_power_up(struct axg_tdm_formatter *formatter,
  161. struct snd_soc_dapm_widget *w)
  162. {
  163. struct axg_tdm_stream *ts = formatter->drv->ops->get_stream(w);
  164. int ret;
  165. /*
  166. * If we don't get a stream at this stage, it would mean that the
  167. * widget is powering up but is not attached to any backend DAI.
  168. * It should not happen, ever !
  169. */
  170. if (WARN_ON(!ts))
  171. return -ENODEV;
  172. /* Clock our device */
  173. ret = clk_prepare_enable(formatter->pclk);
  174. if (ret)
  175. return ret;
  176. /* Reparent the bit clock to the TDM interface */
  177. ret = clk_set_parent(formatter->sclk_sel, ts->iface->sclk);
  178. if (ret)
  179. goto disable_pclk;
  180. /* Reparent the sample clock to the TDM interface */
  181. ret = clk_set_parent(formatter->lrclk_sel, ts->iface->lrclk);
  182. if (ret)
  183. goto disable_pclk;
  184. formatter->stream = ts;
  185. ret = axg_tdm_formatter_attach(formatter);
  186. if (ret)
  187. goto disable_pclk;
  188. return 0;
  189. disable_pclk:
  190. clk_disable_unprepare(formatter->pclk);
  191. return ret;
  192. }
  193. static void axg_tdm_formatter_power_down(struct axg_tdm_formatter *formatter)
  194. {
  195. axg_tdm_formatter_dettach(formatter);
  196. clk_disable_unprepare(formatter->pclk);
  197. formatter->stream = NULL;
  198. }
  199. int axg_tdm_formatter_event(struct snd_soc_dapm_widget *w,
  200. struct snd_kcontrol *control,
  201. int event)
  202. {
  203. struct snd_soc_component *c = snd_soc_dapm_to_component(w->dapm);
  204. struct axg_tdm_formatter *formatter = snd_soc_component_get_drvdata(c);
  205. int ret = 0;
  206. switch (event) {
  207. case SND_SOC_DAPM_PRE_PMU:
  208. ret = axg_tdm_formatter_power_up(formatter, w);
  209. break;
  210. case SND_SOC_DAPM_PRE_PMD:
  211. axg_tdm_formatter_power_down(formatter);
  212. break;
  213. default:
  214. dev_err(c->dev, "Unexpected event %d\n", event);
  215. return -EINVAL;
  216. }
  217. return ret;
  218. }
  219. EXPORT_SYMBOL_GPL(axg_tdm_formatter_event);
  220. int axg_tdm_formatter_probe(struct platform_device *pdev)
  221. {
  222. struct device *dev = &pdev->dev;
  223. const struct axg_tdm_formatter_driver *drv;
  224. struct axg_tdm_formatter *formatter;
  225. void __iomem *regs;
  226. drv = of_device_get_match_data(dev);
  227. if (!drv) {
  228. dev_err(dev, "failed to match device\n");
  229. return -ENODEV;
  230. }
  231. formatter = devm_kzalloc(dev, sizeof(*formatter), GFP_KERNEL);
  232. if (!formatter)
  233. return -ENOMEM;
  234. platform_set_drvdata(pdev, formatter);
  235. formatter->drv = drv;
  236. regs = devm_platform_ioremap_resource(pdev, 0);
  237. if (IS_ERR(regs))
  238. return PTR_ERR(regs);
  239. formatter->map = devm_regmap_init_mmio(dev, regs, drv->regmap_cfg);
  240. if (IS_ERR(formatter->map)) {
  241. dev_err(dev, "failed to init regmap: %ld\n",
  242. PTR_ERR(formatter->map));
  243. return PTR_ERR(formatter->map);
  244. }
  245. /* Peripharal clock */
  246. formatter->pclk = devm_clk_get(dev, "pclk");
  247. if (IS_ERR(formatter->pclk))
  248. return dev_err_probe(dev, PTR_ERR(formatter->pclk), "failed to get pclk\n");
  249. /* Formatter bit clock */
  250. formatter->sclk = devm_clk_get(dev, "sclk");
  251. if (IS_ERR(formatter->sclk))
  252. return dev_err_probe(dev, PTR_ERR(formatter->sclk), "failed to get sclk\n");
  253. /* Formatter sample clock */
  254. formatter->lrclk = devm_clk_get(dev, "lrclk");
  255. if (IS_ERR(formatter->lrclk))
  256. return dev_err_probe(dev, PTR_ERR(formatter->lrclk), "failed to get lrclk\n");
  257. /* Formatter bit clock input multiplexer */
  258. formatter->sclk_sel = devm_clk_get(dev, "sclk_sel");
  259. if (IS_ERR(formatter->sclk_sel))
  260. return dev_err_probe(dev, PTR_ERR(formatter->sclk_sel), "failed to get sclk_sel\n");
  261. /* Formatter sample clock input multiplexer */
  262. formatter->lrclk_sel = devm_clk_get(dev, "lrclk_sel");
  263. if (IS_ERR(formatter->lrclk_sel))
  264. return dev_err_probe(dev, PTR_ERR(formatter->lrclk_sel),
  265. "failed to get lrclk_sel\n");
  266. /* Formatter dedicated reset line */
  267. formatter->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
  268. if (IS_ERR(formatter->reset))
  269. return dev_err_probe(dev, PTR_ERR(formatter->reset), "failed to get reset\n");
  270. return devm_snd_soc_register_component(dev, drv->component_drv,
  271. NULL, 0);
  272. }
  273. EXPORT_SYMBOL_GPL(axg_tdm_formatter_probe);
  274. int axg_tdm_stream_start(struct axg_tdm_stream *ts)
  275. {
  276. struct axg_tdm_formatter *formatter;
  277. int ret = 0;
  278. mutex_lock(&ts->lock);
  279. ts->ready = true;
  280. /* Start all the formatters attached to the stream */
  281. list_for_each_entry(formatter, &ts->formatter_list, list) {
  282. ret = axg_tdm_formatter_enable(formatter);
  283. if (ret) {
  284. pr_err("failed to start tdm stream\n");
  285. goto out;
  286. }
  287. }
  288. out:
  289. mutex_unlock(&ts->lock);
  290. return ret;
  291. }
  292. EXPORT_SYMBOL_GPL(axg_tdm_stream_start);
  293. void axg_tdm_stream_stop(struct axg_tdm_stream *ts)
  294. {
  295. struct axg_tdm_formatter *formatter;
  296. mutex_lock(&ts->lock);
  297. ts->ready = false;
  298. /* Stop all the formatters attached to the stream */
  299. list_for_each_entry(formatter, &ts->formatter_list, list) {
  300. axg_tdm_formatter_disable(formatter);
  301. }
  302. mutex_unlock(&ts->lock);
  303. }
  304. EXPORT_SYMBOL_GPL(axg_tdm_stream_stop);
  305. struct axg_tdm_stream *axg_tdm_stream_alloc(struct axg_tdm_iface *iface)
  306. {
  307. struct axg_tdm_stream *ts;
  308. ts = kzalloc(sizeof(*ts), GFP_KERNEL);
  309. if (ts) {
  310. INIT_LIST_HEAD(&ts->formatter_list);
  311. mutex_init(&ts->lock);
  312. ts->iface = iface;
  313. }
  314. return ts;
  315. }
  316. EXPORT_SYMBOL_GPL(axg_tdm_stream_alloc);
  317. void axg_tdm_stream_free(struct axg_tdm_stream *ts)
  318. {
  319. /*
  320. * If the list is not empty, it would mean that one of the formatter
  321. * widget is still powered and attached to the interface while we
  322. * are removing the TDM DAI. It should not be possible
  323. */
  324. WARN_ON(!list_empty(&ts->formatter_list));
  325. mutex_destroy(&ts->lock);
  326. kfree(ts);
  327. }
  328. EXPORT_SYMBOL_GPL(axg_tdm_stream_free);
  329. MODULE_DESCRIPTION("Amlogic AXG TDM formatter driver");
  330. MODULE_AUTHOR("Jerome Brunet <[email protected]>");
  331. MODULE_LICENSE("GPL v2");