mt8195-mt6359.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * mt8195-mt6359.c --
  4. * MT8195-MT6359 ALSA SoC machine driver code
  5. *
  6. * Copyright (c) 2022 MediaTek Inc.
  7. * Author: Trevor Wu <[email protected]>
  8. * YC Hung <[email protected]>
  9. */
  10. #include <linux/input.h>
  11. #include <linux/module.h>
  12. #include <linux/of_device.h>
  13. #include <linux/pm_runtime.h>
  14. #include <sound/jack.h>
  15. #include <sound/pcm_params.h>
  16. #include <sound/rt5682.h>
  17. #include <sound/soc.h>
  18. #include "../../codecs/mt6359.h"
  19. #include "../../codecs/rt1011.h"
  20. #include "../../codecs/rt5682.h"
  21. #include "../common/mtk-afe-platform-driver.h"
  22. #include "../common/mtk-dsp-sof-common.h"
  23. #include "../common/mtk-soc-card.h"
  24. #include "mt8195-afe-clk.h"
  25. #include "mt8195-afe-common.h"
  26. #define RT1011_SPEAKER_AMP_PRESENT BIT(0)
  27. #define RT1019_SPEAKER_AMP_PRESENT BIT(1)
  28. #define MAX98390_SPEAKER_AMP_PRESENT BIT(2)
  29. #define RT1011_CODEC_DAI "rt1011-aif"
  30. #define RT1011_DEV0_NAME "rt1011.2-0038"
  31. #define RT1011_DEV1_NAME "rt1011.2-0039"
  32. #define RT1019_CODEC_DAI "HiFi"
  33. #define RT1019_DEV0_NAME "rt1019p"
  34. #define MAX98390_CODEC_DAI "max98390-aif1"
  35. #define MAX98390_DEV0_NAME "max98390.2-0038" /* right */
  36. #define MAX98390_DEV1_NAME "max98390.2-0039" /* left */
  37. #define RT5682_CODEC_DAI "rt5682-aif1"
  38. #define RT5682_DEV0_NAME "rt5682.2-001a"
  39. #define RT5682S_CODEC_DAI "rt5682s-aif1"
  40. #define RT5682S_DEV0_NAME "rt5682s.2-001a"
  41. #define SOF_DMA_DL2 "SOF_DMA_DL2"
  42. #define SOF_DMA_DL3 "SOF_DMA_DL3"
  43. #define SOF_DMA_UL4 "SOF_DMA_UL4"
  44. #define SOF_DMA_UL5 "SOF_DMA_UL5"
  45. struct mt8195_card_data {
  46. const char *name;
  47. unsigned long quirk;
  48. };
  49. struct mt8195_mt6359_priv {
  50. struct snd_soc_jack headset_jack;
  51. struct snd_soc_jack dp_jack;
  52. struct snd_soc_jack hdmi_jack;
  53. struct clk *i2so1_mclk;
  54. };
  55. /* Headset jack detection DAPM pins */
  56. static struct snd_soc_jack_pin mt8195_jack_pins[] = {
  57. {
  58. .pin = "Headphone",
  59. .mask = SND_JACK_HEADPHONE,
  60. },
  61. {
  62. .pin = "Headset Mic",
  63. .mask = SND_JACK_MICROPHONE,
  64. },
  65. };
  66. static const struct snd_soc_dapm_widget mt8195_mt6359_widgets[] = {
  67. SND_SOC_DAPM_HP("Headphone", NULL),
  68. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  69. SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0),
  70. SND_SOC_DAPM_MIXER(SOF_DMA_DL3, SND_SOC_NOPM, 0, 0, NULL, 0),
  71. SND_SOC_DAPM_MIXER(SOF_DMA_UL4, SND_SOC_NOPM, 0, 0, NULL, 0),
  72. SND_SOC_DAPM_MIXER(SOF_DMA_UL5, SND_SOC_NOPM, 0, 0, NULL, 0),
  73. };
  74. static const struct snd_soc_dapm_route mt8195_mt6359_routes[] = {
  75. /* headset */
  76. { "Headphone", NULL, "HPOL" },
  77. { "Headphone", NULL, "HPOR" },
  78. { "IN1P", NULL, "Headset Mic" },
  79. /* SOF Uplink */
  80. {SOF_DMA_UL4, NULL, "O034"},
  81. {SOF_DMA_UL4, NULL, "O035"},
  82. {SOF_DMA_UL5, NULL, "O036"},
  83. {SOF_DMA_UL5, NULL, "O037"},
  84. /* SOF Downlink */
  85. {"I070", NULL, SOF_DMA_DL2},
  86. {"I071", NULL, SOF_DMA_DL2},
  87. {"I020", NULL, SOF_DMA_DL3},
  88. {"I021", NULL, SOF_DMA_DL3},
  89. };
  90. static const struct snd_kcontrol_new mt8195_mt6359_controls[] = {
  91. SOC_DAPM_PIN_SWITCH("Headphone"),
  92. SOC_DAPM_PIN_SWITCH("Headset Mic"),
  93. };
  94. static const struct snd_soc_dapm_widget mt8195_dual_speaker_widgets[] = {
  95. SND_SOC_DAPM_SPK("Left Spk", NULL),
  96. SND_SOC_DAPM_SPK("Right Spk", NULL),
  97. };
  98. static const struct snd_kcontrol_new mt8195_dual_speaker_controls[] = {
  99. SOC_DAPM_PIN_SWITCH("Left Spk"),
  100. SOC_DAPM_PIN_SWITCH("Right Spk"),
  101. };
  102. static const struct snd_soc_dapm_widget mt8195_speaker_widgets[] = {
  103. SND_SOC_DAPM_SPK("Ext Spk", NULL),
  104. };
  105. static const struct snd_kcontrol_new mt8195_speaker_controls[] = {
  106. SOC_DAPM_PIN_SWITCH("Ext Spk"),
  107. };
  108. static const struct snd_soc_dapm_route mt8195_rt1011_routes[] = {
  109. { "Left Spk", NULL, "Left SPO" },
  110. { "Right Spk", NULL, "Right SPO" },
  111. };
  112. static const struct snd_soc_dapm_route mt8195_rt1019_routes[] = {
  113. { "Ext Spk", NULL, "Speaker" },
  114. };
  115. static const struct snd_soc_dapm_route mt8195_max98390_routes[] = {
  116. { "Left Spk", NULL, "Left BE_OUT" },
  117. { "Right Spk", NULL, "Right BE_OUT" },
  118. };
  119. #define CKSYS_AUD_TOP_CFG 0x032c
  120. #define CKSYS_AUD_TOP_MON 0x0330
  121. static int mt8195_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd)
  122. {
  123. struct snd_soc_component *cmpnt_afe =
  124. snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
  125. struct snd_soc_component *cmpnt_codec =
  126. asoc_rtd_to_codec(rtd, 0)->component;
  127. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
  128. struct mt8195_afe_private *afe_priv = afe->platform_priv;
  129. struct mtkaif_param *param = &afe_priv->mtkaif_params;
  130. int chosen_phase_1, chosen_phase_2, chosen_phase_3;
  131. int prev_cycle_1, prev_cycle_2, prev_cycle_3;
  132. int test_done_1, test_done_2, test_done_3;
  133. int cycle_1, cycle_2, cycle_3;
  134. int mtkaif_chosen_phase[MT8195_MTKAIF_MISO_NUM];
  135. int mtkaif_phase_cycle[MT8195_MTKAIF_MISO_NUM];
  136. int mtkaif_calibration_num_phase;
  137. bool mtkaif_calibration_ok;
  138. unsigned int monitor;
  139. int counter;
  140. int phase;
  141. int i;
  142. dev_dbg(afe->dev, "%s(), start\n", __func__);
  143. param->mtkaif_calibration_ok = false;
  144. for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++) {
  145. param->mtkaif_chosen_phase[i] = -1;
  146. param->mtkaif_phase_cycle[i] = 0;
  147. mtkaif_chosen_phase[i] = -1;
  148. mtkaif_phase_cycle[i] = 0;
  149. }
  150. if (IS_ERR(afe_priv->topckgen)) {
  151. dev_info(afe->dev, "%s() Cannot find topckgen controller\n",
  152. __func__);
  153. return 0;
  154. }
  155. pm_runtime_get_sync(afe->dev);
  156. mt6359_mtkaif_calibration_enable(cmpnt_codec);
  157. /* set test type to synchronizer pulse */
  158. regmap_update_bits(afe_priv->topckgen,
  159. CKSYS_AUD_TOP_CFG, 0xffff, 0x4);
  160. mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */
  161. mtkaif_calibration_ok = true;
  162. for (phase = 0;
  163. phase <= mtkaif_calibration_num_phase && mtkaif_calibration_ok;
  164. phase++) {
  165. mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
  166. phase, phase, phase);
  167. regmap_update_bits(afe_priv->topckgen,
  168. CKSYS_AUD_TOP_CFG, 0x1, 0x1);
  169. test_done_1 = 0;
  170. test_done_2 = 0;
  171. test_done_3 = 0;
  172. cycle_1 = -1;
  173. cycle_2 = -1;
  174. cycle_3 = -1;
  175. counter = 0;
  176. while (!(test_done_1 & test_done_2 & test_done_3)) {
  177. regmap_read(afe_priv->topckgen,
  178. CKSYS_AUD_TOP_MON, &monitor);
  179. test_done_1 = (monitor >> 28) & 0x1;
  180. test_done_2 = (monitor >> 29) & 0x1;
  181. test_done_3 = (monitor >> 30) & 0x1;
  182. if (test_done_1 == 1)
  183. cycle_1 = monitor & 0xf;
  184. if (test_done_2 == 1)
  185. cycle_2 = (monitor >> 4) & 0xf;
  186. if (test_done_3 == 1)
  187. cycle_3 = (monitor >> 8) & 0xf;
  188. /* handle if never test done */
  189. if (++counter > 10000) {
  190. dev_info(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n",
  191. __func__,
  192. cycle_1, cycle_2, cycle_3, monitor);
  193. mtkaif_calibration_ok = false;
  194. break;
  195. }
  196. }
  197. if (phase == 0) {
  198. prev_cycle_1 = cycle_1;
  199. prev_cycle_2 = cycle_2;
  200. prev_cycle_3 = cycle_3;
  201. }
  202. if (cycle_1 != prev_cycle_1 &&
  203. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) {
  204. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = phase - 1;
  205. mtkaif_phase_cycle[MT8195_MTKAIF_MISO_0] = prev_cycle_1;
  206. }
  207. if (cycle_2 != prev_cycle_2 &&
  208. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) {
  209. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = phase - 1;
  210. mtkaif_phase_cycle[MT8195_MTKAIF_MISO_1] = prev_cycle_2;
  211. }
  212. if (cycle_3 != prev_cycle_3 &&
  213. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) {
  214. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = phase - 1;
  215. mtkaif_phase_cycle[MT8195_MTKAIF_MISO_2] = prev_cycle_3;
  216. }
  217. regmap_update_bits(afe_priv->topckgen,
  218. CKSYS_AUD_TOP_CFG, 0x1, 0x0);
  219. if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] >= 0 &&
  220. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] >= 0 &&
  221. mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] >= 0)
  222. break;
  223. }
  224. if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] < 0) {
  225. mtkaif_calibration_ok = false;
  226. chosen_phase_1 = 0;
  227. } else {
  228. chosen_phase_1 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0];
  229. }
  230. if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] < 0) {
  231. mtkaif_calibration_ok = false;
  232. chosen_phase_2 = 0;
  233. } else {
  234. chosen_phase_2 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1];
  235. }
  236. if (mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] < 0) {
  237. mtkaif_calibration_ok = false;
  238. chosen_phase_3 = 0;
  239. } else {
  240. chosen_phase_3 = mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2];
  241. }
  242. mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
  243. chosen_phase_1,
  244. chosen_phase_2,
  245. chosen_phase_3);
  246. mt6359_mtkaif_calibration_disable(cmpnt_codec);
  247. pm_runtime_put(afe->dev);
  248. param->mtkaif_calibration_ok = mtkaif_calibration_ok;
  249. param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_0] = chosen_phase_1;
  250. param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_1] = chosen_phase_2;
  251. param->mtkaif_chosen_phase[MT8195_MTKAIF_MISO_2] = chosen_phase_3;
  252. for (i = 0; i < MT8195_MTKAIF_MISO_NUM; i++)
  253. param->mtkaif_phase_cycle[i] = mtkaif_phase_cycle[i];
  254. dev_info(afe->dev, "%s(), end, calibration ok %d\n",
  255. __func__, param->mtkaif_calibration_ok);
  256. return 0;
  257. }
  258. static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd)
  259. {
  260. struct snd_soc_component *cmpnt_codec =
  261. asoc_rtd_to_codec(rtd, 0)->component;
  262. /* set mtkaif protocol */
  263. mt6359_set_mtkaif_protocol(cmpnt_codec,
  264. MT6359_MTKAIF_PROTOCOL_2_CLK_P2);
  265. /* mtkaif calibration */
  266. mt8195_mt6359_mtkaif_calibration(rtd);
  267. return 0;
  268. }
  269. static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream)
  270. {
  271. static const unsigned int rates[] = {
  272. 48000
  273. };
  274. static const unsigned int channels[] = {
  275. 2, 4, 6, 8
  276. };
  277. static const struct snd_pcm_hw_constraint_list constraints_rates = {
  278. .count = ARRAY_SIZE(rates),
  279. .list = rates,
  280. .mask = 0,
  281. };
  282. static const struct snd_pcm_hw_constraint_list constraints_channels = {
  283. .count = ARRAY_SIZE(channels),
  284. .list = channels,
  285. .mask = 0,
  286. };
  287. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  288. struct snd_pcm_runtime *runtime = substream->runtime;
  289. int ret;
  290. ret = snd_pcm_hw_constraint_list(runtime, 0,
  291. SNDRV_PCM_HW_PARAM_RATE,
  292. &constraints_rates);
  293. if (ret < 0) {
  294. dev_err(rtd->dev, "hw_constraint_list rate failed\n");
  295. return ret;
  296. }
  297. ret = snd_pcm_hw_constraint_list(runtime, 0,
  298. SNDRV_PCM_HW_PARAM_CHANNELS,
  299. &constraints_channels);
  300. if (ret < 0) {
  301. dev_err(rtd->dev, "hw_constraint_list channel failed\n");
  302. return ret;
  303. }
  304. return 0;
  305. }
  306. static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = {
  307. .startup = mt8195_hdmitx_dptx_startup,
  308. };
  309. static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream,
  310. struct snd_pcm_hw_params *params)
  311. {
  312. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  313. struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  314. return snd_soc_dai_set_sysclk(cpu_dai, 0, params_rate(params) * 256,
  315. SND_SOC_CLOCK_OUT);
  316. }
  317. static const struct snd_soc_ops mt8195_dptx_ops = {
  318. .hw_params = mt8195_dptx_hw_params,
  319. };
  320. static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd)
  321. {
  322. struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card);
  323. struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv;
  324. struct snd_soc_component *cmpnt_codec =
  325. asoc_rtd_to_codec(rtd, 0)->component;
  326. int ret;
  327. ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT,
  328. &priv->dp_jack);
  329. if (ret)
  330. return ret;
  331. return snd_soc_component_set_jack(cmpnt_codec, &priv->dp_jack, NULL);
  332. }
  333. static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd)
  334. {
  335. struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card);
  336. struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv;
  337. struct snd_soc_component *cmpnt_codec =
  338. asoc_rtd_to_codec(rtd, 0)->component;
  339. int ret;
  340. ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT,
  341. &priv->hdmi_jack);
  342. if (ret)
  343. return ret;
  344. return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL);
  345. }
  346. static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  347. struct snd_pcm_hw_params *params)
  348. {
  349. /* fix BE i2s format to S24_LE, clean param mask first */
  350. snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
  351. 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
  352. params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
  353. return 0;
  354. }
  355. static int mt8195_playback_startup(struct snd_pcm_substream *substream)
  356. {
  357. static const unsigned int rates[] = {
  358. 48000
  359. };
  360. static const unsigned int channels[] = {
  361. 2
  362. };
  363. static const struct snd_pcm_hw_constraint_list constraints_rates = {
  364. .count = ARRAY_SIZE(rates),
  365. .list = rates,
  366. .mask = 0,
  367. };
  368. static const struct snd_pcm_hw_constraint_list constraints_channels = {
  369. .count = ARRAY_SIZE(channels),
  370. .list = channels,
  371. .mask = 0,
  372. };
  373. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  374. struct snd_pcm_runtime *runtime = substream->runtime;
  375. int ret;
  376. ret = snd_pcm_hw_constraint_list(runtime, 0,
  377. SNDRV_PCM_HW_PARAM_RATE,
  378. &constraints_rates);
  379. if (ret < 0) {
  380. dev_err(rtd->dev, "hw_constraint_list rate failed\n");
  381. return ret;
  382. }
  383. ret = snd_pcm_hw_constraint_list(runtime, 0,
  384. SNDRV_PCM_HW_PARAM_CHANNELS,
  385. &constraints_channels);
  386. if (ret < 0) {
  387. dev_err(rtd->dev, "hw_constraint_list channel failed\n");
  388. return ret;
  389. }
  390. return 0;
  391. }
  392. static const struct snd_soc_ops mt8195_playback_ops = {
  393. .startup = mt8195_playback_startup,
  394. };
  395. static int mt8195_capture_startup(struct snd_pcm_substream *substream)
  396. {
  397. static const unsigned int rates[] = {
  398. 48000
  399. };
  400. static const unsigned int channels[] = {
  401. 1, 2
  402. };
  403. static const struct snd_pcm_hw_constraint_list constraints_rates = {
  404. .count = ARRAY_SIZE(rates),
  405. .list = rates,
  406. .mask = 0,
  407. };
  408. static const struct snd_pcm_hw_constraint_list constraints_channels = {
  409. .count = ARRAY_SIZE(channels),
  410. .list = channels,
  411. .mask = 0,
  412. };
  413. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  414. struct snd_pcm_runtime *runtime = substream->runtime;
  415. int ret;
  416. ret = snd_pcm_hw_constraint_list(runtime, 0,
  417. SNDRV_PCM_HW_PARAM_RATE,
  418. &constraints_rates);
  419. if (ret < 0) {
  420. dev_err(rtd->dev, "hw_constraint_list rate failed\n");
  421. return ret;
  422. }
  423. ret = snd_pcm_hw_constraint_list(runtime, 0,
  424. SNDRV_PCM_HW_PARAM_CHANNELS,
  425. &constraints_channels);
  426. if (ret < 0) {
  427. dev_err(rtd->dev, "hw_constraint_list channel failed\n");
  428. return ret;
  429. }
  430. return 0;
  431. }
  432. static const struct snd_soc_ops mt8195_capture_ops = {
  433. .startup = mt8195_capture_startup,
  434. };
  435. static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream,
  436. struct snd_pcm_hw_params *params)
  437. {
  438. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  439. struct snd_soc_card *card = rtd->card;
  440. struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  441. struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
  442. unsigned int rate = params_rate(params);
  443. int bitwidth;
  444. int ret;
  445. bitwidth = snd_pcm_format_width(params_format(params));
  446. if (bitwidth < 0) {
  447. dev_err(card->dev, "invalid bit width: %d\n", bitwidth);
  448. return bitwidth;
  449. }
  450. ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth);
  451. if (ret) {
  452. dev_err(card->dev, "failed to set tdm slot\n");
  453. return ret;
  454. }
  455. ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1, RT5682_PLL1_S_MCLK,
  456. rate * 256, rate * 512);
  457. if (ret) {
  458. dev_err(card->dev, "failed to set pll\n");
  459. return ret;
  460. }
  461. ret = snd_soc_dai_set_sysclk(codec_dai, RT5682_SCLK_S_PLL1,
  462. rate * 512, SND_SOC_CLOCK_IN);
  463. if (ret) {
  464. dev_err(card->dev, "failed to set sysclk\n");
  465. return ret;
  466. }
  467. return snd_soc_dai_set_sysclk(cpu_dai, 0, rate * 256,
  468. SND_SOC_CLOCK_OUT);
  469. }
  470. static const struct snd_soc_ops mt8195_rt5682_etdm_ops = {
  471. .hw_params = mt8195_rt5682_etdm_hw_params,
  472. };
  473. static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd)
  474. {
  475. struct snd_soc_component *cmpnt_codec =
  476. asoc_rtd_to_codec(rtd, 0)->component;
  477. struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card);
  478. struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv;
  479. struct snd_soc_jack *jack = &priv->headset_jack;
  480. struct snd_soc_component *cmpnt_afe =
  481. snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
  482. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
  483. struct mt8195_afe_private *afe_priv = afe->platform_priv;
  484. int ret;
  485. priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2];
  486. ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack",
  487. SND_JACK_HEADSET | SND_JACK_BTN_0 |
  488. SND_JACK_BTN_1 | SND_JACK_BTN_2 |
  489. SND_JACK_BTN_3,
  490. jack, mt8195_jack_pins,
  491. ARRAY_SIZE(mt8195_jack_pins));
  492. if (ret) {
  493. dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret);
  494. return ret;
  495. }
  496. snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
  497. snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
  498. snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
  499. snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
  500. ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL);
  501. if (ret) {
  502. dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret);
  503. return ret;
  504. }
  505. return 0;
  506. };
  507. static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream,
  508. struct snd_pcm_hw_params *params)
  509. {
  510. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  511. struct snd_soc_dai *codec_dai;
  512. struct snd_soc_card *card = rtd->card;
  513. int srate, i, ret;
  514. srate = params_rate(params);
  515. for_each_rtd_codec_dais(rtd, i, codec_dai) {
  516. ret = snd_soc_dai_set_pll(codec_dai, 0, RT1011_PLL1_S_BCLK,
  517. 64 * srate, 256 * srate);
  518. if (ret < 0) {
  519. dev_err(card->dev, "codec_dai clock not set\n");
  520. return ret;
  521. }
  522. ret = snd_soc_dai_set_sysclk(codec_dai,
  523. RT1011_FS_SYS_PRE_S_PLL1,
  524. 256 * srate, SND_SOC_CLOCK_IN);
  525. if (ret < 0) {
  526. dev_err(card->dev, "codec_dai clock not set\n");
  527. return ret;
  528. }
  529. }
  530. return 0;
  531. }
  532. static const struct snd_soc_ops mt8195_rt1011_etdm_ops = {
  533. .hw_params = mt8195_rt1011_etdm_hw_params,
  534. };
  535. static int mt8195_rt1011_init(struct snd_soc_pcm_runtime *rtd)
  536. {
  537. struct snd_soc_card *card = rtd->card;
  538. int ret;
  539. ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets,
  540. ARRAY_SIZE(mt8195_dual_speaker_widgets));
  541. if (ret) {
  542. dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret);
  543. /* Don't need to add routes if widget addition failed */
  544. return ret;
  545. }
  546. ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls,
  547. ARRAY_SIZE(mt8195_dual_speaker_controls));
  548. if (ret) {
  549. dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret);
  550. return ret;
  551. }
  552. ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1011_routes,
  553. ARRAY_SIZE(mt8195_rt1011_routes));
  554. if (ret)
  555. dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret);
  556. return ret;
  557. }
  558. static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd)
  559. {
  560. struct snd_soc_card *card = rtd->card;
  561. int ret;
  562. ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_speaker_widgets,
  563. ARRAY_SIZE(mt8195_speaker_widgets));
  564. if (ret) {
  565. dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret);
  566. /* Don't need to add routes if widget addition failed */
  567. return ret;
  568. }
  569. ret = snd_soc_add_card_controls(card, mt8195_speaker_controls,
  570. ARRAY_SIZE(mt8195_speaker_controls));
  571. if (ret) {
  572. dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret);
  573. return ret;
  574. }
  575. ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1019_routes,
  576. ARRAY_SIZE(mt8195_rt1019_routes));
  577. if (ret)
  578. dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret);
  579. return ret;
  580. }
  581. static int mt8195_max98390_init(struct snd_soc_pcm_runtime *rtd)
  582. {
  583. struct snd_soc_card *card = rtd->card;
  584. int ret;
  585. ret = snd_soc_dapm_new_controls(&card->dapm, mt8195_dual_speaker_widgets,
  586. ARRAY_SIZE(mt8195_dual_speaker_widgets));
  587. if (ret) {
  588. dev_err(rtd->dev, "unable to add dapm controls, ret %d\n", ret);
  589. /* Don't need to add routes if widget addition failed */
  590. return ret;
  591. }
  592. ret = snd_soc_add_card_controls(card, mt8195_dual_speaker_controls,
  593. ARRAY_SIZE(mt8195_dual_speaker_controls));
  594. if (ret) {
  595. dev_err(rtd->dev, "unable to add card controls, ret %d\n", ret);
  596. return ret;
  597. }
  598. ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_max98390_routes,
  599. ARRAY_SIZE(mt8195_max98390_routes));
  600. if (ret)
  601. dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret);
  602. return ret;
  603. }
  604. static int mt8195_etdm_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  605. struct snd_pcm_hw_params *params)
  606. {
  607. /* fix BE i2s format to S24_LE, clean param mask first */
  608. snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
  609. 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
  610. params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
  611. return 0;
  612. }
  613. static int mt8195_set_bias_level_post(struct snd_soc_card *card,
  614. struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
  615. {
  616. struct snd_soc_component *component = dapm->component;
  617. struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card);
  618. struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv;
  619. int ret;
  620. /*
  621. * It's required to control mclk directly in the set_bias_level_post
  622. * function for rt5682 and rt5682s codec, or the unexpected pop happens
  623. * at the end of playback.
  624. */
  625. if (!component ||
  626. (strcmp(component->name, RT5682_DEV0_NAME) &&
  627. strcmp(component->name, RT5682S_DEV0_NAME)))
  628. return 0;
  629. switch (level) {
  630. case SND_SOC_BIAS_OFF:
  631. if (!__clk_is_enabled(priv->i2so1_mclk))
  632. return 0;
  633. clk_disable_unprepare(priv->i2so1_mclk);
  634. dev_dbg(card->dev, "Disable i2so1 mclk\n");
  635. break;
  636. case SND_SOC_BIAS_ON:
  637. ret = clk_prepare_enable(priv->i2so1_mclk);
  638. if (ret) {
  639. dev_err(card->dev, "Can't enable i2so1 mclk: %d\n", ret);
  640. return ret;
  641. }
  642. dev_dbg(card->dev, "Enable i2so1 mclk\n");
  643. break;
  644. default:
  645. break;
  646. }
  647. return 0;
  648. }
  649. enum {
  650. DAI_LINK_DL2_FE,
  651. DAI_LINK_DL3_FE,
  652. DAI_LINK_DL6_FE,
  653. DAI_LINK_DL7_FE,
  654. DAI_LINK_DL8_FE,
  655. DAI_LINK_DL10_FE,
  656. DAI_LINK_DL11_FE,
  657. DAI_LINK_UL1_FE,
  658. DAI_LINK_UL2_FE,
  659. DAI_LINK_UL3_FE,
  660. DAI_LINK_UL4_FE,
  661. DAI_LINK_UL5_FE,
  662. DAI_LINK_UL6_FE,
  663. DAI_LINK_UL8_FE,
  664. DAI_LINK_UL9_FE,
  665. DAI_LINK_UL10_FE,
  666. DAI_LINK_DL_SRC_BE,
  667. DAI_LINK_DPTX_BE,
  668. DAI_LINK_ETDM1_IN_BE,
  669. DAI_LINK_ETDM2_IN_BE,
  670. DAI_LINK_ETDM1_OUT_BE,
  671. DAI_LINK_ETDM2_OUT_BE,
  672. DAI_LINK_ETDM3_OUT_BE,
  673. DAI_LINK_PCM1_BE,
  674. DAI_LINK_UL_SRC1_BE,
  675. DAI_LINK_UL_SRC2_BE,
  676. DAI_LINK_REGULAR_LAST = DAI_LINK_UL_SRC2_BE,
  677. DAI_LINK_SOF_START,
  678. DAI_LINK_SOF_DL2_BE = DAI_LINK_SOF_START,
  679. DAI_LINK_SOF_DL3_BE,
  680. DAI_LINK_SOF_UL4_BE,
  681. DAI_LINK_SOF_UL5_BE,
  682. DAI_LINK_SOF_END = DAI_LINK_SOF_UL5_BE,
  683. };
  684. #define DAI_LINK_REGULAR_NUM (DAI_LINK_REGULAR_LAST + 1)
  685. /* FE */
  686. SND_SOC_DAILINK_DEFS(DL2_FE,
  687. DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
  688. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  689. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  690. SND_SOC_DAILINK_DEFS(DL3_FE,
  691. DAILINK_COMP_ARRAY(COMP_CPU("DL3")),
  692. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  693. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  694. SND_SOC_DAILINK_DEFS(DL6_FE,
  695. DAILINK_COMP_ARRAY(COMP_CPU("DL6")),
  696. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  697. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  698. SND_SOC_DAILINK_DEFS(DL7_FE,
  699. DAILINK_COMP_ARRAY(COMP_CPU("DL7")),
  700. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  701. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  702. SND_SOC_DAILINK_DEFS(DL8_FE,
  703. DAILINK_COMP_ARRAY(COMP_CPU("DL8")),
  704. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  705. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  706. SND_SOC_DAILINK_DEFS(DL10_FE,
  707. DAILINK_COMP_ARRAY(COMP_CPU("DL10")),
  708. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  709. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  710. SND_SOC_DAILINK_DEFS(DL11_FE,
  711. DAILINK_COMP_ARRAY(COMP_CPU("DL11")),
  712. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  713. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  714. SND_SOC_DAILINK_DEFS(UL1_FE,
  715. DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
  716. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  717. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  718. SND_SOC_DAILINK_DEFS(UL2_FE,
  719. DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
  720. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  721. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  722. SND_SOC_DAILINK_DEFS(UL3_FE,
  723. DAILINK_COMP_ARRAY(COMP_CPU("UL3")),
  724. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  725. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  726. SND_SOC_DAILINK_DEFS(UL4_FE,
  727. DAILINK_COMP_ARRAY(COMP_CPU("UL4")),
  728. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  729. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  730. SND_SOC_DAILINK_DEFS(UL5_FE,
  731. DAILINK_COMP_ARRAY(COMP_CPU("UL5")),
  732. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  733. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  734. SND_SOC_DAILINK_DEFS(UL6_FE,
  735. DAILINK_COMP_ARRAY(COMP_CPU("UL6")),
  736. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  737. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  738. SND_SOC_DAILINK_DEFS(UL8_FE,
  739. DAILINK_COMP_ARRAY(COMP_CPU("UL8")),
  740. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  741. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  742. SND_SOC_DAILINK_DEFS(UL9_FE,
  743. DAILINK_COMP_ARRAY(COMP_CPU("UL9")),
  744. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  745. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  746. SND_SOC_DAILINK_DEFS(UL10_FE,
  747. DAILINK_COMP_ARRAY(COMP_CPU("UL10")),
  748. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  749. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  750. /* BE */
  751. SND_SOC_DAILINK_DEFS(DL_SRC_BE,
  752. DAILINK_COMP_ARRAY(COMP_CPU("DL_SRC")),
  753. DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
  754. "mt6359-snd-codec-aif1")),
  755. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  756. SND_SOC_DAILINK_DEFS(DPTX_BE,
  757. DAILINK_COMP_ARRAY(COMP_CPU("DPTX")),
  758. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  759. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  760. SND_SOC_DAILINK_DEFS(ETDM1_IN_BE,
  761. DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_IN")),
  762. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  763. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  764. SND_SOC_DAILINK_DEFS(ETDM2_IN_BE,
  765. DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")),
  766. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  767. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  768. SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE,
  769. DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")),
  770. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  771. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  772. SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE,
  773. DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_OUT")),
  774. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  775. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  776. SND_SOC_DAILINK_DEFS(ETDM3_OUT_BE,
  777. DAILINK_COMP_ARRAY(COMP_CPU("ETDM3_OUT")),
  778. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  779. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  780. SND_SOC_DAILINK_DEFS(PCM1_BE,
  781. DAILINK_COMP_ARRAY(COMP_CPU("PCM1")),
  782. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  783. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  784. SND_SOC_DAILINK_DEFS(UL_SRC1_BE,
  785. DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC1")),
  786. DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
  787. "mt6359-snd-codec-aif1"),
  788. COMP_CODEC("dmic-codec",
  789. "dmic-hifi")),
  790. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  791. SND_SOC_DAILINK_DEFS(UL_SRC2_BE,
  792. DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC2")),
  793. DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
  794. "mt6359-snd-codec-aif2")),
  795. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  796. SND_SOC_DAILINK_DEFS(AFE_SOF_DL2,
  797. DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL2")),
  798. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  799. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  800. SND_SOC_DAILINK_DEFS(AFE_SOF_DL3,
  801. DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL3")),
  802. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  803. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  804. SND_SOC_DAILINK_DEFS(AFE_SOF_UL4,
  805. DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL4")),
  806. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  807. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  808. SND_SOC_DAILINK_DEFS(AFE_SOF_UL5,
  809. DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL5")),
  810. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  811. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  812. /* codec */
  813. SND_SOC_DAILINK_DEF(rt1019_comps,
  814. DAILINK_COMP_ARRAY(COMP_CODEC(RT1019_DEV0_NAME,
  815. RT1019_CODEC_DAI)));
  816. SND_SOC_DAILINK_DEF(rt1011_comps,
  817. DAILINK_COMP_ARRAY(COMP_CODEC(RT1011_DEV0_NAME,
  818. RT1011_CODEC_DAI),
  819. COMP_CODEC(RT1011_DEV1_NAME,
  820. RT1011_CODEC_DAI)));
  821. SND_SOC_DAILINK_DEF(max98390_comps,
  822. DAILINK_COMP_ARRAY(COMP_CODEC(MAX98390_DEV0_NAME,
  823. MAX98390_CODEC_DAI),
  824. COMP_CODEC(MAX98390_DEV1_NAME,
  825. MAX98390_CODEC_DAI)));
  826. static const struct sof_conn_stream g_sof_conn_streams[] = {
  827. { "ETDM2_OUT_BE", "AFE_SOF_DL2", SOF_DMA_DL2, SNDRV_PCM_STREAM_PLAYBACK},
  828. { "ETDM1_OUT_BE", "AFE_SOF_DL3", SOF_DMA_DL3, SNDRV_PCM_STREAM_PLAYBACK},
  829. { "UL_SRC1_BE", "AFE_SOF_UL4", SOF_DMA_UL4, SNDRV_PCM_STREAM_CAPTURE},
  830. { "ETDM2_IN_BE", "AFE_SOF_UL5", SOF_DMA_UL5, SNDRV_PCM_STREAM_CAPTURE},
  831. };
  832. static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = {
  833. /* FE */
  834. [DAI_LINK_DL2_FE] = {
  835. .name = "DL2_FE",
  836. .stream_name = "DL2 Playback",
  837. .trigger = {
  838. SND_SOC_DPCM_TRIGGER_POST,
  839. SND_SOC_DPCM_TRIGGER_POST,
  840. },
  841. .dynamic = 1,
  842. .dpcm_playback = 1,
  843. .ops = &mt8195_playback_ops,
  844. SND_SOC_DAILINK_REG(DL2_FE),
  845. },
  846. [DAI_LINK_DL3_FE] = {
  847. .name = "DL3_FE",
  848. .stream_name = "DL3 Playback",
  849. .trigger = {
  850. SND_SOC_DPCM_TRIGGER_POST,
  851. SND_SOC_DPCM_TRIGGER_POST,
  852. },
  853. .dynamic = 1,
  854. .dpcm_playback = 1,
  855. .ops = &mt8195_playback_ops,
  856. SND_SOC_DAILINK_REG(DL3_FE),
  857. },
  858. [DAI_LINK_DL6_FE] = {
  859. .name = "DL6_FE",
  860. .stream_name = "DL6 Playback",
  861. .trigger = {
  862. SND_SOC_DPCM_TRIGGER_POST,
  863. SND_SOC_DPCM_TRIGGER_POST,
  864. },
  865. .dynamic = 1,
  866. .dpcm_playback = 1,
  867. .ops = &mt8195_playback_ops,
  868. SND_SOC_DAILINK_REG(DL6_FE),
  869. },
  870. [DAI_LINK_DL7_FE] = {
  871. .name = "DL7_FE",
  872. .stream_name = "DL7 Playback",
  873. .trigger = {
  874. SND_SOC_DPCM_TRIGGER_PRE,
  875. SND_SOC_DPCM_TRIGGER_PRE,
  876. },
  877. .dynamic = 1,
  878. .dpcm_playback = 1,
  879. SND_SOC_DAILINK_REG(DL7_FE),
  880. },
  881. [DAI_LINK_DL8_FE] = {
  882. .name = "DL8_FE",
  883. .stream_name = "DL8 Playback",
  884. .trigger = {
  885. SND_SOC_DPCM_TRIGGER_POST,
  886. SND_SOC_DPCM_TRIGGER_POST,
  887. },
  888. .dynamic = 1,
  889. .dpcm_playback = 1,
  890. .ops = &mt8195_playback_ops,
  891. SND_SOC_DAILINK_REG(DL8_FE),
  892. },
  893. [DAI_LINK_DL10_FE] = {
  894. .name = "DL10_FE",
  895. .stream_name = "DL10 Playback",
  896. .trigger = {
  897. SND_SOC_DPCM_TRIGGER_POST,
  898. SND_SOC_DPCM_TRIGGER_POST,
  899. },
  900. .dynamic = 1,
  901. .dpcm_playback = 1,
  902. .ops = &mt8195_hdmitx_dptx_playback_ops,
  903. SND_SOC_DAILINK_REG(DL10_FE),
  904. },
  905. [DAI_LINK_DL11_FE] = {
  906. .name = "DL11_FE",
  907. .stream_name = "DL11 Playback",
  908. .trigger = {
  909. SND_SOC_DPCM_TRIGGER_POST,
  910. SND_SOC_DPCM_TRIGGER_POST,
  911. },
  912. .dynamic = 1,
  913. .dpcm_playback = 1,
  914. .ops = &mt8195_playback_ops,
  915. SND_SOC_DAILINK_REG(DL11_FE),
  916. },
  917. [DAI_LINK_UL1_FE] = {
  918. .name = "UL1_FE",
  919. .stream_name = "UL1 Capture",
  920. .trigger = {
  921. SND_SOC_DPCM_TRIGGER_PRE,
  922. SND_SOC_DPCM_TRIGGER_PRE,
  923. },
  924. .dynamic = 1,
  925. .dpcm_capture = 1,
  926. SND_SOC_DAILINK_REG(UL1_FE),
  927. },
  928. [DAI_LINK_UL2_FE] = {
  929. .name = "UL2_FE",
  930. .stream_name = "UL2 Capture",
  931. .trigger = {
  932. SND_SOC_DPCM_TRIGGER_POST,
  933. SND_SOC_DPCM_TRIGGER_POST,
  934. },
  935. .dynamic = 1,
  936. .dpcm_capture = 1,
  937. .ops = &mt8195_capture_ops,
  938. SND_SOC_DAILINK_REG(UL2_FE),
  939. },
  940. [DAI_LINK_UL3_FE] = {
  941. .name = "UL3_FE",
  942. .stream_name = "UL3 Capture",
  943. .trigger = {
  944. SND_SOC_DPCM_TRIGGER_POST,
  945. SND_SOC_DPCM_TRIGGER_POST,
  946. },
  947. .dynamic = 1,
  948. .dpcm_capture = 1,
  949. .ops = &mt8195_capture_ops,
  950. SND_SOC_DAILINK_REG(UL3_FE),
  951. },
  952. [DAI_LINK_UL4_FE] = {
  953. .name = "UL4_FE",
  954. .stream_name = "UL4 Capture",
  955. .trigger = {
  956. SND_SOC_DPCM_TRIGGER_POST,
  957. SND_SOC_DPCM_TRIGGER_POST,
  958. },
  959. .dynamic = 1,
  960. .dpcm_capture = 1,
  961. .ops = &mt8195_capture_ops,
  962. SND_SOC_DAILINK_REG(UL4_FE),
  963. },
  964. [DAI_LINK_UL5_FE] = {
  965. .name = "UL5_FE",
  966. .stream_name = "UL5 Capture",
  967. .trigger = {
  968. SND_SOC_DPCM_TRIGGER_POST,
  969. SND_SOC_DPCM_TRIGGER_POST,
  970. },
  971. .dynamic = 1,
  972. .dpcm_capture = 1,
  973. .ops = &mt8195_capture_ops,
  974. SND_SOC_DAILINK_REG(UL5_FE),
  975. },
  976. [DAI_LINK_UL6_FE] = {
  977. .name = "UL6_FE",
  978. .stream_name = "UL6 Capture",
  979. .trigger = {
  980. SND_SOC_DPCM_TRIGGER_PRE,
  981. SND_SOC_DPCM_TRIGGER_PRE,
  982. },
  983. .dynamic = 1,
  984. .dpcm_capture = 1,
  985. SND_SOC_DAILINK_REG(UL6_FE),
  986. },
  987. [DAI_LINK_UL8_FE] = {
  988. .name = "UL8_FE",
  989. .stream_name = "UL8 Capture",
  990. .trigger = {
  991. SND_SOC_DPCM_TRIGGER_POST,
  992. SND_SOC_DPCM_TRIGGER_POST,
  993. },
  994. .dynamic = 1,
  995. .dpcm_capture = 1,
  996. .ops = &mt8195_capture_ops,
  997. SND_SOC_DAILINK_REG(UL8_FE),
  998. },
  999. [DAI_LINK_UL9_FE] = {
  1000. .name = "UL9_FE",
  1001. .stream_name = "UL9 Capture",
  1002. .trigger = {
  1003. SND_SOC_DPCM_TRIGGER_POST,
  1004. SND_SOC_DPCM_TRIGGER_POST,
  1005. },
  1006. .dynamic = 1,
  1007. .dpcm_capture = 1,
  1008. .ops = &mt8195_capture_ops,
  1009. SND_SOC_DAILINK_REG(UL9_FE),
  1010. },
  1011. [DAI_LINK_UL10_FE] = {
  1012. .name = "UL10_FE",
  1013. .stream_name = "UL10 Capture",
  1014. .trigger = {
  1015. SND_SOC_DPCM_TRIGGER_POST,
  1016. SND_SOC_DPCM_TRIGGER_POST,
  1017. },
  1018. .dynamic = 1,
  1019. .dpcm_capture = 1,
  1020. .ops = &mt8195_capture_ops,
  1021. SND_SOC_DAILINK_REG(UL10_FE),
  1022. },
  1023. /* BE */
  1024. [DAI_LINK_DL_SRC_BE] = {
  1025. .name = "DL_SRC_BE",
  1026. .no_pcm = 1,
  1027. .dpcm_playback = 1,
  1028. SND_SOC_DAILINK_REG(DL_SRC_BE),
  1029. },
  1030. [DAI_LINK_DPTX_BE] = {
  1031. .name = "DPTX_BE",
  1032. .no_pcm = 1,
  1033. .dpcm_playback = 1,
  1034. .ops = &mt8195_dptx_ops,
  1035. .be_hw_params_fixup = mt8195_dptx_hw_params_fixup,
  1036. SND_SOC_DAILINK_REG(DPTX_BE),
  1037. },
  1038. [DAI_LINK_ETDM1_IN_BE] = {
  1039. .name = "ETDM1_IN_BE",
  1040. .no_pcm = 1,
  1041. .dai_fmt = SND_SOC_DAIFMT_I2S |
  1042. SND_SOC_DAIFMT_NB_NF |
  1043. SND_SOC_DAIFMT_CBS_CFS,
  1044. .dpcm_capture = 1,
  1045. SND_SOC_DAILINK_REG(ETDM1_IN_BE),
  1046. },
  1047. [DAI_LINK_ETDM2_IN_BE] = {
  1048. .name = "ETDM2_IN_BE",
  1049. .no_pcm = 1,
  1050. .dai_fmt = SND_SOC_DAIFMT_I2S |
  1051. SND_SOC_DAIFMT_NB_NF |
  1052. SND_SOC_DAIFMT_CBS_CFS,
  1053. .dpcm_capture = 1,
  1054. .init = mt8195_rt5682_init,
  1055. .ops = &mt8195_rt5682_etdm_ops,
  1056. .be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
  1057. SND_SOC_DAILINK_REG(ETDM2_IN_BE),
  1058. },
  1059. [DAI_LINK_ETDM1_OUT_BE] = {
  1060. .name = "ETDM1_OUT_BE",
  1061. .no_pcm = 1,
  1062. .dai_fmt = SND_SOC_DAIFMT_I2S |
  1063. SND_SOC_DAIFMT_NB_NF |
  1064. SND_SOC_DAIFMT_CBS_CFS,
  1065. .dpcm_playback = 1,
  1066. .ops = &mt8195_rt5682_etdm_ops,
  1067. .be_hw_params_fixup = mt8195_etdm_hw_params_fixup,
  1068. SND_SOC_DAILINK_REG(ETDM1_OUT_BE),
  1069. },
  1070. [DAI_LINK_ETDM2_OUT_BE] = {
  1071. .name = "ETDM2_OUT_BE",
  1072. .no_pcm = 1,
  1073. .dai_fmt = SND_SOC_DAIFMT_I2S |
  1074. SND_SOC_DAIFMT_NB_NF |
  1075. SND_SOC_DAIFMT_CBS_CFS,
  1076. .dpcm_playback = 1,
  1077. SND_SOC_DAILINK_REG(ETDM2_OUT_BE),
  1078. },
  1079. [DAI_LINK_ETDM3_OUT_BE] = {
  1080. .name = "ETDM3_OUT_BE",
  1081. .no_pcm = 1,
  1082. .dai_fmt = SND_SOC_DAIFMT_I2S |
  1083. SND_SOC_DAIFMT_NB_NF |
  1084. SND_SOC_DAIFMT_CBS_CFS,
  1085. .dpcm_playback = 1,
  1086. SND_SOC_DAILINK_REG(ETDM3_OUT_BE),
  1087. },
  1088. [DAI_LINK_PCM1_BE] = {
  1089. .name = "PCM1_BE",
  1090. .no_pcm = 1,
  1091. .dai_fmt = SND_SOC_DAIFMT_I2S |
  1092. SND_SOC_DAIFMT_NB_NF |
  1093. SND_SOC_DAIFMT_CBS_CFS,
  1094. .dpcm_playback = 1,
  1095. .dpcm_capture = 1,
  1096. SND_SOC_DAILINK_REG(PCM1_BE),
  1097. },
  1098. [DAI_LINK_UL_SRC1_BE] = {
  1099. .name = "UL_SRC1_BE",
  1100. .no_pcm = 1,
  1101. .dpcm_capture = 1,
  1102. SND_SOC_DAILINK_REG(UL_SRC1_BE),
  1103. },
  1104. [DAI_LINK_UL_SRC2_BE] = {
  1105. .name = "UL_SRC2_BE",
  1106. .no_pcm = 1,
  1107. .dpcm_capture = 1,
  1108. SND_SOC_DAILINK_REG(UL_SRC2_BE),
  1109. },
  1110. /* SOF BE */
  1111. [DAI_LINK_SOF_DL2_BE] = {
  1112. .name = "AFE_SOF_DL2",
  1113. .no_pcm = 1,
  1114. .dpcm_playback = 1,
  1115. SND_SOC_DAILINK_REG(AFE_SOF_DL2),
  1116. },
  1117. [DAI_LINK_SOF_DL3_BE] = {
  1118. .name = "AFE_SOF_DL3",
  1119. .no_pcm = 1,
  1120. .dpcm_playback = 1,
  1121. SND_SOC_DAILINK_REG(AFE_SOF_DL3),
  1122. },
  1123. [DAI_LINK_SOF_UL4_BE] = {
  1124. .name = "AFE_SOF_UL4",
  1125. .no_pcm = 1,
  1126. .dpcm_capture = 1,
  1127. SND_SOC_DAILINK_REG(AFE_SOF_UL4),
  1128. },
  1129. [DAI_LINK_SOF_UL5_BE] = {
  1130. .name = "AFE_SOF_UL5",
  1131. .no_pcm = 1,
  1132. .dpcm_capture = 1,
  1133. SND_SOC_DAILINK_REG(AFE_SOF_UL5),
  1134. },
  1135. };
  1136. static struct snd_soc_codec_conf rt1011_codec_conf[] = {
  1137. {
  1138. .dlc = COMP_CODEC_CONF(RT1011_DEV0_NAME),
  1139. .name_prefix = "Left",
  1140. },
  1141. {
  1142. .dlc = COMP_CODEC_CONF(RT1011_DEV1_NAME),
  1143. .name_prefix = "Right",
  1144. },
  1145. };
  1146. static struct snd_soc_codec_conf max98390_codec_conf[] = {
  1147. {
  1148. .dlc = COMP_CODEC_CONF(MAX98390_DEV0_NAME),
  1149. .name_prefix = "Right",
  1150. },
  1151. {
  1152. .dlc = COMP_CODEC_CONF(MAX98390_DEV1_NAME),
  1153. .name_prefix = "Left",
  1154. },
  1155. };
  1156. static struct snd_soc_card mt8195_mt6359_soc_card = {
  1157. .owner = THIS_MODULE,
  1158. .dai_link = mt8195_mt6359_dai_links,
  1159. .num_links = ARRAY_SIZE(mt8195_mt6359_dai_links),
  1160. .controls = mt8195_mt6359_controls,
  1161. .num_controls = ARRAY_SIZE(mt8195_mt6359_controls),
  1162. .dapm_widgets = mt8195_mt6359_widgets,
  1163. .num_dapm_widgets = ARRAY_SIZE(mt8195_mt6359_widgets),
  1164. .dapm_routes = mt8195_mt6359_routes,
  1165. .num_dapm_routes = ARRAY_SIZE(mt8195_mt6359_routes),
  1166. .set_bias_level_post = mt8195_set_bias_level_post,
  1167. };
  1168. /* fixup the BE DAI link to match any values from topology */
  1169. static int mt8195_dai_link_fixup(struct snd_soc_pcm_runtime *rtd,
  1170. struct snd_pcm_hw_params *params)
  1171. {
  1172. int ret;
  1173. ret = mtk_sof_dai_link_fixup(rtd, params);
  1174. if (!strcmp(rtd->dai_link->name, "ETDM2_IN_BE") ||
  1175. !strcmp(rtd->dai_link->name, "ETDM1_OUT_BE")) {
  1176. mt8195_etdm_hw_params_fixup(rtd, params);
  1177. }
  1178. return ret;
  1179. }
  1180. static int mt8195_mt6359_dev_probe(struct platform_device *pdev)
  1181. {
  1182. struct snd_soc_card *card = &mt8195_mt6359_soc_card;
  1183. struct snd_soc_dai_link *dai_link;
  1184. struct mtk_soc_card_data *soc_card_data;
  1185. struct mt8195_mt6359_priv *mach_priv;
  1186. struct device_node *platform_node, *adsp_node, *dp_node, *hdmi_node;
  1187. struct mt8195_card_data *card_data;
  1188. int is5682s = 0;
  1189. int init6359 = 0;
  1190. int sof_on = 0;
  1191. int ret, i;
  1192. card_data = (struct mt8195_card_data *)of_device_get_match_data(&pdev->dev);
  1193. card->dev = &pdev->dev;
  1194. ret = snd_soc_of_parse_card_name(card, "model");
  1195. if (ret) {
  1196. dev_err(&pdev->dev, "%s new card name parsing error %d\n",
  1197. __func__, ret);
  1198. return ret;
  1199. }
  1200. if (!card->name)
  1201. card->name = card_data->name;
  1202. if (strstr(card->name, "_5682s"))
  1203. is5682s = 1;
  1204. soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*card_data), GFP_KERNEL);
  1205. if (!soc_card_data)
  1206. return -ENOMEM;
  1207. mach_priv = devm_kzalloc(&pdev->dev, sizeof(*mach_priv), GFP_KERNEL);
  1208. if (!mach_priv)
  1209. return -ENOMEM;
  1210. soc_card_data->mach_priv = mach_priv;
  1211. adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0);
  1212. if (adsp_node) {
  1213. struct mtk_sof_priv *sof_priv;
  1214. sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL);
  1215. if (!sof_priv) {
  1216. ret = -ENOMEM;
  1217. goto err_kzalloc;
  1218. }
  1219. sof_priv->conn_streams = g_sof_conn_streams;
  1220. sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams);
  1221. sof_priv->sof_dai_link_fixup = mt8195_dai_link_fixup;
  1222. soc_card_data->sof_priv = sof_priv;
  1223. card->probe = mtk_sof_card_probe;
  1224. card->late_probe = mtk_sof_card_late_probe;
  1225. if (!card->topology_shortname_created) {
  1226. snprintf(card->topology_shortname, 32, "sof-%s", card->name);
  1227. card->topology_shortname_created = true;
  1228. }
  1229. card->name = card->topology_shortname;
  1230. sof_on = 1;
  1231. }
  1232. if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) {
  1233. ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node,
  1234. "mediatek,dai-link",
  1235. mt8195_mt6359_dai_links,
  1236. ARRAY_SIZE(mt8195_mt6359_dai_links));
  1237. if (ret) {
  1238. dev_dbg(&pdev->dev, "Parse dai-link fail\n");
  1239. goto err_parse_of;
  1240. }
  1241. } else {
  1242. if (!sof_on)
  1243. card->num_links = DAI_LINK_REGULAR_NUM;
  1244. }
  1245. platform_node = of_parse_phandle(pdev->dev.of_node,
  1246. "mediatek,platform", 0);
  1247. if (!platform_node) {
  1248. dev_dbg(&pdev->dev, "Property 'platform' missing or invalid\n");
  1249. ret = -EINVAL;
  1250. goto err_platform_node;
  1251. }
  1252. dp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,dptx-codec", 0);
  1253. hdmi_node = of_parse_phandle(pdev->dev.of_node,
  1254. "mediatek,hdmi-codec", 0);
  1255. for_each_card_prelinks(card, i, dai_link) {
  1256. if (!dai_link->platforms->name) {
  1257. if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && sof_on)
  1258. dai_link->platforms->of_node = adsp_node;
  1259. else
  1260. dai_link->platforms->of_node = platform_node;
  1261. }
  1262. if (strcmp(dai_link->name, "DPTX_BE") == 0) {
  1263. if (!dp_node) {
  1264. dev_dbg(&pdev->dev, "No property 'dptx-codec'\n");
  1265. } else {
  1266. dai_link->codecs->of_node = dp_node;
  1267. dai_link->codecs->name = NULL;
  1268. dai_link->codecs->dai_name = "i2s-hifi";
  1269. dai_link->init = mt8195_dptx_codec_init;
  1270. }
  1271. } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) {
  1272. if (!hdmi_node) {
  1273. dev_dbg(&pdev->dev, "No property 'hdmi-codec'\n");
  1274. } else {
  1275. dai_link->codecs->of_node = hdmi_node;
  1276. dai_link->codecs->name = NULL;
  1277. dai_link->codecs->dai_name = "i2s-hifi";
  1278. dai_link->init = mt8195_hdmi_codec_init;
  1279. }
  1280. } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0 ||
  1281. strcmp(dai_link->name, "ETDM2_IN_BE") == 0) {
  1282. dai_link->codecs->name =
  1283. is5682s ? RT5682S_DEV0_NAME : RT5682_DEV0_NAME;
  1284. dai_link->codecs->dai_name =
  1285. is5682s ? RT5682S_CODEC_DAI : RT5682_CODEC_DAI;
  1286. } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 ||
  1287. strcmp(dai_link->name, "UL_SRC1_BE") == 0 ||
  1288. strcmp(dai_link->name, "UL_SRC2_BE") == 0) {
  1289. if (!init6359) {
  1290. dai_link->init = mt8195_mt6359_init;
  1291. init6359 = 1;
  1292. }
  1293. } else if (strcmp(dai_link->name, "ETDM2_OUT_BE") == 0) {
  1294. switch (card_data->quirk) {
  1295. case RT1011_SPEAKER_AMP_PRESENT:
  1296. dai_link->codecs = rt1011_comps;
  1297. dai_link->num_codecs = ARRAY_SIZE(rt1011_comps);
  1298. dai_link->init = mt8195_rt1011_init;
  1299. dai_link->ops = &mt8195_rt1011_etdm_ops;
  1300. dai_link->be_hw_params_fixup = mt8195_etdm_hw_params_fixup;
  1301. card->codec_conf = rt1011_codec_conf;
  1302. card->num_configs = ARRAY_SIZE(rt1011_codec_conf);
  1303. break;
  1304. case RT1019_SPEAKER_AMP_PRESENT:
  1305. dai_link->codecs = rt1019_comps;
  1306. dai_link->num_codecs = ARRAY_SIZE(rt1019_comps);
  1307. dai_link->init = mt8195_rt1019_init;
  1308. break;
  1309. case MAX98390_SPEAKER_AMP_PRESENT:
  1310. dai_link->codecs = max98390_comps;
  1311. dai_link->num_codecs = ARRAY_SIZE(max98390_comps);
  1312. dai_link->init = mt8195_max98390_init;
  1313. card->codec_conf = max98390_codec_conf;
  1314. card->num_configs = ARRAY_SIZE(max98390_codec_conf);
  1315. break;
  1316. default:
  1317. break;
  1318. }
  1319. }
  1320. }
  1321. snd_soc_card_set_drvdata(card, soc_card_data);
  1322. ret = devm_snd_soc_register_card(&pdev->dev, card);
  1323. of_node_put(platform_node);
  1324. of_node_put(dp_node);
  1325. of_node_put(hdmi_node);
  1326. err_kzalloc:
  1327. err_parse_of:
  1328. err_platform_node:
  1329. of_node_put(adsp_node);
  1330. return ret;
  1331. }
  1332. static struct mt8195_card_data mt8195_mt6359_rt1019_rt5682_card = {
  1333. .name = "mt8195_r1019_5682",
  1334. .quirk = RT1019_SPEAKER_AMP_PRESENT,
  1335. };
  1336. static struct mt8195_card_data mt8195_mt6359_rt1011_rt5682_card = {
  1337. .name = "mt8195_r1011_5682",
  1338. .quirk = RT1011_SPEAKER_AMP_PRESENT,
  1339. };
  1340. static struct mt8195_card_data mt8195_mt6359_max98390_rt5682_card = {
  1341. .name = "mt8195_m98390_r5682",
  1342. .quirk = MAX98390_SPEAKER_AMP_PRESENT,
  1343. };
  1344. static const struct of_device_id mt8195_mt6359_dt_match[] = {
  1345. {
  1346. .compatible = "mediatek,mt8195_mt6359_rt1019_rt5682",
  1347. .data = &mt8195_mt6359_rt1019_rt5682_card,
  1348. },
  1349. {
  1350. .compatible = "mediatek,mt8195_mt6359_rt1011_rt5682",
  1351. .data = &mt8195_mt6359_rt1011_rt5682_card,
  1352. },
  1353. {
  1354. .compatible = "mediatek,mt8195_mt6359_max98390_rt5682",
  1355. .data = &mt8195_mt6359_max98390_rt5682_card,
  1356. },
  1357. {},
  1358. };
  1359. static struct platform_driver mt8195_mt6359_driver = {
  1360. .driver = {
  1361. .name = "mt8195_mt6359",
  1362. .of_match_table = mt8195_mt6359_dt_match,
  1363. .pm = &snd_soc_pm_ops,
  1364. },
  1365. .probe = mt8195_mt6359_dev_probe,
  1366. };
  1367. module_platform_driver(mt8195_mt6359_driver);
  1368. /* Module information */
  1369. MODULE_DESCRIPTION("MT8195-MT6359 ALSA SoC machine driver");
  1370. MODULE_AUTHOR("Trevor Wu <[email protected]>");
  1371. MODULE_AUTHOR("YC Hung <[email protected]>");
  1372. MODULE_LICENSE("GPL");
  1373. MODULE_ALIAS("mt8195_mt6359 soc card");