mt8186-misc-control.c 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252
  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // MediaTek ALSA SoC Audio Misc Control
  4. //
  5. // Copyright (c) 2022 MediaTek Inc.
  6. // Author: Jiaxin Yu <[email protected]>
  7. #include <linux/delay.h>
  8. #include <linux/dma-mapping.h>
  9. #include <linux/io.h>
  10. #include <linux/regmap.h>
  11. #include <sound/soc.h>
  12. #include "../common/mtk-afe-fe-dai.h"
  13. #include "../common/mtk-afe-platform-driver.h"
  14. #include "mt8186-afe-common.h"
  15. static const char * const mt8186_sgen_mode_str[] = {
  16. "I0I1", "I2", "I3I4", "I5I6",
  17. "I7I8", "I9I22", "I10I11", "I12I13",
  18. "I14I21", "I15I16", "I17I18", "I19I20",
  19. "I23I24", "I25I26", "I27I28", "I33",
  20. "I34I35", "I36I37", "I38I39", "I40I41",
  21. "I42I43", "I44I45", "I46I47", "I48I49",
  22. "I56I57", "I58I59", "I60I61", "I62I63",
  23. "O0O1", "O2", "O3O4", "O5O6",
  24. "O7O8", "O9O10", "O11", "O12",
  25. "O13O14", "O15O16", "O17O18", "O19O20",
  26. "O21O22", "O23O24", "O25", "O28O29",
  27. "O34", "O35", "O32O33", "O36O37",
  28. "O38O39", "O30O31", "O40O41", "O42O43",
  29. "O44O45", "O46O47", "O48O49", "O50O51",
  30. "O58O59", "O60O61", "O62O63", "O64O65",
  31. "O66O67", "O68O69", "O26O27", "OFF",
  32. };
  33. static const int mt8186_sgen_mode_idx[] = {
  34. 0, 2, 4, 6,
  35. 8, 22, 10, 12,
  36. 14, -1, 18, 20,
  37. 24, 26, 28, 33,
  38. 34, 36, 38, 40,
  39. 42, 44, 46, 48,
  40. 56, 58, 60, 62,
  41. 128, 130, 132, 134,
  42. 135, 138, 139, 140,
  43. 142, 144, 166, 148,
  44. 150, 152, 153, 156,
  45. 162, 163, 160, 164,
  46. 166, -1, 168, 170,
  47. 172, 174, 176, 178,
  48. 186, 188, 190, 192,
  49. 194, 196, -1, -1,
  50. };
  51. static const char * const mt8186_sgen_rate_str[] = {
  52. "8K", "11K", "12K", "16K",
  53. "22K", "24K", "32K", "44K",
  54. "48K", "88k", "96k", "176k",
  55. "192k"
  56. };
  57. static const int mt8186_sgen_rate_idx[] = {
  58. 0, 1, 2, 4,
  59. 5, 6, 8, 9,
  60. 10, 11, 12, 13,
  61. 14
  62. };
  63. /* this order must match reg bit amp_div_ch1/2 */
  64. static const char * const mt8186_sgen_amp_str[] = {
  65. "1/128", "1/64", "1/32", "1/16", "1/8", "1/4", "1/2", "1" };
  66. static int mt8186_sgen_get(struct snd_kcontrol *kcontrol,
  67. struct snd_ctl_elem_value *ucontrol)
  68. {
  69. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  70. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
  71. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  72. ucontrol->value.integer.value[0] = afe_priv->sgen_mode;
  73. return 0;
  74. }
  75. static int mt8186_sgen_set(struct snd_kcontrol *kcontrol,
  76. struct snd_ctl_elem_value *ucontrol)
  77. {
  78. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  79. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
  80. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  81. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  82. int mode;
  83. int mode_idx;
  84. if (ucontrol->value.enumerated.item[0] >= e->items)
  85. return -EINVAL;
  86. mode = ucontrol->value.integer.value[0];
  87. mode_idx = mt8186_sgen_mode_idx[mode];
  88. dev_dbg(afe->dev, "%s(), mode %d, mode_idx %d\n",
  89. __func__, mode, mode_idx);
  90. if (mode == afe_priv->sgen_mode)
  91. return 0;
  92. if (mode_idx >= 0) {
  93. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON2,
  94. INNER_LOOP_BACK_MODE_MASK_SFT,
  95. mode_idx << INNER_LOOP_BACK_MODE_SFT);
  96. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
  97. DAC_EN_MASK_SFT, BIT(DAC_EN_SFT));
  98. } else {
  99. /* disable sgen */
  100. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
  101. DAC_EN_MASK_SFT, 0);
  102. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON2,
  103. INNER_LOOP_BACK_MODE_MASK_SFT,
  104. 0x3f << INNER_LOOP_BACK_MODE_SFT);
  105. }
  106. afe_priv->sgen_mode = mode;
  107. return 1;
  108. }
  109. static int mt8186_sgen_rate_get(struct snd_kcontrol *kcontrol,
  110. struct snd_ctl_elem_value *ucontrol)
  111. {
  112. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  113. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
  114. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  115. ucontrol->value.integer.value[0] = afe_priv->sgen_rate;
  116. return 0;
  117. }
  118. static int mt8186_sgen_rate_set(struct snd_kcontrol *kcontrol,
  119. struct snd_ctl_elem_value *ucontrol)
  120. {
  121. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  122. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
  123. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  124. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  125. int rate;
  126. if (ucontrol->value.enumerated.item[0] >= e->items)
  127. return -EINVAL;
  128. rate = ucontrol->value.integer.value[0];
  129. dev_dbg(afe->dev, "%s(), rate %d\n", __func__, rate);
  130. if (rate == afe_priv->sgen_rate)
  131. return 0;
  132. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
  133. SINE_MODE_CH1_MASK_SFT,
  134. mt8186_sgen_rate_idx[rate] << SINE_MODE_CH1_SFT);
  135. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
  136. SINE_MODE_CH2_MASK_SFT,
  137. mt8186_sgen_rate_idx[rate] << SINE_MODE_CH2_SFT);
  138. afe_priv->sgen_rate = rate;
  139. return 1;
  140. }
  141. static int mt8186_sgen_amplitude_get(struct snd_kcontrol *kcontrol,
  142. struct snd_ctl_elem_value *ucontrol)
  143. {
  144. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  145. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
  146. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  147. ucontrol->value.integer.value[0] = afe_priv->sgen_amplitude;
  148. return 0;
  149. }
  150. static int mt8186_sgen_amplitude_set(struct snd_kcontrol *kcontrol,
  151. struct snd_ctl_elem_value *ucontrol)
  152. {
  153. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  154. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
  155. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  156. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  157. int amplitude;
  158. if (ucontrol->value.enumerated.item[0] >= e->items)
  159. return -EINVAL;
  160. amplitude = ucontrol->value.integer.value[0];
  161. if (amplitude > AMP_DIV_CH1_MASK) {
  162. dev_err(afe->dev, "%s(), amplitude %d invalid\n",
  163. __func__, amplitude);
  164. return -EINVAL;
  165. }
  166. dev_dbg(afe->dev, "%s(), amplitude %d\n", __func__, amplitude);
  167. if (amplitude == afe_priv->sgen_amplitude)
  168. return 0;
  169. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
  170. AMP_DIV_CH1_MASK_SFT,
  171. amplitude << AMP_DIV_CH1_SFT);
  172. regmap_update_bits(afe->regmap, AFE_SINEGEN_CON0,
  173. AMP_DIV_CH2_MASK_SFT,
  174. amplitude << AMP_DIV_CH2_SFT);
  175. afe_priv->sgen_amplitude = amplitude;
  176. return 1;
  177. }
  178. static const struct soc_enum mt8186_afe_sgen_enum[] = {
  179. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_sgen_mode_str),
  180. mt8186_sgen_mode_str),
  181. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_sgen_rate_str),
  182. mt8186_sgen_rate_str),
  183. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_sgen_amp_str),
  184. mt8186_sgen_amp_str),
  185. };
  186. static const struct snd_kcontrol_new mt8186_afe_sgen_controls[] = {
  187. SOC_ENUM_EXT("Audio_SineGen_Switch", mt8186_afe_sgen_enum[0],
  188. mt8186_sgen_get, mt8186_sgen_set),
  189. SOC_ENUM_EXT("Audio_SineGen_SampleRate", mt8186_afe_sgen_enum[1],
  190. mt8186_sgen_rate_get, mt8186_sgen_rate_set),
  191. SOC_ENUM_EXT("Audio_SineGen_Amplitude", mt8186_afe_sgen_enum[2],
  192. mt8186_sgen_amplitude_get, mt8186_sgen_amplitude_set),
  193. SOC_SINGLE("Audio_SineGen_Mute_Ch1", AFE_SINEGEN_CON0,
  194. MUTE_SW_CH1_MASK_SFT, MUTE_SW_CH1_MASK, 0),
  195. SOC_SINGLE("Audio_SineGen_Mute_Ch2", AFE_SINEGEN_CON0,
  196. MUTE_SW_CH2_MASK_SFT, MUTE_SW_CH2_MASK, 0),
  197. SOC_SINGLE("Audio_SineGen_Freq_Div_Ch1", AFE_SINEGEN_CON0,
  198. FREQ_DIV_CH1_SFT, FREQ_DIV_CH1_MASK, 0),
  199. SOC_SINGLE("Audio_SineGen_Freq_Div_Ch2", AFE_SINEGEN_CON0,
  200. FREQ_DIV_CH2_SFT, FREQ_DIV_CH2_MASK, 0),
  201. };
  202. int mt8186_add_misc_control(struct snd_soc_component *component)
  203. {
  204. snd_soc_add_component_controls(component,
  205. mt8186_afe_sgen_controls,
  206. ARRAY_SIZE(mt8186_afe_sgen_controls));
  207. return 0;
  208. }