/* SPDX-License-Identifier: GPL-2.0 * * mt8186-audsys-clk.h -- Mediatek 8186 audsys clock definition * * Copyright (c) 2022 MediaTek Inc. * Author: Trevor Wu <[email protected]> */ #ifndef _MT8186_AUDSYS_CLK_H_ #define _MT8186_AUDSYS_CLK_H_ int mt8186_audsys_clk_register(struct mtk_base_afe *afe); #endif
