mt8186-audsys-clk.c 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // mt8186-audsys-clk.h -- Mediatek 8186 audsys clock control
  4. //
  5. // Copyright (c) 2022 MediaTek Inc.
  6. // Author: Jiaxin Yu <[email protected]>
  7. #include <linux/clk.h>
  8. #include <linux/clk-provider.h>
  9. #include <linux/clkdev.h>
  10. #include "mt8186-afe-common.h"
  11. #include "mt8186-audsys-clk.h"
  12. #include "mt8186-audsys-clkid.h"
  13. #include "mt8186-reg.h"
  14. struct afe_gate {
  15. int id;
  16. const char *name;
  17. const char *parent_name;
  18. int reg;
  19. u8 bit;
  20. const struct clk_ops *ops;
  21. unsigned long flags;
  22. u8 cg_flags;
  23. };
  24. #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\
  25. .id = _id, \
  26. .name = _name, \
  27. .parent_name = _parent, \
  28. .reg = _reg, \
  29. .bit = _bit, \
  30. .flags = _flags, \
  31. .cg_flags = _cgflags, \
  32. }
  33. #define GATE_AFE(_id, _name, _parent, _reg, _bit) \
  34. GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \
  35. CLK_SET_RATE_PARENT, CLK_GATE_SET_TO_DISABLE)
  36. #define GATE_AUD0(_id, _name, _parent, _bit) \
  37. GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit)
  38. #define GATE_AUD1(_id, _name, _parent, _bit) \
  39. GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit)
  40. #define GATE_AUD2(_id, _name, _parent, _bit) \
  41. GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON2, _bit)
  42. static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = {
  43. /* AUD0 */
  44. GATE_AUD0(CLK_AUD_AFE, "aud_afe_clk", "top_audio", 2),
  45. GATE_AUD0(CLK_AUD_22M, "aud_apll22m_clk", "top_aud_engen1", 8),
  46. GATE_AUD0(CLK_AUD_24M, "aud_apll24m_clk", "top_aud_engen2", 9),
  47. GATE_AUD0(CLK_AUD_APLL2_TUNER, "aud_apll2_tuner_clk", "top_aud_engen2", 18),
  48. GATE_AUD0(CLK_AUD_APLL_TUNER, "aud_apll_tuner_clk", "top_aud_engen1", 19),
  49. GATE_AUD0(CLK_AUD_TDM, "aud_tdm_clk", "top_aud_1", 20),
  50. GATE_AUD0(CLK_AUD_ADC, "aud_adc_clk", "top_audio", 24),
  51. GATE_AUD0(CLK_AUD_DAC, "aud_dac_clk", "top_audio", 25),
  52. GATE_AUD0(CLK_AUD_DAC_PREDIS, "aud_dac_predis_clk", "top_audio", 26),
  53. GATE_AUD0(CLK_AUD_TML, "aud_tml_clk", "top_audio", 27),
  54. GATE_AUD0(CLK_AUD_NLE, "aud_nle_clk", "top_audio", 28),
  55. /* AUD1 */
  56. GATE_AUD1(CLK_AUD_I2S1_BCLK, "aud_i2s1_bclk", "top_audio", 4),
  57. GATE_AUD1(CLK_AUD_I2S2_BCLK, "aud_i2s2_bclk", "top_audio", 5),
  58. GATE_AUD1(CLK_AUD_I2S3_BCLK, "aud_i2s3_bclk", "top_audio", 6),
  59. GATE_AUD1(CLK_AUD_I2S4_BCLK, "aud_i2s4_bclk", "top_audio", 7),
  60. GATE_AUD1(CLK_AUD_CONNSYS_I2S_ASRC, "aud_connsys_i2s_asrc", "top_audio", 12),
  61. GATE_AUD1(CLK_AUD_GENERAL1_ASRC, "aud_general1_asrc", "top_audio", 13),
  62. GATE_AUD1(CLK_AUD_GENERAL2_ASRC, "aud_general2_asrc", "top_audio", 14),
  63. GATE_AUD1(CLK_AUD_DAC_HIRES, "aud_dac_hires_clk", "top_audio_h", 15),
  64. GATE_AUD1(CLK_AUD_ADC_HIRES, "aud_adc_hires_clk", "top_audio_h", 16),
  65. GATE_AUD1(CLK_AUD_ADC_HIRES_TML, "aud_adc_hires_tml", "top_audio_h", 17),
  66. GATE_AUD1(CLK_AUD_ADDA6_ADC, "aud_adda6_adc", "top_audio", 20),
  67. GATE_AUD1(CLK_AUD_ADDA6_ADC_HIRES, "aud_adda6_adc_hires", "top_audio_h", 21),
  68. GATE_AUD1(CLK_AUD_3RD_DAC, "aud_3rd_dac", "top_audio", 28),
  69. GATE_AUD1(CLK_AUD_3RD_DAC_PREDIS, "aud_3rd_dac_predis", "top_audio", 29),
  70. GATE_AUD1(CLK_AUD_3RD_DAC_TML, "aud_3rd_dac_tml", "top_audio", 30),
  71. GATE_AUD1(CLK_AUD_3RD_DAC_HIRES, "aud_3rd_dac_hires", "top_audio_h", 31),
  72. /* AUD2 */
  73. GATE_AUD2(CLK_AUD_ETDM_IN1_BCLK, "aud_etdm_in1_bclk", "top_audio", 23),
  74. GATE_AUD2(CLK_AUD_ETDM_OUT1_BCLK, "aud_etdm_out1_bclk", "top_audio", 24),
  75. };
  76. static void mt8186_audsys_clk_unregister(void *data)
  77. {
  78. struct mtk_base_afe *afe = data;
  79. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  80. struct clk *clk;
  81. struct clk_lookup *cl;
  82. int i;
  83. if (!afe_priv)
  84. return;
  85. for (i = 0; i < CLK_AUD_NR_CLK; i++) {
  86. cl = afe_priv->lookup[i];
  87. if (!cl)
  88. continue;
  89. clk = cl->clk;
  90. clk_unregister_gate(clk);
  91. clkdev_drop(cl);
  92. }
  93. }
  94. int mt8186_audsys_clk_register(struct mtk_base_afe *afe)
  95. {
  96. struct mt8186_afe_private *afe_priv = afe->platform_priv;
  97. struct clk *clk;
  98. struct clk_lookup *cl;
  99. int i;
  100. afe_priv->lookup = devm_kcalloc(afe->dev, CLK_AUD_NR_CLK,
  101. sizeof(*afe_priv->lookup),
  102. GFP_KERNEL);
  103. if (!afe_priv->lookup)
  104. return -ENOMEM;
  105. for (i = 0; i < ARRAY_SIZE(aud_clks); i++) {
  106. const struct afe_gate *gate = &aud_clks[i];
  107. clk = clk_register_gate(afe->dev, gate->name, gate->parent_name,
  108. gate->flags, afe->base_addr + gate->reg,
  109. gate->bit, gate->cg_flags, NULL);
  110. if (IS_ERR(clk)) {
  111. dev_err(afe->dev, "Failed to register clk %s: %ld\n",
  112. gate->name, PTR_ERR(clk));
  113. continue;
  114. }
  115. /* add clk_lookup for devm_clk_get(SND_SOC_DAPM_CLOCK_SUPPLY) */
  116. cl = kzalloc(sizeof(*cl), GFP_KERNEL);
  117. if (!cl)
  118. return -ENOMEM;
  119. cl->clk = clk;
  120. cl->con_id = gate->name;
  121. cl->dev_id = dev_name(afe->dev);
  122. clkdev_add(cl);
  123. afe_priv->lookup[i] = cl;
  124. }
  125. return devm_add_action_or_reset(afe->dev, mt8186_audsys_clk_unregister, afe);
  126. }