mt8186-afe-common.h 4.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198
  1. /* SPDX-License-Identifier: GPL-2.0
  2. *
  3. * mt8186-afe-common.h -- Mediatek 8186 audio driver definitions
  4. *
  5. * Copyright (c) 2022 MediaTek Inc.
  6. * Author: Jiaxin Yu <[email protected]>
  7. */
  8. #ifndef _MT_8186_AFE_COMMON_H_
  9. #define _MT_8186_AFE_COMMON_H_
  10. #include <sound/soc.h>
  11. #include <linux/list.h>
  12. #include <linux/regmap.h>
  13. #include "mt8186-reg.h"
  14. #include "../common/mtk-base-afe.h"
  15. enum {
  16. MT8186_MEMIF_DL1,
  17. MT8186_MEMIF_DL12,
  18. MT8186_MEMIF_DL2,
  19. MT8186_MEMIF_DL3,
  20. MT8186_MEMIF_DL4,
  21. MT8186_MEMIF_DL5,
  22. MT8186_MEMIF_DL6,
  23. MT8186_MEMIF_DL7,
  24. MT8186_MEMIF_DL8,
  25. MT8186_MEMIF_VUL12,
  26. MT8186_MEMIF_VUL2,
  27. MT8186_MEMIF_VUL3,
  28. MT8186_MEMIF_VUL4,
  29. MT8186_MEMIF_VUL5,
  30. MT8186_MEMIF_VUL6,
  31. MT8186_MEMIF_AWB,
  32. MT8186_MEMIF_AWB2,
  33. MT8186_MEMIF_NUM,
  34. MT8186_DAI_ADDA = MT8186_MEMIF_NUM,
  35. MT8186_DAI_AP_DMIC,
  36. MT8186_DAI_CONNSYS_I2S,
  37. MT8186_DAI_I2S_0,
  38. MT8186_DAI_I2S_1,
  39. MT8186_DAI_I2S_2,
  40. MT8186_DAI_I2S_3,
  41. MT8186_DAI_HW_GAIN_1,
  42. MT8186_DAI_HW_GAIN_2,
  43. MT8186_DAI_SRC_1,
  44. MT8186_DAI_SRC_2,
  45. MT8186_DAI_PCM,
  46. MT8186_DAI_TDM_IN,
  47. MT8186_DAI_HOSTLESS_LPBK,
  48. MT8186_DAI_HOSTLESS_FM,
  49. MT8186_DAI_HOSTLESS_HW_GAIN_AAUDIO,
  50. MT8186_DAI_HOSTLESS_SRC_AAUDIO,
  51. MT8186_DAI_HOSTLESS_SRC_1,
  52. MT8186_DAI_HOSTLESS_SRC_BARGEIN,
  53. MT8186_DAI_HOSTLESS_UL1,
  54. MT8186_DAI_HOSTLESS_UL2,
  55. MT8186_DAI_HOSTLESS_UL3,
  56. MT8186_DAI_HOSTLESS_UL5,
  57. MT8186_DAI_HOSTLESS_UL6,
  58. MT8186_DAI_NUM,
  59. };
  60. #define MT8186_RECORD_MEMIF MT8186_MEMIF_VUL12
  61. #define MT8186_ECHO_REF_MEMIF MT8186_MEMIF_AWB
  62. #define MT8186_PRIMARY_MEMIF MT8186_MEMIF_DL1
  63. #define MT8186_FAST_MEMIF MT8186_MEMIF_DL2
  64. #define MT8186_DEEP_MEMIF MT8186_MEMIF_DL3
  65. #define MT8186_VOIP_MEMIF MT8186_MEMIF_DL12
  66. #define MT8186_MMAP_DL_MEMIF MT8186_MEMIF_DL5
  67. #define MT8186_MMAP_UL_MEMIF MT8186_MEMIF_VUL5
  68. #define MT8186_BARGEIN_MEMIF MT8186_MEMIF_AWB
  69. enum {
  70. MT8186_IRQ_0,
  71. MT8186_IRQ_1,
  72. MT8186_IRQ_2,
  73. MT8186_IRQ_3,
  74. MT8186_IRQ_4,
  75. MT8186_IRQ_5,
  76. MT8186_IRQ_6,
  77. MT8186_IRQ_7,
  78. MT8186_IRQ_8,
  79. MT8186_IRQ_9,
  80. MT8186_IRQ_10,
  81. MT8186_IRQ_11,
  82. MT8186_IRQ_12,
  83. MT8186_IRQ_13,
  84. MT8186_IRQ_14,
  85. MT8186_IRQ_15,
  86. MT8186_IRQ_16,
  87. MT8186_IRQ_17,
  88. MT8186_IRQ_18,
  89. MT8186_IRQ_19,
  90. MT8186_IRQ_20,
  91. MT8186_IRQ_21,
  92. MT8186_IRQ_22,
  93. MT8186_IRQ_23,
  94. MT8186_IRQ_24,
  95. MT8186_IRQ_25,
  96. MT8186_IRQ_26,
  97. MT8186_IRQ_NUM,
  98. };
  99. enum {
  100. MT8186_AFE_IRQ_DIR_MCU = 0,
  101. MT8186_AFE_IRQ_DIR_DSP,
  102. MT8186_AFE_IRQ_DIR_BOTH,
  103. };
  104. enum {
  105. MTKAIF_PROTOCOL_1 = 0,
  106. MTKAIF_PROTOCOL_2,
  107. MTKAIF_PROTOCOL_2_CLK_P2,
  108. };
  109. enum {
  110. MTK_AFE_ADDA_DL_GAIN_MUTE = 0,
  111. MTK_AFE_ADDA_DL_GAIN_NORMAL = 0xf74f,
  112. /* SA suggest apply -0.3db to audio/speech path */
  113. };
  114. #define MTK_SPK_I2S_0_STR "MTK_SPK_I2S_0"
  115. #define MTK_SPK_I2S_1_STR "MTK_SPK_I2S_1"
  116. #define MTK_SPK_I2S_2_STR "MTK_SPK_I2S_2"
  117. #define MTK_SPK_I2S_3_STR "MTK_SPK_I2S_3"
  118. /* MCLK */
  119. enum {
  120. MT8186_I2S0_MCK = 0,
  121. MT8186_I2S1_MCK,
  122. MT8186_I2S2_MCK,
  123. MT8186_I2S4_MCK,
  124. MT8186_TDM_MCK,
  125. MT8186_MCK_NUM,
  126. };
  127. struct snd_pcm_substream;
  128. struct mtk_base_irq_data;
  129. struct clk;
  130. struct mt8186_afe_private {
  131. struct clk **clk;
  132. struct clk_lookup **lookup;
  133. struct regmap *topckgen;
  134. struct regmap *apmixedsys;
  135. struct regmap *infracfg;
  136. int irq_cnt[MT8186_MEMIF_NUM];
  137. int stf_positive_gain_db;
  138. int pm_runtime_bypass_reg_ctl;
  139. int sgen_mode;
  140. int sgen_rate;
  141. int sgen_amplitude;
  142. /* xrun assert */
  143. int xrun_assert[MT8186_MEMIF_NUM];
  144. /* dai */
  145. bool dai_on[MT8186_DAI_NUM];
  146. void *dai_priv[MT8186_DAI_NUM];
  147. /* adda */
  148. bool mtkaif_calibration_ok;
  149. int mtkaif_protocol;
  150. int mtkaif_chosen_phase[4];
  151. int mtkaif_phase_cycle[4];
  152. int mtkaif_calibration_num_phase;
  153. int mtkaif_dmic;
  154. int mtkaif_looback0;
  155. int mtkaif_looback1;
  156. /* mck */
  157. int mck_rate[MT8186_MCK_NUM];
  158. };
  159. int mt8186_dai_adda_register(struct mtk_base_afe *afe);
  160. int mt8186_dai_i2s_register(struct mtk_base_afe *afe);
  161. int mt8186_dai_tdm_register(struct mtk_base_afe *afe);
  162. int mt8186_dai_hw_gain_register(struct mtk_base_afe *afe);
  163. int mt8186_dai_src_register(struct mtk_base_afe *afe);
  164. int mt8186_dai_pcm_register(struct mtk_base_afe *afe);
  165. int mt8186_dai_hostless_register(struct mtk_base_afe *afe);
  166. int mt8186_add_misc_control(struct snd_soc_component *component);
  167. unsigned int mt8186_general_rate_transform(struct device *dev,
  168. unsigned int rate);
  169. unsigned int mt8186_rate_transform(struct device *dev,
  170. unsigned int rate, int aud_blk);
  171. unsigned int mt8186_tdm_relatch_rate_transform(struct device *dev,
  172. unsigned int rate);
  173. int mt8186_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,
  174. const char *secondary_i2s_name);
  175. int mt8186_dai_set_priv(struct mtk_base_afe *afe, int id,
  176. int priv_size, const void *priv_data);
  177. #endif