mt8183-mt6358-ts3a227-max98357.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // mt8183-mt6358.c --
  4. // MT8183-MT6358-TS3A227-MAX98357 ALSA SoC machine driver
  5. //
  6. // Copyright (c) 2018 MediaTek Inc.
  7. // Author: Shunli Wang <[email protected]>
  8. #include <linux/module.h>
  9. #include <linux/of_device.h>
  10. #include <linux/pinctrl/consumer.h>
  11. #include <sound/jack.h>
  12. #include <sound/pcm_params.h>
  13. #include <sound/soc.h>
  14. #include "../../codecs/rt1015.h"
  15. #include "../../codecs/ts3a227e.h"
  16. #include "../common/mtk-afe-platform-driver.h"
  17. #include "mt8183-afe-common.h"
  18. #define RT1015_CODEC_DAI "rt1015-aif"
  19. #define RT1015_DEV0_NAME "rt1015.6-0028"
  20. #define RT1015_DEV1_NAME "rt1015.6-0029"
  21. enum PINCTRL_PIN_STATE {
  22. PIN_STATE_DEFAULT = 0,
  23. PIN_TDM_OUT_ON,
  24. PIN_TDM_OUT_OFF,
  25. PIN_WOV,
  26. PIN_STATE_MAX
  27. };
  28. static const char * const mt8183_pin_str[PIN_STATE_MAX] = {
  29. "default", "aud_tdm_out_on", "aud_tdm_out_off", "wov",
  30. };
  31. struct mt8183_mt6358_ts3a227_max98357_priv {
  32. struct pinctrl *pinctrl;
  33. struct pinctrl_state *pin_states[PIN_STATE_MAX];
  34. struct snd_soc_jack headset_jack, hdmi_jack;
  35. };
  36. static int mt8183_mt6358_i2s_hw_params(struct snd_pcm_substream *substream,
  37. struct snd_pcm_hw_params *params)
  38. {
  39. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  40. unsigned int rate = params_rate(params);
  41. unsigned int mclk_fs_ratio = 128;
  42. unsigned int mclk_fs = rate * mclk_fs_ratio;
  43. return snd_soc_dai_set_sysclk(asoc_rtd_to_cpu(rtd, 0),
  44. 0, mclk_fs, SND_SOC_CLOCK_OUT);
  45. }
  46. static const struct snd_soc_ops mt8183_mt6358_i2s_ops = {
  47. .hw_params = mt8183_mt6358_i2s_hw_params,
  48. };
  49. static int
  50. mt8183_mt6358_rt1015_i2s_hw_params(struct snd_pcm_substream *substream,
  51. struct snd_pcm_hw_params *params)
  52. {
  53. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  54. unsigned int rate = params_rate(params);
  55. unsigned int mclk_fs_ratio = 128;
  56. unsigned int mclk_fs = rate * mclk_fs_ratio;
  57. struct snd_soc_card *card = rtd->card;
  58. struct snd_soc_dai *codec_dai;
  59. int ret, i;
  60. for_each_rtd_codec_dais(rtd, i, codec_dai) {
  61. ret = snd_soc_dai_set_pll(codec_dai, 0, RT1015_PLL_S_BCLK,
  62. rate * 64, rate * 256);
  63. if (ret < 0) {
  64. dev_err(card->dev, "failed to set pll\n");
  65. return ret;
  66. }
  67. ret = snd_soc_dai_set_sysclk(codec_dai, RT1015_SCLK_S_PLL,
  68. rate * 256, SND_SOC_CLOCK_IN);
  69. if (ret < 0) {
  70. dev_err(card->dev, "failed to set sysclk\n");
  71. return ret;
  72. }
  73. }
  74. return snd_soc_dai_set_sysclk(asoc_rtd_to_cpu(rtd, 0),
  75. 0, mclk_fs, SND_SOC_CLOCK_OUT);
  76. }
  77. static const struct snd_soc_ops mt8183_mt6358_rt1015_i2s_ops = {
  78. .hw_params = mt8183_mt6358_rt1015_i2s_hw_params,
  79. };
  80. static int mt8183_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  81. struct snd_pcm_hw_params *params)
  82. {
  83. dev_dbg(rtd->dev, "%s(), fix format to S32_LE\n", __func__);
  84. /* fix BE i2s format to S32_LE, clean param mask first */
  85. snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
  86. 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
  87. params_set_format(params, SNDRV_PCM_FORMAT_S32_LE);
  88. return 0;
  89. }
  90. static int mt8183_rt1015_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  91. struct snd_pcm_hw_params *params)
  92. {
  93. dev_dbg(rtd->dev, "%s(), fix format to S24_LE\n", __func__);
  94. /* fix BE i2s format to S24_LE, clean param mask first */
  95. snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
  96. 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST);
  97. params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
  98. return 0;
  99. }
  100. static int
  101. mt8183_mt6358_startup(struct snd_pcm_substream *substream)
  102. {
  103. static const unsigned int rates[] = {
  104. 48000,
  105. };
  106. static const struct snd_pcm_hw_constraint_list constraints_rates = {
  107. .count = ARRAY_SIZE(rates),
  108. .list = rates,
  109. .mask = 0,
  110. };
  111. static const unsigned int channels[] = {
  112. 2,
  113. };
  114. static const struct snd_pcm_hw_constraint_list constraints_channels = {
  115. .count = ARRAY_SIZE(channels),
  116. .list = channels,
  117. .mask = 0,
  118. };
  119. struct snd_pcm_runtime *runtime = substream->runtime;
  120. snd_pcm_hw_constraint_list(runtime, 0,
  121. SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
  122. runtime->hw.channels_max = 2;
  123. snd_pcm_hw_constraint_list(runtime, 0,
  124. SNDRV_PCM_HW_PARAM_CHANNELS,
  125. &constraints_channels);
  126. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE;
  127. snd_pcm_hw_constraint_msbits(runtime, 0, 16, 16);
  128. return 0;
  129. }
  130. static const struct snd_soc_ops mt8183_mt6358_ops = {
  131. .startup = mt8183_mt6358_startup,
  132. };
  133. static int
  134. mt8183_mt6358_ts3a227_max98357_bt_sco_startup(
  135. struct snd_pcm_substream *substream)
  136. {
  137. static const unsigned int rates[] = {
  138. 8000, 16000
  139. };
  140. static const struct snd_pcm_hw_constraint_list constraints_rates = {
  141. .count = ARRAY_SIZE(rates),
  142. .list = rates,
  143. .mask = 0,
  144. };
  145. static const unsigned int channels[] = {
  146. 1,
  147. };
  148. static const struct snd_pcm_hw_constraint_list constraints_channels = {
  149. .count = ARRAY_SIZE(channels),
  150. .list = channels,
  151. .mask = 0,
  152. };
  153. struct snd_pcm_runtime *runtime = substream->runtime;
  154. snd_pcm_hw_constraint_list(runtime, 0,
  155. SNDRV_PCM_HW_PARAM_RATE, &constraints_rates);
  156. runtime->hw.channels_max = 1;
  157. snd_pcm_hw_constraint_list(runtime, 0,
  158. SNDRV_PCM_HW_PARAM_CHANNELS,
  159. &constraints_channels);
  160. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE;
  161. snd_pcm_hw_constraint_msbits(runtime, 0, 16, 16);
  162. return 0;
  163. }
  164. static const struct snd_soc_ops mt8183_mt6358_ts3a227_max98357_bt_sco_ops = {
  165. .startup = mt8183_mt6358_ts3a227_max98357_bt_sco_startup,
  166. };
  167. /* FE */
  168. SND_SOC_DAILINK_DEFS(playback1,
  169. DAILINK_COMP_ARRAY(COMP_CPU("DL1")),
  170. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  171. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  172. SND_SOC_DAILINK_DEFS(playback2,
  173. DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
  174. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  175. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  176. SND_SOC_DAILINK_DEFS(playback3,
  177. DAILINK_COMP_ARRAY(COMP_CPU("DL3")),
  178. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  179. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  180. SND_SOC_DAILINK_DEFS(capture1,
  181. DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
  182. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  183. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  184. SND_SOC_DAILINK_DEFS(capture2,
  185. DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
  186. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  187. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  188. SND_SOC_DAILINK_DEFS(capture3,
  189. DAILINK_COMP_ARRAY(COMP_CPU("UL3")),
  190. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  191. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  192. SND_SOC_DAILINK_DEFS(capture_mono,
  193. DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_1")),
  194. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  195. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  196. SND_SOC_DAILINK_DEFS(playback_hdmi,
  197. DAILINK_COMP_ARRAY(COMP_CPU("HDMI")),
  198. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  199. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  200. SND_SOC_DAILINK_DEFS(wake_on_voice,
  201. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  202. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  203. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  204. /* BE */
  205. SND_SOC_DAILINK_DEFS(primary_codec,
  206. DAILINK_COMP_ARRAY(COMP_CPU("ADDA")),
  207. DAILINK_COMP_ARRAY(COMP_CODEC("mt6358-sound", "mt6358-snd-codec-aif1")),
  208. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  209. SND_SOC_DAILINK_DEFS(pcm1,
  210. DAILINK_COMP_ARRAY(COMP_CPU("PCM 1")),
  211. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  212. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  213. SND_SOC_DAILINK_DEFS(pcm2,
  214. DAILINK_COMP_ARRAY(COMP_CPU("PCM 2")),
  215. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  216. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  217. SND_SOC_DAILINK_DEFS(i2s0,
  218. DAILINK_COMP_ARRAY(COMP_CPU("I2S0")),
  219. DAILINK_COMP_ARRAY(COMP_CODEC("bt-sco", "bt-sco-pcm-wb")),
  220. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  221. SND_SOC_DAILINK_DEFS(i2s1,
  222. DAILINK_COMP_ARRAY(COMP_CPU("I2S1")),
  223. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  224. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  225. SND_SOC_DAILINK_DEFS(i2s2,
  226. DAILINK_COMP_ARRAY(COMP_CPU("I2S2")),
  227. DAILINK_COMP_ARRAY(COMP_DUMMY()),
  228. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  229. SND_SOC_DAILINK_DEFS(i2s3_max98357a,
  230. DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
  231. DAILINK_COMP_ARRAY(COMP_CODEC("max98357a", "HiFi")),
  232. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  233. SND_SOC_DAILINK_DEFS(i2s3_rt1015,
  234. DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
  235. DAILINK_COMP_ARRAY(COMP_CODEC(RT1015_DEV0_NAME, RT1015_CODEC_DAI),
  236. COMP_CODEC(RT1015_DEV1_NAME, RT1015_CODEC_DAI)),
  237. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  238. SND_SOC_DAILINK_DEFS(i2s3_rt1015p,
  239. DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
  240. DAILINK_COMP_ARRAY(COMP_CODEC("rt1015p", "HiFi")),
  241. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  242. SND_SOC_DAILINK_DEFS(i2s5,
  243. DAILINK_COMP_ARRAY(COMP_CPU("I2S5")),
  244. DAILINK_COMP_ARRAY(COMP_CODEC("bt-sco", "bt-sco-pcm-wb")),
  245. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  246. SND_SOC_DAILINK_DEFS(tdm,
  247. DAILINK_COMP_ARRAY(COMP_CPU("TDM")),
  248. DAILINK_COMP_ARRAY(COMP_CODEC(NULL, "i2s-hifi")),
  249. DAILINK_COMP_ARRAY(COMP_EMPTY()));
  250. static int mt8183_mt6358_tdm_startup(struct snd_pcm_substream *substream)
  251. {
  252. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  253. struct mt8183_mt6358_ts3a227_max98357_priv *priv =
  254. snd_soc_card_get_drvdata(rtd->card);
  255. int ret;
  256. if (IS_ERR(priv->pin_states[PIN_TDM_OUT_ON]))
  257. return PTR_ERR(priv->pin_states[PIN_TDM_OUT_ON]);
  258. ret = pinctrl_select_state(priv->pinctrl,
  259. priv->pin_states[PIN_TDM_OUT_ON]);
  260. if (ret)
  261. dev_err(rtd->card->dev, "%s failed to select state %d\n",
  262. __func__, ret);
  263. return ret;
  264. }
  265. static void mt8183_mt6358_tdm_shutdown(struct snd_pcm_substream *substream)
  266. {
  267. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  268. struct mt8183_mt6358_ts3a227_max98357_priv *priv =
  269. snd_soc_card_get_drvdata(rtd->card);
  270. int ret;
  271. if (IS_ERR(priv->pin_states[PIN_TDM_OUT_OFF]))
  272. return;
  273. ret = pinctrl_select_state(priv->pinctrl,
  274. priv->pin_states[PIN_TDM_OUT_OFF]);
  275. if (ret)
  276. dev_err(rtd->card->dev, "%s failed to select state %d\n",
  277. __func__, ret);
  278. }
  279. static const struct snd_soc_ops mt8183_mt6358_tdm_ops = {
  280. .startup = mt8183_mt6358_tdm_startup,
  281. .shutdown = mt8183_mt6358_tdm_shutdown,
  282. };
  283. static int
  284. mt8183_mt6358_ts3a227_max98357_wov_startup(
  285. struct snd_pcm_substream *substream)
  286. {
  287. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  288. struct snd_soc_card *card = rtd->card;
  289. struct mt8183_mt6358_ts3a227_max98357_priv *priv =
  290. snd_soc_card_get_drvdata(card);
  291. return pinctrl_select_state(priv->pinctrl,
  292. priv->pin_states[PIN_WOV]);
  293. }
  294. static void
  295. mt8183_mt6358_ts3a227_max98357_wov_shutdown(
  296. struct snd_pcm_substream *substream)
  297. {
  298. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  299. struct snd_soc_card *card = rtd->card;
  300. struct mt8183_mt6358_ts3a227_max98357_priv *priv =
  301. snd_soc_card_get_drvdata(card);
  302. int ret;
  303. ret = pinctrl_select_state(priv->pinctrl,
  304. priv->pin_states[PIN_STATE_DEFAULT]);
  305. if (ret)
  306. dev_err(card->dev, "%s failed to select state %d\n",
  307. __func__, ret);
  308. }
  309. static const struct snd_soc_ops mt8183_mt6358_ts3a227_max98357_wov_ops = {
  310. .startup = mt8183_mt6358_ts3a227_max98357_wov_startup,
  311. .shutdown = mt8183_mt6358_ts3a227_max98357_wov_shutdown,
  312. };
  313. static int
  314. mt8183_mt6358_ts3a227_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd)
  315. {
  316. struct mt8183_mt6358_ts3a227_max98357_priv *priv =
  317. snd_soc_card_get_drvdata(rtd->card);
  318. int ret;
  319. ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT,
  320. &priv->hdmi_jack);
  321. if (ret)
  322. return ret;
  323. return snd_soc_component_set_jack(asoc_rtd_to_codec(rtd, 0)->component,
  324. &priv->hdmi_jack, NULL);
  325. }
  326. static int mt8183_bt_init(struct snd_soc_pcm_runtime *rtd)
  327. {
  328. struct snd_soc_component *cmpnt_afe =
  329. snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
  330. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
  331. int ret;
  332. ret = mt8183_dai_i2s_set_share(afe, "I2S5", "I2S0");
  333. if (ret) {
  334. dev_err(rtd->dev, "Failed to set up shared clocks\n");
  335. return ret;
  336. }
  337. return 0;
  338. }
  339. static int mt8183_i2s2_init(struct snd_soc_pcm_runtime *rtd)
  340. {
  341. struct snd_soc_component *cmpnt_afe =
  342. snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
  343. struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
  344. int ret;
  345. ret = mt8183_dai_i2s_set_share(afe, "I2S2", "I2S3");
  346. if (ret) {
  347. dev_err(rtd->dev, "Failed to set up shared clocks\n");
  348. return ret;
  349. }
  350. return 0;
  351. }
  352. static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = {
  353. /* FE */
  354. {
  355. .name = "Playback_1",
  356. .stream_name = "Playback_1",
  357. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  358. SND_SOC_DPCM_TRIGGER_PRE},
  359. .dynamic = 1,
  360. .dpcm_playback = 1,
  361. .ops = &mt8183_mt6358_ops,
  362. SND_SOC_DAILINK_REG(playback1),
  363. },
  364. {
  365. .name = "Playback_2",
  366. .stream_name = "Playback_2",
  367. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  368. SND_SOC_DPCM_TRIGGER_PRE},
  369. .dynamic = 1,
  370. .dpcm_playback = 1,
  371. .ops = &mt8183_mt6358_ts3a227_max98357_bt_sco_ops,
  372. SND_SOC_DAILINK_REG(playback2),
  373. },
  374. {
  375. .name = "Playback_3",
  376. .stream_name = "Playback_3",
  377. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  378. SND_SOC_DPCM_TRIGGER_PRE},
  379. .dynamic = 1,
  380. .dpcm_playback = 1,
  381. SND_SOC_DAILINK_REG(playback3),
  382. },
  383. {
  384. .name = "Capture_1",
  385. .stream_name = "Capture_1",
  386. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  387. SND_SOC_DPCM_TRIGGER_PRE},
  388. .dynamic = 1,
  389. .dpcm_capture = 1,
  390. .ops = &mt8183_mt6358_ts3a227_max98357_bt_sco_ops,
  391. SND_SOC_DAILINK_REG(capture1),
  392. },
  393. {
  394. .name = "Capture_2",
  395. .stream_name = "Capture_2",
  396. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  397. SND_SOC_DPCM_TRIGGER_PRE},
  398. .dynamic = 1,
  399. .dpcm_capture = 1,
  400. SND_SOC_DAILINK_REG(capture2),
  401. },
  402. {
  403. .name = "Capture_3",
  404. .stream_name = "Capture_3",
  405. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  406. SND_SOC_DPCM_TRIGGER_PRE},
  407. .dynamic = 1,
  408. .dpcm_capture = 1,
  409. .ops = &mt8183_mt6358_ops,
  410. SND_SOC_DAILINK_REG(capture3),
  411. },
  412. {
  413. .name = "Capture_Mono_1",
  414. .stream_name = "Capture_Mono_1",
  415. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  416. SND_SOC_DPCM_TRIGGER_PRE},
  417. .dynamic = 1,
  418. .dpcm_capture = 1,
  419. SND_SOC_DAILINK_REG(capture_mono),
  420. },
  421. {
  422. .name = "Playback_HDMI",
  423. .stream_name = "Playback_HDMI",
  424. .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
  425. SND_SOC_DPCM_TRIGGER_PRE},
  426. .dynamic = 1,
  427. .dpcm_playback = 1,
  428. SND_SOC_DAILINK_REG(playback_hdmi),
  429. },
  430. {
  431. .name = "Wake on Voice",
  432. .stream_name = "Wake on Voice",
  433. .ignore_suspend = 1,
  434. .ignore = 1,
  435. SND_SOC_DAILINK_REG(wake_on_voice),
  436. .ops = &mt8183_mt6358_ts3a227_max98357_wov_ops,
  437. },
  438. /* BE */
  439. {
  440. .name = "Primary Codec",
  441. .no_pcm = 1,
  442. .dpcm_playback = 1,
  443. .dpcm_capture = 1,
  444. .ignore_suspend = 1,
  445. SND_SOC_DAILINK_REG(primary_codec),
  446. },
  447. {
  448. .name = "PCM 1",
  449. .no_pcm = 1,
  450. .dpcm_playback = 1,
  451. .dpcm_capture = 1,
  452. .ignore_suspend = 1,
  453. SND_SOC_DAILINK_REG(pcm1),
  454. },
  455. {
  456. .name = "PCM 2",
  457. .no_pcm = 1,
  458. .dpcm_playback = 1,
  459. .dpcm_capture = 1,
  460. .ignore_suspend = 1,
  461. SND_SOC_DAILINK_REG(pcm2),
  462. },
  463. {
  464. .name = "I2S0",
  465. .no_pcm = 1,
  466. .dpcm_capture = 1,
  467. .ignore_suspend = 1,
  468. .ops = &mt8183_mt6358_i2s_ops,
  469. SND_SOC_DAILINK_REG(i2s0),
  470. },
  471. {
  472. .name = "I2S1",
  473. .no_pcm = 1,
  474. .dpcm_playback = 1,
  475. .ignore_suspend = 1,
  476. .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
  477. .ops = &mt8183_mt6358_i2s_ops,
  478. SND_SOC_DAILINK_REG(i2s1),
  479. },
  480. {
  481. .name = "I2S2",
  482. .no_pcm = 1,
  483. .dpcm_capture = 1,
  484. .ignore_suspend = 1,
  485. .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
  486. .ops = &mt8183_mt6358_i2s_ops,
  487. .init = &mt8183_i2s2_init,
  488. SND_SOC_DAILINK_REG(i2s2),
  489. },
  490. {
  491. .name = "I2S3",
  492. .no_pcm = 1,
  493. .dpcm_playback = 1,
  494. .ignore_suspend = 1,
  495. },
  496. {
  497. .name = "I2S5",
  498. .no_pcm = 1,
  499. .dpcm_playback = 1,
  500. .ignore_suspend = 1,
  501. .ops = &mt8183_mt6358_i2s_ops,
  502. .init = &mt8183_bt_init,
  503. SND_SOC_DAILINK_REG(i2s5),
  504. },
  505. {
  506. .name = "TDM",
  507. .no_pcm = 1,
  508. .dai_fmt = SND_SOC_DAIFMT_I2S |
  509. SND_SOC_DAIFMT_IB_IF |
  510. SND_SOC_DAIFMT_CBM_CFM,
  511. .dpcm_playback = 1,
  512. .ignore_suspend = 1,
  513. .be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
  514. .ops = &mt8183_mt6358_tdm_ops,
  515. .ignore = 1,
  516. .init = mt8183_mt6358_ts3a227_max98357_hdmi_init,
  517. SND_SOC_DAILINK_REG(tdm),
  518. },
  519. };
  520. static struct snd_soc_card mt8183_mt6358_ts3a227_max98357_card = {
  521. .name = "mt8183_mt6358_ts3a227_max98357",
  522. .owner = THIS_MODULE,
  523. .dai_link = mt8183_mt6358_ts3a227_dai_links,
  524. .num_links = ARRAY_SIZE(mt8183_mt6358_ts3a227_dai_links),
  525. };
  526. static struct snd_soc_card mt8183_mt6358_ts3a227_max98357b_card = {
  527. .name = "mt8183_mt6358_ts3a227_max98357b",
  528. .owner = THIS_MODULE,
  529. .dai_link = mt8183_mt6358_ts3a227_dai_links,
  530. .num_links = ARRAY_SIZE(mt8183_mt6358_ts3a227_dai_links),
  531. };
  532. static struct snd_soc_codec_conf mt8183_mt6358_ts3a227_rt1015_amp_conf[] = {
  533. {
  534. .dlc = COMP_CODEC_CONF(RT1015_DEV0_NAME),
  535. .name_prefix = "Left",
  536. },
  537. {
  538. .dlc = COMP_CODEC_CONF(RT1015_DEV1_NAME),
  539. .name_prefix = "Right",
  540. },
  541. };
  542. static struct snd_soc_card mt8183_mt6358_ts3a227_rt1015_card = {
  543. .name = "mt8183_mt6358_ts3a227_rt1015",
  544. .owner = THIS_MODULE,
  545. .dai_link = mt8183_mt6358_ts3a227_dai_links,
  546. .num_links = ARRAY_SIZE(mt8183_mt6358_ts3a227_dai_links),
  547. .codec_conf = mt8183_mt6358_ts3a227_rt1015_amp_conf,
  548. .num_configs = ARRAY_SIZE(mt8183_mt6358_ts3a227_rt1015_amp_conf),
  549. };
  550. static struct snd_soc_card mt8183_mt6358_ts3a227_rt1015p_card = {
  551. .name = "mt8183_mt6358_ts3a227_rt1015p",
  552. .owner = THIS_MODULE,
  553. .dai_link = mt8183_mt6358_ts3a227_dai_links,
  554. .num_links = ARRAY_SIZE(mt8183_mt6358_ts3a227_dai_links),
  555. };
  556. static int
  557. mt8183_mt6358_ts3a227_max98357_headset_init(struct snd_soc_component *component)
  558. {
  559. int ret;
  560. struct mt8183_mt6358_ts3a227_max98357_priv *priv =
  561. snd_soc_card_get_drvdata(component->card);
  562. /* Enable Headset and 4 Buttons Jack detection */
  563. ret = snd_soc_card_jack_new(component->card,
  564. "Headset Jack",
  565. SND_JACK_HEADSET |
  566. SND_JACK_BTN_0 | SND_JACK_BTN_1 |
  567. SND_JACK_BTN_2 | SND_JACK_BTN_3,
  568. &priv->headset_jack);
  569. if (ret)
  570. return ret;
  571. ret = ts3a227e_enable_jack_detect(component, &priv->headset_jack);
  572. return ret;
  573. }
  574. static struct snd_soc_aux_dev mt8183_mt6358_ts3a227_max98357_headset_dev = {
  575. .dlc = COMP_EMPTY(),
  576. .init = mt8183_mt6358_ts3a227_max98357_headset_init,
  577. };
  578. static int
  579. mt8183_mt6358_ts3a227_max98357_dev_probe(struct platform_device *pdev)
  580. {
  581. struct snd_soc_card *card;
  582. struct device_node *platform_node, *ec_codec, *hdmi_codec;
  583. struct snd_soc_dai_link *dai_link;
  584. struct mt8183_mt6358_ts3a227_max98357_priv *priv;
  585. int ret, i;
  586. platform_node = of_parse_phandle(pdev->dev.of_node,
  587. "mediatek,platform", 0);
  588. if (!platform_node) {
  589. dev_err(&pdev->dev, "Property 'platform' missing or invalid\n");
  590. return -EINVAL;
  591. }
  592. card = (struct snd_soc_card *)of_device_get_match_data(&pdev->dev);
  593. if (!card) {
  594. of_node_put(platform_node);
  595. return -EINVAL;
  596. }
  597. card->dev = &pdev->dev;
  598. ec_codec = of_parse_phandle(pdev->dev.of_node, "mediatek,ec-codec", 0);
  599. hdmi_codec = of_parse_phandle(pdev->dev.of_node,
  600. "mediatek,hdmi-codec", 0);
  601. for_each_card_prelinks(card, i, dai_link) {
  602. if (ec_codec && strcmp(dai_link->name, "Wake on Voice") == 0) {
  603. dai_link->cpus[0].name = NULL;
  604. dai_link->cpus[0].of_node = ec_codec;
  605. dai_link->cpus[0].dai_name = NULL;
  606. dai_link->codecs[0].name = NULL;
  607. dai_link->codecs[0].of_node = ec_codec;
  608. dai_link->codecs[0].dai_name = "Wake on Voice";
  609. dai_link->platforms[0].of_node = ec_codec;
  610. dai_link->ignore = 0;
  611. }
  612. if (strcmp(dai_link->name, "I2S3") == 0) {
  613. if (card == &mt8183_mt6358_ts3a227_max98357_card ||
  614. card == &mt8183_mt6358_ts3a227_max98357b_card) {
  615. dai_link->be_hw_params_fixup =
  616. mt8183_i2s_hw_params_fixup;
  617. dai_link->ops = &mt8183_mt6358_i2s_ops;
  618. dai_link->cpus = i2s3_max98357a_cpus;
  619. dai_link->num_cpus =
  620. ARRAY_SIZE(i2s3_max98357a_cpus);
  621. dai_link->codecs = i2s3_max98357a_codecs;
  622. dai_link->num_codecs =
  623. ARRAY_SIZE(i2s3_max98357a_codecs);
  624. dai_link->platforms = i2s3_max98357a_platforms;
  625. dai_link->num_platforms =
  626. ARRAY_SIZE(i2s3_max98357a_platforms);
  627. } else if (card == &mt8183_mt6358_ts3a227_rt1015_card) {
  628. dai_link->be_hw_params_fixup =
  629. mt8183_rt1015_i2s_hw_params_fixup;
  630. dai_link->ops = &mt8183_mt6358_rt1015_i2s_ops;
  631. dai_link->cpus = i2s3_rt1015_cpus;
  632. dai_link->num_cpus =
  633. ARRAY_SIZE(i2s3_rt1015_cpus);
  634. dai_link->codecs = i2s3_rt1015_codecs;
  635. dai_link->num_codecs =
  636. ARRAY_SIZE(i2s3_rt1015_codecs);
  637. dai_link->platforms = i2s3_rt1015_platforms;
  638. dai_link->num_platforms =
  639. ARRAY_SIZE(i2s3_rt1015_platforms);
  640. } else if (card == &mt8183_mt6358_ts3a227_rt1015p_card) {
  641. dai_link->be_hw_params_fixup =
  642. mt8183_rt1015_i2s_hw_params_fixup;
  643. dai_link->ops = &mt8183_mt6358_i2s_ops;
  644. dai_link->cpus = i2s3_rt1015p_cpus;
  645. dai_link->num_cpus =
  646. ARRAY_SIZE(i2s3_rt1015p_cpus);
  647. dai_link->codecs = i2s3_rt1015p_codecs;
  648. dai_link->num_codecs =
  649. ARRAY_SIZE(i2s3_rt1015p_codecs);
  650. dai_link->platforms = i2s3_rt1015p_platforms;
  651. dai_link->num_platforms =
  652. ARRAY_SIZE(i2s3_rt1015p_platforms);
  653. }
  654. }
  655. if (card == &mt8183_mt6358_ts3a227_max98357b_card) {
  656. if (strcmp(dai_link->name, "I2S2") == 0 ||
  657. strcmp(dai_link->name, "I2S3") == 0)
  658. dai_link->dai_fmt = SND_SOC_DAIFMT_LEFT_J |
  659. SND_SOC_DAIFMT_NB_NF |
  660. SND_SOC_DAIFMT_CBM_CFM;
  661. }
  662. if (hdmi_codec && strcmp(dai_link->name, "TDM") == 0) {
  663. dai_link->codecs->of_node = hdmi_codec;
  664. dai_link->ignore = 0;
  665. }
  666. if (!dai_link->platforms->name)
  667. dai_link->platforms->of_node = platform_node;
  668. }
  669. mt8183_mt6358_ts3a227_max98357_headset_dev.dlc.of_node =
  670. of_parse_phandle(pdev->dev.of_node,
  671. "mediatek,headset-codec", 0);
  672. if (mt8183_mt6358_ts3a227_max98357_headset_dev.dlc.of_node) {
  673. card->aux_dev = &mt8183_mt6358_ts3a227_max98357_headset_dev;
  674. card->num_aux_devs = 1;
  675. }
  676. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  677. if (!priv) {
  678. ret = -ENOMEM;
  679. goto out;
  680. }
  681. snd_soc_card_set_drvdata(card, priv);
  682. priv->pinctrl = devm_pinctrl_get(&pdev->dev);
  683. if (IS_ERR(priv->pinctrl)) {
  684. dev_err(&pdev->dev, "%s devm_pinctrl_get failed\n",
  685. __func__);
  686. ret = PTR_ERR(priv->pinctrl);
  687. goto out;
  688. }
  689. for (i = 0; i < PIN_STATE_MAX; i++) {
  690. priv->pin_states[i] = pinctrl_lookup_state(priv->pinctrl,
  691. mt8183_pin_str[i]);
  692. if (IS_ERR(priv->pin_states[i])) {
  693. ret = PTR_ERR(priv->pin_states[i]);
  694. dev_info(&pdev->dev, "%s Can't find pin state %s %d\n",
  695. __func__, mt8183_pin_str[i], ret);
  696. }
  697. }
  698. if (!IS_ERR(priv->pin_states[PIN_TDM_OUT_OFF])) {
  699. ret = pinctrl_select_state(priv->pinctrl,
  700. priv->pin_states[PIN_TDM_OUT_OFF]);
  701. if (ret)
  702. dev_info(&pdev->dev,
  703. "%s failed to select state %d\n",
  704. __func__, ret);
  705. }
  706. if (!IS_ERR(priv->pin_states[PIN_STATE_DEFAULT])) {
  707. ret = pinctrl_select_state(priv->pinctrl,
  708. priv->pin_states[PIN_STATE_DEFAULT]);
  709. if (ret)
  710. dev_info(&pdev->dev,
  711. "%s failed to select state %d\n",
  712. __func__, ret);
  713. }
  714. ret = devm_snd_soc_register_card(&pdev->dev, card);
  715. out:
  716. of_node_put(platform_node);
  717. of_node_put(ec_codec);
  718. of_node_put(hdmi_codec);
  719. return ret;
  720. }
  721. #ifdef CONFIG_OF
  722. static const struct of_device_id mt8183_mt6358_ts3a227_max98357_dt_match[] = {
  723. {
  724. .compatible = "mediatek,mt8183_mt6358_ts3a227_max98357",
  725. .data = &mt8183_mt6358_ts3a227_max98357_card,
  726. },
  727. {
  728. .compatible = "mediatek,mt8183_mt6358_ts3a227_max98357b",
  729. .data = &mt8183_mt6358_ts3a227_max98357b_card,
  730. },
  731. {
  732. .compatible = "mediatek,mt8183_mt6358_ts3a227_rt1015",
  733. .data = &mt8183_mt6358_ts3a227_rt1015_card,
  734. },
  735. {
  736. .compatible = "mediatek,mt8183_mt6358_ts3a227_rt1015p",
  737. .data = &mt8183_mt6358_ts3a227_rt1015p_card,
  738. },
  739. {}
  740. };
  741. #endif
  742. static struct platform_driver mt8183_mt6358_ts3a227_max98357_driver = {
  743. .driver = {
  744. .name = "mt8183_mt6358_ts3a227",
  745. #ifdef CONFIG_OF
  746. .of_match_table = mt8183_mt6358_ts3a227_max98357_dt_match,
  747. #endif
  748. .pm = &snd_soc_pm_ops,
  749. },
  750. .probe = mt8183_mt6358_ts3a227_max98357_dev_probe,
  751. };
  752. module_platform_driver(mt8183_mt6358_ts3a227_max98357_driver);
  753. /* Module information */
  754. MODULE_DESCRIPTION("MT8183-MT6358-TS3A227-MAX98357 ALSA SoC machine driver");
  755. MODULE_AUTHOR("Shunli Wang <[email protected]>");
  756. MODULE_LICENSE("GPL v2");
  757. MODULE_ALIAS("mt8183_mt6358_ts3a227_max98357 soc card");