mt6797-dai-pcm.c 8.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317
  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // MediaTek ALSA SoC Audio DAI I2S Control
  4. //
  5. // Copyright (c) 2018 MediaTek Inc.
  6. // Author: KaiChieh Chuang <[email protected]>
  7. #include <linux/regmap.h>
  8. #include <sound/pcm_params.h>
  9. #include "mt6797-afe-common.h"
  10. #include "mt6797-interconnection.h"
  11. #include "mt6797-reg.h"
  12. enum AUD_TX_LCH_RPT {
  13. AUD_TX_LCH_RPT_NO_REPEAT = 0,
  14. AUD_TX_LCH_RPT_REPEAT = 1
  15. };
  16. enum AUD_VBT_16K_MODE {
  17. AUD_VBT_16K_MODE_DISABLE = 0,
  18. AUD_VBT_16K_MODE_ENABLE = 1
  19. };
  20. enum AUD_EXT_MODEM {
  21. AUD_EXT_MODEM_SELECT_INTERNAL = 0,
  22. AUD_EXT_MODEM_SELECT_EXTERNAL = 1
  23. };
  24. enum AUD_PCM_SYNC_TYPE {
  25. /* bck sync length = 1 */
  26. AUD_PCM_ONE_BCK_CYCLE_SYNC = 0,
  27. /* bck sync length = PCM_INTF_CON1[9:13] */
  28. AUD_PCM_EXTENDED_BCK_CYCLE_SYNC = 1
  29. };
  30. enum AUD_BT_MODE {
  31. AUD_BT_MODE_DUAL_MIC_ON_TX = 0,
  32. AUD_BT_MODE_SINGLE_MIC_ON_TX = 1
  33. };
  34. enum AUD_PCM_AFIFO_SRC {
  35. /* slave mode & external modem uses different crystal */
  36. AUD_PCM_AFIFO_ASRC = 0,
  37. /* slave mode & external modem uses the same crystal */
  38. AUD_PCM_AFIFO_AFIFO = 1
  39. };
  40. enum AUD_PCM_CLOCK_SOURCE {
  41. AUD_PCM_CLOCK_MASTER_MODE = 0,
  42. AUD_PCM_CLOCK_SLAVE_MODE = 1
  43. };
  44. enum AUD_PCM_WLEN {
  45. AUD_PCM_WLEN_PCM_32_BCK_CYCLES = 0,
  46. AUD_PCM_WLEN_PCM_64_BCK_CYCLES = 1
  47. };
  48. enum AUD_PCM_MODE {
  49. AUD_PCM_MODE_PCM_MODE_8K = 0,
  50. AUD_PCM_MODE_PCM_MODE_16K = 1,
  51. AUD_PCM_MODE_PCM_MODE_32K = 2,
  52. AUD_PCM_MODE_PCM_MODE_48K = 3,
  53. };
  54. enum AUD_PCM_FMT {
  55. AUD_PCM_FMT_I2S = 0,
  56. AUD_PCM_FMT_EIAJ = 1,
  57. AUD_PCM_FMT_PCM_MODE_A = 2,
  58. AUD_PCM_FMT_PCM_MODE_B = 3
  59. };
  60. enum AUD_BCLK_OUT_INV {
  61. AUD_BCLK_OUT_INV_NO_INVERSE = 0,
  62. AUD_BCLK_OUT_INV_INVERSE = 1
  63. };
  64. enum AUD_PCM_EN {
  65. AUD_PCM_EN_DISABLE = 0,
  66. AUD_PCM_EN_ENABLE = 1
  67. };
  68. /* dai component */
  69. static const struct snd_kcontrol_new mtk_pcm_1_playback_ch1_mix[] = {
  70. SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN7,
  71. I_ADDA_UL_CH1, 1, 0),
  72. SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN7,
  73. I_DL2_CH1, 1, 0),
  74. };
  75. static const struct snd_kcontrol_new mtk_pcm_1_playback_ch2_mix[] = {
  76. SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN8,
  77. I_ADDA_UL_CH2, 1, 0),
  78. SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN8,
  79. I_DL2_CH2, 1, 0),
  80. };
  81. static const struct snd_kcontrol_new mtk_pcm_1_playback_ch4_mix[] = {
  82. SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN27,
  83. I_DL1_CH1, 1, 0),
  84. };
  85. static const struct snd_kcontrol_new mtk_pcm_2_playback_ch1_mix[] = {
  86. SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1", AFE_CONN17,
  87. I_ADDA_UL_CH1, 1, 0),
  88. SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1", AFE_CONN17,
  89. I_DL2_CH1, 1, 0),
  90. };
  91. static const struct snd_kcontrol_new mtk_pcm_2_playback_ch2_mix[] = {
  92. SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2", AFE_CONN18,
  93. I_ADDA_UL_CH2, 1, 0),
  94. SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2", AFE_CONN18,
  95. I_DL2_CH2, 1, 0),
  96. };
  97. static const struct snd_kcontrol_new mtk_pcm_2_playback_ch4_mix[] = {
  98. SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN24,
  99. I_DL1_CH1, 1, 0),
  100. };
  101. static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
  102. /* inter-connections */
  103. SND_SOC_DAPM_MIXER("PCM_1_PB_CH1", SND_SOC_NOPM, 0, 0,
  104. mtk_pcm_1_playback_ch1_mix,
  105. ARRAY_SIZE(mtk_pcm_1_playback_ch1_mix)),
  106. SND_SOC_DAPM_MIXER("PCM_1_PB_CH2", SND_SOC_NOPM, 0, 0,
  107. mtk_pcm_1_playback_ch2_mix,
  108. ARRAY_SIZE(mtk_pcm_1_playback_ch2_mix)),
  109. SND_SOC_DAPM_MIXER("PCM_1_PB_CH4", SND_SOC_NOPM, 0, 0,
  110. mtk_pcm_1_playback_ch4_mix,
  111. ARRAY_SIZE(mtk_pcm_1_playback_ch4_mix)),
  112. SND_SOC_DAPM_MIXER("PCM_2_PB_CH1", SND_SOC_NOPM, 0, 0,
  113. mtk_pcm_2_playback_ch1_mix,
  114. ARRAY_SIZE(mtk_pcm_2_playback_ch1_mix)),
  115. SND_SOC_DAPM_MIXER("PCM_2_PB_CH2", SND_SOC_NOPM, 0, 0,
  116. mtk_pcm_2_playback_ch2_mix,
  117. ARRAY_SIZE(mtk_pcm_2_playback_ch2_mix)),
  118. SND_SOC_DAPM_MIXER("PCM_2_PB_CH4", SND_SOC_NOPM, 0, 0,
  119. mtk_pcm_2_playback_ch4_mix,
  120. ARRAY_SIZE(mtk_pcm_2_playback_ch4_mix)),
  121. SND_SOC_DAPM_SUPPLY("PCM_1_EN", PCM_INTF_CON1, PCM_EN_SFT, 0,
  122. NULL, 0),
  123. SND_SOC_DAPM_SUPPLY("PCM_2_EN", PCM2_INTF_CON, PCM2_EN_SFT, 0,
  124. NULL, 0),
  125. SND_SOC_DAPM_INPUT("MD1_TO_AFE"),
  126. SND_SOC_DAPM_INPUT("MD2_TO_AFE"),
  127. SND_SOC_DAPM_OUTPUT("AFE_TO_MD1"),
  128. SND_SOC_DAPM_OUTPUT("AFE_TO_MD2"),
  129. };
  130. static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
  131. {"PCM 1 Playback", NULL, "PCM_1_PB_CH1"},
  132. {"PCM 1 Playback", NULL, "PCM_1_PB_CH2"},
  133. {"PCM 1 Playback", NULL, "PCM_1_PB_CH4"},
  134. {"PCM 2 Playback", NULL, "PCM_2_PB_CH1"},
  135. {"PCM 2 Playback", NULL, "PCM_2_PB_CH2"},
  136. {"PCM 2 Playback", NULL, "PCM_2_PB_CH4"},
  137. {"PCM 1 Playback", NULL, "PCM_1_EN"},
  138. {"PCM 2 Playback", NULL, "PCM_2_EN"},
  139. {"PCM 1 Capture", NULL, "PCM_1_EN"},
  140. {"PCM 2 Capture", NULL, "PCM_2_EN"},
  141. {"AFE_TO_MD1", NULL, "PCM 2 Playback"},
  142. {"AFE_TO_MD2", NULL, "PCM 1 Playback"},
  143. {"PCM 2 Capture", NULL, "MD1_TO_AFE"},
  144. {"PCM 1 Capture", NULL, "MD2_TO_AFE"},
  145. {"PCM_1_PB_CH1", "DL2_CH1", "DL2"},
  146. {"PCM_1_PB_CH2", "DL2_CH2", "DL2"},
  147. {"PCM_1_PB_CH4", "DL1_CH1", "DL1"},
  148. {"PCM_2_PB_CH1", "DL2_CH1", "DL2"},
  149. {"PCM_2_PB_CH2", "DL2_CH2", "DL2"},
  150. {"PCM_2_PB_CH4", "DL1_CH1", "DL1"},
  151. };
  152. /* dai ops */
  153. static int mtk_dai_pcm_hw_params(struct snd_pcm_substream *substream,
  154. struct snd_pcm_hw_params *params,
  155. struct snd_soc_dai *dai)
  156. {
  157. struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
  158. unsigned int rate = params_rate(params);
  159. unsigned int rate_reg = mt6797_rate_transform(afe->dev, rate, dai->id);
  160. unsigned int pcm_con = 0;
  161. dev_dbg(afe->dev, "%s(), id %d, stream %d, rate %d, rate_reg %d, widget active p %d, c %d\n",
  162. __func__,
  163. dai->id,
  164. substream->stream,
  165. rate,
  166. rate_reg,
  167. dai->playback_widget->active,
  168. dai->capture_widget->active);
  169. if (dai->playback_widget->active || dai->capture_widget->active)
  170. return 0;
  171. switch (dai->id) {
  172. case MT6797_DAI_PCM_1:
  173. pcm_con |= AUD_BCLK_OUT_INV_NO_INVERSE << PCM_BCLK_OUT_INV_SFT;
  174. pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM_TX_LCH_RPT_SFT;
  175. pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM_VBT_16K_MODE_SFT;
  176. pcm_con |= AUD_EXT_MODEM_SELECT_INTERNAL << PCM_EXT_MODEM_SFT;
  177. pcm_con |= 0 << PCM_SYNC_LENGTH_SFT;
  178. pcm_con |= AUD_PCM_ONE_BCK_CYCLE_SYNC << PCM_SYNC_TYPE_SFT;
  179. pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM_BT_MODE_SFT;
  180. pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM_BYP_ASRC_SFT;
  181. pcm_con |= AUD_PCM_CLOCK_SLAVE_MODE << PCM_SLAVE_SFT;
  182. pcm_con |= rate_reg << PCM_MODE_SFT;
  183. pcm_con |= AUD_PCM_FMT_PCM_MODE_B << PCM_FMT_SFT;
  184. regmap_update_bits(afe->regmap, PCM_INTF_CON1,
  185. 0xfffffffe, pcm_con);
  186. break;
  187. case MT6797_DAI_PCM_2:
  188. pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM2_TX_LCH_RPT_SFT;
  189. pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM2_VBT_16K_MODE_SFT;
  190. pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM2_BT_MODE_SFT;
  191. pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM2_AFIFO_SFT;
  192. pcm_con |= AUD_PCM_WLEN_PCM_32_BCK_CYCLES << PCM2_WLEN_SFT;
  193. pcm_con |= rate_reg << PCM2_MODE_SFT;
  194. pcm_con |= AUD_PCM_FMT_PCM_MODE_B << PCM2_FMT_SFT;
  195. regmap_update_bits(afe->regmap, PCM2_INTF_CON,
  196. 0xfffffffe, pcm_con);
  197. break;
  198. default:
  199. dev_warn(afe->dev, "%s(), id %d not support\n",
  200. __func__, dai->id);
  201. return -EINVAL;
  202. }
  203. return 0;
  204. }
  205. static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
  206. .hw_params = mtk_dai_pcm_hw_params,
  207. };
  208. /* dai driver */
  209. #define MTK_PCM_RATES (SNDRV_PCM_RATE_8000 |\
  210. SNDRV_PCM_RATE_16000 |\
  211. SNDRV_PCM_RATE_32000 |\
  212. SNDRV_PCM_RATE_48000)
  213. #define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
  214. SNDRV_PCM_FMTBIT_S24_LE |\
  215. SNDRV_PCM_FMTBIT_S32_LE)
  216. static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
  217. {
  218. .name = "PCM 1",
  219. .id = MT6797_DAI_PCM_1,
  220. .playback = {
  221. .stream_name = "PCM 1 Playback",
  222. .channels_min = 1,
  223. .channels_max = 2,
  224. .rates = MTK_PCM_RATES,
  225. .formats = MTK_PCM_FORMATS,
  226. },
  227. .capture = {
  228. .stream_name = "PCM 1 Capture",
  229. .channels_min = 1,
  230. .channels_max = 2,
  231. .rates = MTK_PCM_RATES,
  232. .formats = MTK_PCM_FORMATS,
  233. },
  234. .ops = &mtk_dai_pcm_ops,
  235. .symmetric_rate = 1,
  236. .symmetric_sample_bits = 1,
  237. },
  238. {
  239. .name = "PCM 2",
  240. .id = MT6797_DAI_PCM_2,
  241. .playback = {
  242. .stream_name = "PCM 2 Playback",
  243. .channels_min = 1,
  244. .channels_max = 2,
  245. .rates = MTK_PCM_RATES,
  246. .formats = MTK_PCM_FORMATS,
  247. },
  248. .capture = {
  249. .stream_name = "PCM 2 Capture",
  250. .channels_min = 1,
  251. .channels_max = 2,
  252. .rates = MTK_PCM_RATES,
  253. .formats = MTK_PCM_FORMATS,
  254. },
  255. .ops = &mtk_dai_pcm_ops,
  256. .symmetric_rate = 1,
  257. .symmetric_sample_bits = 1,
  258. },
  259. };
  260. int mt6797_dai_pcm_register(struct mtk_base_afe *afe)
  261. {
  262. struct mtk_base_afe_dai *dai;
  263. dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
  264. if (!dai)
  265. return -ENOMEM;
  266. list_add(&dai->list, &afe->sub_dais);
  267. dai->dai_drivers = mtk_dai_pcm_driver;
  268. dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
  269. dai->dapm_widgets = mtk_dai_pcm_widgets;
  270. dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
  271. dai->dapm_routes = mtk_dai_pcm_routes;
  272. dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
  273. return 0;
  274. }