mtk-btcvsd.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Mediatek ALSA BT SCO CVSD/MSBC Driver
  4. //
  5. // Copyright (c) 2019 MediaTek Inc.
  6. // Author: KaiChieh Chuang <[email protected]>
  7. #include <linux/mfd/syscon.h>
  8. #include <linux/module.h>
  9. #include <linux/of_address.h>
  10. #include <linux/sched/clock.h>
  11. #include <sound/soc.h>
  12. #define BTCVSD_SND_NAME "mtk-btcvsd-snd"
  13. #define BT_CVSD_TX_NREADY BIT(21)
  14. #define BT_CVSD_RX_READY BIT(22)
  15. #define BT_CVSD_TX_UNDERFLOW BIT(23)
  16. #define BT_CVSD_RX_OVERFLOW BIT(24)
  17. #define BT_CVSD_INTERRUPT BIT(31)
  18. #define BT_CVSD_CLEAR \
  19. (BT_CVSD_TX_NREADY | BT_CVSD_RX_READY | BT_CVSD_TX_UNDERFLOW |\
  20. BT_CVSD_RX_OVERFLOW | BT_CVSD_INTERRUPT)
  21. /* TX */
  22. #define SCO_TX_ENCODE_SIZE (60)
  23. /* 18 = 6 * 180 / SCO_TX_ENCODE_SIZE */
  24. #define SCO_TX_PACKER_BUF_NUM (18)
  25. /* RX */
  26. #define SCO_RX_PLC_SIZE (30)
  27. #define SCO_RX_PACKER_BUF_NUM (64)
  28. #define SCO_RX_PACKET_MASK (0x3F)
  29. #define SCO_CVSD_PACKET_VALID_SIZE 2
  30. #define SCO_PACKET_120 120
  31. #define SCO_PACKET_180 180
  32. #define BTCVSD_RX_PACKET_SIZE (SCO_RX_PLC_SIZE + SCO_CVSD_PACKET_VALID_SIZE)
  33. #define BTCVSD_TX_PACKET_SIZE (SCO_TX_ENCODE_SIZE)
  34. #define BTCVSD_RX_BUF_SIZE (BTCVSD_RX_PACKET_SIZE * SCO_RX_PACKER_BUF_NUM)
  35. #define BTCVSD_TX_BUF_SIZE (BTCVSD_TX_PACKET_SIZE * SCO_TX_PACKER_BUF_NUM)
  36. enum bt_sco_state {
  37. BT_SCO_STATE_IDLE,
  38. BT_SCO_STATE_RUNNING,
  39. BT_SCO_STATE_ENDING,
  40. BT_SCO_STATE_LOOPBACK,
  41. };
  42. enum bt_sco_direct {
  43. BT_SCO_DIRECT_BT2ARM,
  44. BT_SCO_DIRECT_ARM2BT,
  45. };
  46. enum bt_sco_packet_len {
  47. BT_SCO_CVSD_30 = 0,
  48. BT_SCO_CVSD_60,
  49. BT_SCO_CVSD_90,
  50. BT_SCO_CVSD_120,
  51. BT_SCO_CVSD_10,
  52. BT_SCO_CVSD_20,
  53. BT_SCO_CVSD_MAX,
  54. };
  55. enum BT_SCO_BAND {
  56. BT_SCO_NB,
  57. BT_SCO_WB,
  58. };
  59. struct mtk_btcvsd_snd_hw_info {
  60. unsigned int num_valid_addr;
  61. unsigned long bt_sram_addr[20];
  62. unsigned int packet_length;
  63. unsigned int packet_num;
  64. };
  65. struct mtk_btcvsd_snd_stream {
  66. struct snd_pcm_substream *substream;
  67. int stream;
  68. enum bt_sco_state state;
  69. unsigned int packet_size;
  70. unsigned int buf_size;
  71. u8 temp_packet_buf[SCO_PACKET_180];
  72. int packet_w;
  73. int packet_r;
  74. snd_pcm_uframes_t prev_frame;
  75. int prev_packet_idx;
  76. unsigned int xrun:1;
  77. unsigned int timeout:1;
  78. unsigned int mute:1;
  79. unsigned int trigger_start:1;
  80. unsigned int wait_flag:1;
  81. unsigned int rw_cnt;
  82. unsigned long long time_stamp;
  83. unsigned long long buf_data_equivalent_time;
  84. struct mtk_btcvsd_snd_hw_info buffer_info;
  85. };
  86. struct mtk_btcvsd_snd {
  87. struct device *dev;
  88. int irq_id;
  89. struct regmap *infra;
  90. void __iomem *bt_pkv_base;
  91. void __iomem *bt_sram_bank2_base;
  92. unsigned int infra_misc_offset;
  93. unsigned int conn_bt_cvsd_mask;
  94. unsigned int cvsd_mcu_read_offset;
  95. unsigned int cvsd_mcu_write_offset;
  96. unsigned int cvsd_packet_indicator;
  97. u32 *bt_reg_pkt_r;
  98. u32 *bt_reg_pkt_w;
  99. u32 *bt_reg_ctl;
  100. unsigned int irq_disabled:1;
  101. spinlock_t tx_lock; /* spinlock for bt tx stream control */
  102. spinlock_t rx_lock; /* spinlock for bt rx stream control */
  103. wait_queue_head_t tx_wait;
  104. wait_queue_head_t rx_wait;
  105. struct mtk_btcvsd_snd_stream *tx;
  106. struct mtk_btcvsd_snd_stream *rx;
  107. u8 tx_packet_buf[BTCVSD_TX_BUF_SIZE];
  108. u8 rx_packet_buf[BTCVSD_RX_BUF_SIZE];
  109. enum BT_SCO_BAND band;
  110. };
  111. struct mtk_btcvsd_snd_time_buffer_info {
  112. unsigned long long data_count_equi_time;
  113. unsigned long long time_stamp_us;
  114. };
  115. static const unsigned int btsco_packet_valid_mask[BT_SCO_CVSD_MAX][6] = {
  116. {0x1, 0x1 << 1, 0x1 << 2, 0x1 << 3, 0x1 << 4, 0x1 << 5},
  117. {0x1, 0x1, 0x2, 0x2, 0x4, 0x4},
  118. {0x1, 0x1, 0x1, 0x2, 0x2, 0x2},
  119. {0x1, 0x1, 0x1, 0x1, 0x0, 0x0},
  120. {0x7, 0x7 << 3, 0x7 << 6, 0x7 << 9, 0x7 << 12, 0x7 << 15},
  121. {0x3, 0x3 << 1, 0x3 << 3, 0x3 << 4, 0x3 << 6, 0x3 << 7},
  122. };
  123. static const unsigned int btsco_packet_info[BT_SCO_CVSD_MAX][4] = {
  124. {30, 6, SCO_PACKET_180 / SCO_TX_ENCODE_SIZE,
  125. SCO_PACKET_180 / SCO_RX_PLC_SIZE},
  126. {60, 3, SCO_PACKET_180 / SCO_TX_ENCODE_SIZE,
  127. SCO_PACKET_180 / SCO_RX_PLC_SIZE},
  128. {90, 2, SCO_PACKET_180 / SCO_TX_ENCODE_SIZE,
  129. SCO_PACKET_180 / SCO_RX_PLC_SIZE},
  130. {120, 1, SCO_PACKET_120 / SCO_TX_ENCODE_SIZE,
  131. SCO_PACKET_120 / SCO_RX_PLC_SIZE},
  132. {10, 18, SCO_PACKET_180 / SCO_TX_ENCODE_SIZE,
  133. SCO_PACKET_180 / SCO_RX_PLC_SIZE},
  134. {20, 9, SCO_PACKET_180 / SCO_TX_ENCODE_SIZE,
  135. SCO_PACKET_180 / SCO_RX_PLC_SIZE},
  136. };
  137. static const u8 table_msbc_silence[SCO_PACKET_180] = {
  138. 0x01, 0x38, 0xad, 0x00, 0x00, 0xc5, 0x00, 0x00, 0x00, 0x00,
  139. 0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d,
  140. 0xdd, 0xb6, 0xdb, 0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7,
  141. 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb, 0x77, 0x6d, 0xb6, 0xdd,
  142. 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb, 0x77,
  143. 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6c, 0x00,
  144. 0x01, 0xc8, 0xad, 0x00, 0x00, 0xc5, 0x00, 0x00, 0x00, 0x00,
  145. 0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d,
  146. 0xdd, 0xb6, 0xdb, 0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7,
  147. 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb, 0x77, 0x6d, 0xb6, 0xdd,
  148. 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb, 0x77,
  149. 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6c, 0x00,
  150. 0x01, 0xf8, 0xad, 0x00, 0x00, 0xc5, 0x00, 0x00, 0x00, 0x00,
  151. 0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d,
  152. 0xdd, 0xb6, 0xdb, 0x77, 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7,
  153. 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb, 0x77, 0x6d, 0xb6, 0xdd,
  154. 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6d, 0xdd, 0xb6, 0xdb, 0x77,
  155. 0x6d, 0xb6, 0xdd, 0xdb, 0x6d, 0xb7, 0x76, 0xdb, 0x6c, 0x00
  156. };
  157. static void mtk_btcvsd_snd_irq_enable(struct mtk_btcvsd_snd *bt)
  158. {
  159. regmap_update_bits(bt->infra, bt->infra_misc_offset,
  160. bt->conn_bt_cvsd_mask, 0);
  161. }
  162. static void mtk_btcvsd_snd_irq_disable(struct mtk_btcvsd_snd *bt)
  163. {
  164. regmap_update_bits(bt->infra, bt->infra_misc_offset,
  165. bt->conn_bt_cvsd_mask, bt->conn_bt_cvsd_mask);
  166. }
  167. static void mtk_btcvsd_snd_set_state(struct mtk_btcvsd_snd *bt,
  168. struct mtk_btcvsd_snd_stream *bt_stream,
  169. int state)
  170. {
  171. dev_dbg(bt->dev, "%s(), stream %d, state %d, tx->state %d, rx->state %d, irq_disabled %d\n",
  172. __func__,
  173. bt_stream->stream, state,
  174. bt->tx->state, bt->rx->state, bt->irq_disabled);
  175. bt_stream->state = state;
  176. if (bt->tx->state == BT_SCO_STATE_IDLE &&
  177. bt->rx->state == BT_SCO_STATE_IDLE) {
  178. if (!bt->irq_disabled) {
  179. disable_irq(bt->irq_id);
  180. mtk_btcvsd_snd_irq_disable(bt);
  181. bt->irq_disabled = 1;
  182. }
  183. } else {
  184. if (bt->irq_disabled) {
  185. enable_irq(bt->irq_id);
  186. mtk_btcvsd_snd_irq_enable(bt);
  187. bt->irq_disabled = 0;
  188. }
  189. }
  190. }
  191. static int mtk_btcvsd_snd_tx_init(struct mtk_btcvsd_snd *bt)
  192. {
  193. memset(bt->tx, 0, sizeof(*bt->tx));
  194. memset(bt->tx_packet_buf, 0, sizeof(bt->tx_packet_buf));
  195. bt->tx->packet_size = BTCVSD_TX_PACKET_SIZE;
  196. bt->tx->buf_size = BTCVSD_TX_BUF_SIZE;
  197. bt->tx->timeout = 0;
  198. bt->tx->rw_cnt = 0;
  199. bt->tx->stream = SNDRV_PCM_STREAM_PLAYBACK;
  200. return 0;
  201. }
  202. static int mtk_btcvsd_snd_rx_init(struct mtk_btcvsd_snd *bt)
  203. {
  204. memset(bt->rx, 0, sizeof(*bt->rx));
  205. memset(bt->rx_packet_buf, 0, sizeof(bt->rx_packet_buf));
  206. bt->rx->packet_size = BTCVSD_RX_PACKET_SIZE;
  207. bt->rx->buf_size = BTCVSD_RX_BUF_SIZE;
  208. bt->rx->timeout = 0;
  209. bt->rx->rw_cnt = 0;
  210. bt->rx->stream = SNDRV_PCM_STREAM_CAPTURE;
  211. return 0;
  212. }
  213. static void get_tx_time_stamp(struct mtk_btcvsd_snd *bt,
  214. struct mtk_btcvsd_snd_time_buffer_info *ts)
  215. {
  216. ts->time_stamp_us = bt->tx->time_stamp;
  217. ts->data_count_equi_time = bt->tx->buf_data_equivalent_time;
  218. }
  219. static void get_rx_time_stamp(struct mtk_btcvsd_snd *bt,
  220. struct mtk_btcvsd_snd_time_buffer_info *ts)
  221. {
  222. ts->time_stamp_us = bt->rx->time_stamp;
  223. ts->data_count_equi_time = bt->rx->buf_data_equivalent_time;
  224. }
  225. static int btcvsd_bytes_to_frame(struct snd_pcm_substream *substream,
  226. int bytes)
  227. {
  228. int count = bytes;
  229. struct snd_pcm_runtime *runtime = substream->runtime;
  230. if (runtime->format == SNDRV_PCM_FORMAT_S32_LE ||
  231. runtime->format == SNDRV_PCM_FORMAT_U32_LE)
  232. count = count >> 2;
  233. else
  234. count = count >> 1;
  235. count = count / runtime->channels;
  236. return count;
  237. }
  238. static void mtk_btcvsd_snd_data_transfer(enum bt_sco_direct dir,
  239. u8 *src, u8 *dst,
  240. unsigned int blk_size,
  241. unsigned int blk_num)
  242. {
  243. unsigned int i, j;
  244. if (blk_size == 60 || blk_size == 120 || blk_size == 20) {
  245. u32 *src_32 = (u32 *)src;
  246. u32 *dst_32 = (u32 *)dst;
  247. for (i = 0; i < (blk_size * blk_num / 4); i++)
  248. *dst_32++ = *src_32++;
  249. } else {
  250. u16 *src_16 = (u16 *)src;
  251. u16 *dst_16 = (u16 *)dst;
  252. for (j = 0; j < blk_num; j++) {
  253. for (i = 0; i < (blk_size / 2); i++)
  254. *dst_16++ = *src_16++;
  255. if (dir == BT_SCO_DIRECT_BT2ARM)
  256. src_16++;
  257. else
  258. dst_16++;
  259. }
  260. }
  261. }
  262. /* write encoded mute data to bt sram */
  263. static int btcvsd_tx_clean_buffer(struct mtk_btcvsd_snd *bt)
  264. {
  265. unsigned int i;
  266. unsigned int num_valid_addr;
  267. unsigned long flags;
  268. enum BT_SCO_BAND band = bt->band;
  269. /* prepare encoded mute data */
  270. if (band == BT_SCO_NB)
  271. memset(bt->tx->temp_packet_buf, 170, SCO_PACKET_180);
  272. else
  273. memcpy(bt->tx->temp_packet_buf,
  274. table_msbc_silence, SCO_PACKET_180);
  275. /* write mute data to bt tx sram buffer */
  276. spin_lock_irqsave(&bt->tx_lock, flags);
  277. num_valid_addr = bt->tx->buffer_info.num_valid_addr;
  278. dev_info(bt->dev, "%s(), band %d, num_valid_addr %u\n",
  279. __func__, band, num_valid_addr);
  280. for (i = 0; i < num_valid_addr; i++) {
  281. void *dst;
  282. dev_info(bt->dev, "%s(), clean addr 0x%lx\n", __func__,
  283. bt->tx->buffer_info.bt_sram_addr[i]);
  284. dst = (void *)bt->tx->buffer_info.bt_sram_addr[i];
  285. mtk_btcvsd_snd_data_transfer(BT_SCO_DIRECT_ARM2BT,
  286. bt->tx->temp_packet_buf, dst,
  287. bt->tx->buffer_info.packet_length,
  288. bt->tx->buffer_info.packet_num);
  289. }
  290. spin_unlock_irqrestore(&bt->tx_lock, flags);
  291. return 0;
  292. }
  293. static int mtk_btcvsd_read_from_bt(struct mtk_btcvsd_snd *bt,
  294. enum bt_sco_packet_len packet_type,
  295. unsigned int packet_length,
  296. unsigned int packet_num,
  297. unsigned int blk_size,
  298. unsigned int control)
  299. {
  300. unsigned int i;
  301. int pv;
  302. u8 *src;
  303. unsigned int packet_buf_ofs;
  304. unsigned long flags;
  305. unsigned long connsys_addr_rx, ap_addr_rx;
  306. connsys_addr_rx = *bt->bt_reg_pkt_r;
  307. ap_addr_rx = (unsigned long)bt->bt_sram_bank2_base +
  308. (connsys_addr_rx & 0xFFFF);
  309. if (connsys_addr_rx == 0xdeadfeed) {
  310. /* bt return 0xdeadfeed if read register during bt sleep */
  311. dev_warn(bt->dev, "%s(), connsys_addr_rx == 0xdeadfeed",
  312. __func__);
  313. return -EIO;
  314. }
  315. src = (u8 *)ap_addr_rx;
  316. mtk_btcvsd_snd_data_transfer(BT_SCO_DIRECT_BT2ARM, src,
  317. bt->rx->temp_packet_buf, packet_length,
  318. packet_num);
  319. spin_lock_irqsave(&bt->rx_lock, flags);
  320. for (i = 0; i < blk_size; i++) {
  321. packet_buf_ofs = (bt->rx->packet_w & SCO_RX_PACKET_MASK) *
  322. bt->rx->packet_size;
  323. memcpy(bt->rx_packet_buf + packet_buf_ofs,
  324. bt->rx->temp_packet_buf + (SCO_RX_PLC_SIZE * i),
  325. SCO_RX_PLC_SIZE);
  326. if ((control & btsco_packet_valid_mask[packet_type][i]) ==
  327. btsco_packet_valid_mask[packet_type][i])
  328. pv = 1;
  329. else
  330. pv = 0;
  331. packet_buf_ofs += SCO_RX_PLC_SIZE;
  332. memcpy(bt->rx_packet_buf + packet_buf_ofs, (void *)&pv,
  333. SCO_CVSD_PACKET_VALID_SIZE);
  334. bt->rx->packet_w++;
  335. }
  336. spin_unlock_irqrestore(&bt->rx_lock, flags);
  337. return 0;
  338. }
  339. static int mtk_btcvsd_write_to_bt(struct mtk_btcvsd_snd *bt,
  340. enum bt_sco_packet_len packet_type,
  341. unsigned int packet_length,
  342. unsigned int packet_num,
  343. unsigned int blk_size)
  344. {
  345. unsigned int i;
  346. unsigned long flags;
  347. u8 *dst;
  348. unsigned long connsys_addr_tx, ap_addr_tx;
  349. bool new_ap_addr_tx = true;
  350. connsys_addr_tx = *bt->bt_reg_pkt_w;
  351. ap_addr_tx = (unsigned long)bt->bt_sram_bank2_base +
  352. (connsys_addr_tx & 0xFFFF);
  353. if (connsys_addr_tx == 0xdeadfeed) {
  354. /* bt return 0xdeadfeed if read register during bt sleep */
  355. dev_warn(bt->dev, "%s(), connsys_addr_tx == 0xdeadfeed\n",
  356. __func__);
  357. return -EIO;
  358. }
  359. spin_lock_irqsave(&bt->tx_lock, flags);
  360. for (i = 0; i < blk_size; i++) {
  361. memcpy(bt->tx->temp_packet_buf + (bt->tx->packet_size * i),
  362. (bt->tx_packet_buf +
  363. (bt->tx->packet_r % SCO_TX_PACKER_BUF_NUM) *
  364. bt->tx->packet_size),
  365. bt->tx->packet_size);
  366. bt->tx->packet_r++;
  367. }
  368. spin_unlock_irqrestore(&bt->tx_lock, flags);
  369. dst = (u8 *)ap_addr_tx;
  370. if (!bt->tx->mute) {
  371. mtk_btcvsd_snd_data_transfer(BT_SCO_DIRECT_ARM2BT,
  372. bt->tx->temp_packet_buf, dst,
  373. packet_length, packet_num);
  374. }
  375. /* store bt tx buffer sram info */
  376. bt->tx->buffer_info.packet_length = packet_length;
  377. bt->tx->buffer_info.packet_num = packet_num;
  378. for (i = 0; i < bt->tx->buffer_info.num_valid_addr; i++) {
  379. if (bt->tx->buffer_info.bt_sram_addr[i] == ap_addr_tx) {
  380. new_ap_addr_tx = false;
  381. break;
  382. }
  383. }
  384. if (new_ap_addr_tx) {
  385. unsigned int next_idx;
  386. spin_lock_irqsave(&bt->tx_lock, flags);
  387. bt->tx->buffer_info.num_valid_addr++;
  388. next_idx = bt->tx->buffer_info.num_valid_addr - 1;
  389. bt->tx->buffer_info.bt_sram_addr[next_idx] = ap_addr_tx;
  390. spin_unlock_irqrestore(&bt->tx_lock, flags);
  391. dev_info(bt->dev, "%s(), new ap_addr_tx = 0x%lx, num_valid_addr %d\n",
  392. __func__, ap_addr_tx,
  393. bt->tx->buffer_info.num_valid_addr);
  394. }
  395. if (bt->tx->mute)
  396. btcvsd_tx_clean_buffer(bt);
  397. return 0;
  398. }
  399. static irqreturn_t mtk_btcvsd_snd_irq_handler(int irq_id, void *dev)
  400. {
  401. struct mtk_btcvsd_snd *bt = dev;
  402. unsigned int packet_type, packet_num, packet_length;
  403. unsigned int buf_cnt_tx, buf_cnt_rx, control;
  404. if (bt->rx->state != BT_SCO_STATE_RUNNING &&
  405. bt->rx->state != BT_SCO_STATE_ENDING &&
  406. bt->tx->state != BT_SCO_STATE_RUNNING &&
  407. bt->tx->state != BT_SCO_STATE_ENDING &&
  408. bt->tx->state != BT_SCO_STATE_LOOPBACK) {
  409. dev_warn(bt->dev, "%s(), in idle state: rx->state: %d, tx->state: %d\n",
  410. __func__, bt->rx->state, bt->tx->state);
  411. goto irq_handler_exit;
  412. }
  413. control = *bt->bt_reg_ctl;
  414. packet_type = (control >> 18) & 0x7;
  415. if (((control >> 31) & 1) == 0) {
  416. dev_warn(bt->dev, "%s(), ((control >> 31) & 1) == 0, control 0x%x\n",
  417. __func__, control);
  418. goto irq_handler_exit;
  419. }
  420. if (packet_type >= BT_SCO_CVSD_MAX) {
  421. dev_warn(bt->dev, "%s(), invalid packet_type %u, exit\n",
  422. __func__, packet_type);
  423. goto irq_handler_exit;
  424. }
  425. packet_length = btsco_packet_info[packet_type][0];
  426. packet_num = btsco_packet_info[packet_type][1];
  427. buf_cnt_tx = btsco_packet_info[packet_type][2];
  428. buf_cnt_rx = btsco_packet_info[packet_type][3];
  429. if (bt->tx->state == BT_SCO_STATE_LOOPBACK) {
  430. u8 *src, *dst;
  431. unsigned long connsys_addr_rx, ap_addr_rx;
  432. unsigned long connsys_addr_tx, ap_addr_tx;
  433. connsys_addr_rx = *bt->bt_reg_pkt_r;
  434. ap_addr_rx = (unsigned long)bt->bt_sram_bank2_base +
  435. (connsys_addr_rx & 0xFFFF);
  436. connsys_addr_tx = *bt->bt_reg_pkt_w;
  437. ap_addr_tx = (unsigned long)bt->bt_sram_bank2_base +
  438. (connsys_addr_tx & 0xFFFF);
  439. if (connsys_addr_tx == 0xdeadfeed ||
  440. connsys_addr_rx == 0xdeadfeed) {
  441. /* bt return 0xdeadfeed if read reg during bt sleep */
  442. dev_warn(bt->dev, "%s(), connsys_addr_tx == 0xdeadfeed\n",
  443. __func__);
  444. goto irq_handler_exit;
  445. }
  446. src = (u8 *)ap_addr_rx;
  447. dst = (u8 *)ap_addr_tx;
  448. mtk_btcvsd_snd_data_transfer(BT_SCO_DIRECT_BT2ARM, src,
  449. bt->tx->temp_packet_buf,
  450. packet_length,
  451. packet_num);
  452. mtk_btcvsd_snd_data_transfer(BT_SCO_DIRECT_ARM2BT,
  453. bt->tx->temp_packet_buf, dst,
  454. packet_length,
  455. packet_num);
  456. bt->rx->rw_cnt++;
  457. bt->tx->rw_cnt++;
  458. }
  459. if (bt->rx->state == BT_SCO_STATE_RUNNING ||
  460. bt->rx->state == BT_SCO_STATE_ENDING) {
  461. if (bt->rx->xrun) {
  462. if (bt->rx->packet_w - bt->rx->packet_r <=
  463. SCO_RX_PACKER_BUF_NUM - 2 * buf_cnt_rx) {
  464. /*
  465. * free space is larger then
  466. * twice interrupt rx data size
  467. */
  468. bt->rx->xrun = 0;
  469. dev_warn(bt->dev, "%s(), rx->xrun 0!\n",
  470. __func__);
  471. }
  472. }
  473. if (!bt->rx->xrun &&
  474. (bt->rx->packet_w - bt->rx->packet_r <=
  475. SCO_RX_PACKER_BUF_NUM - buf_cnt_rx)) {
  476. mtk_btcvsd_read_from_bt(bt,
  477. packet_type,
  478. packet_length,
  479. packet_num,
  480. buf_cnt_rx,
  481. control);
  482. bt->rx->rw_cnt++;
  483. } else {
  484. bt->rx->xrun = 1;
  485. dev_warn(bt->dev, "%s(), rx->xrun 1\n", __func__);
  486. }
  487. }
  488. /* tx */
  489. bt->tx->timeout = 0;
  490. if ((bt->tx->state == BT_SCO_STATE_RUNNING ||
  491. bt->tx->state == BT_SCO_STATE_ENDING) &&
  492. bt->tx->trigger_start) {
  493. if (bt->tx->xrun) {
  494. /* prepared data is larger then twice
  495. * interrupt tx data size
  496. */
  497. if (bt->tx->packet_w - bt->tx->packet_r >=
  498. 2 * buf_cnt_tx) {
  499. bt->tx->xrun = 0;
  500. dev_warn(bt->dev, "%s(), tx->xrun 0\n",
  501. __func__);
  502. }
  503. }
  504. if ((!bt->tx->xrun &&
  505. (bt->tx->packet_w - bt->tx->packet_r >= buf_cnt_tx)) ||
  506. bt->tx->state == BT_SCO_STATE_ENDING) {
  507. mtk_btcvsd_write_to_bt(bt,
  508. packet_type,
  509. packet_length,
  510. packet_num,
  511. buf_cnt_tx);
  512. bt->tx->rw_cnt++;
  513. } else {
  514. bt->tx->xrun = 1;
  515. dev_warn(bt->dev, "%s(), tx->xrun 1\n", __func__);
  516. }
  517. }
  518. *bt->bt_reg_ctl &= ~BT_CVSD_CLEAR;
  519. if (bt->rx->state == BT_SCO_STATE_RUNNING ||
  520. bt->rx->state == BT_SCO_STATE_ENDING) {
  521. bt->rx->wait_flag = 1;
  522. wake_up_interruptible(&bt->rx_wait);
  523. snd_pcm_period_elapsed(bt->rx->substream);
  524. }
  525. if (bt->tx->state == BT_SCO_STATE_RUNNING ||
  526. bt->tx->state == BT_SCO_STATE_ENDING) {
  527. bt->tx->wait_flag = 1;
  528. wake_up_interruptible(&bt->tx_wait);
  529. snd_pcm_period_elapsed(bt->tx->substream);
  530. }
  531. return IRQ_HANDLED;
  532. irq_handler_exit:
  533. *bt->bt_reg_ctl &= ~BT_CVSD_CLEAR;
  534. return IRQ_HANDLED;
  535. }
  536. static int wait_for_bt_irq(struct mtk_btcvsd_snd *bt,
  537. struct mtk_btcvsd_snd_stream *bt_stream)
  538. {
  539. unsigned long long t1, t2;
  540. /* one interrupt period = 22.5ms */
  541. unsigned long long timeout_limit = 22500000;
  542. int max_timeout_trial = 2;
  543. int ret;
  544. bt_stream->wait_flag = 0;
  545. while (max_timeout_trial && !bt_stream->wait_flag) {
  546. t1 = sched_clock();
  547. if (bt_stream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  548. ret = wait_event_interruptible_timeout(bt->tx_wait,
  549. bt_stream->wait_flag,
  550. nsecs_to_jiffies(timeout_limit));
  551. } else {
  552. ret = wait_event_interruptible_timeout(bt->rx_wait,
  553. bt_stream->wait_flag,
  554. nsecs_to_jiffies(timeout_limit));
  555. }
  556. t2 = sched_clock();
  557. t2 = t2 - t1; /* in ns (10^9) */
  558. if (t2 > timeout_limit) {
  559. dev_warn(bt->dev, "%s(), stream %d, timeout %llu, limit %llu, ret %d, flag %d\n",
  560. __func__, bt_stream->stream,
  561. t2, timeout_limit, ret,
  562. bt_stream->wait_flag);
  563. }
  564. if (ret < 0) {
  565. /*
  566. * error, -ERESTARTSYS if it was interrupted by
  567. * a signal
  568. */
  569. dev_warn(bt->dev, "%s(), stream %d, error, trial left %d\n",
  570. __func__,
  571. bt_stream->stream, max_timeout_trial);
  572. bt_stream->timeout = 1;
  573. return ret;
  574. } else if (ret == 0) {
  575. /* conidtion is false after timeout */
  576. max_timeout_trial--;
  577. dev_warn(bt->dev, "%s(), stream %d, error, timeout, condition is false, trial left %d\n",
  578. __func__,
  579. bt_stream->stream, max_timeout_trial);
  580. if (max_timeout_trial <= 0) {
  581. bt_stream->timeout = 1;
  582. return -ETIME;
  583. }
  584. }
  585. }
  586. return 0;
  587. }
  588. static ssize_t mtk_btcvsd_snd_read(struct mtk_btcvsd_snd *bt,
  589. char __user *buf,
  590. size_t count)
  591. {
  592. ssize_t read_size = 0, read_count = 0, cur_read_idx, cont;
  593. unsigned int cur_buf_ofs = 0;
  594. unsigned long avail;
  595. unsigned long flags;
  596. unsigned int packet_size = bt->rx->packet_size;
  597. while (count) {
  598. spin_lock_irqsave(&bt->rx_lock, flags);
  599. /* available data in RX packet buffer */
  600. avail = (bt->rx->packet_w - bt->rx->packet_r) * packet_size;
  601. cur_read_idx = (bt->rx->packet_r & SCO_RX_PACKET_MASK) *
  602. packet_size;
  603. spin_unlock_irqrestore(&bt->rx_lock, flags);
  604. if (!avail) {
  605. int ret = wait_for_bt_irq(bt, bt->rx);
  606. if (ret)
  607. return read_count;
  608. continue;
  609. }
  610. /* count must be multiple of packet_size */
  611. if (count % packet_size != 0 ||
  612. avail % packet_size != 0) {
  613. dev_warn(bt->dev, "%s(), count %zu or d %lu is not multiple of packet_size %dd\n",
  614. __func__, count, avail, packet_size);
  615. count -= count % packet_size;
  616. avail -= avail % packet_size;
  617. }
  618. if (count > avail)
  619. read_size = avail;
  620. else
  621. read_size = count;
  622. /* calculate continue space */
  623. cont = bt->rx->buf_size - cur_read_idx;
  624. if (read_size > cont)
  625. read_size = cont;
  626. if (copy_to_user(buf + cur_buf_ofs,
  627. bt->rx_packet_buf + cur_read_idx,
  628. read_size)) {
  629. dev_warn(bt->dev, "%s(), copy_to_user fail\n",
  630. __func__);
  631. return -EFAULT;
  632. }
  633. spin_lock_irqsave(&bt->rx_lock, flags);
  634. bt->rx->packet_r += read_size / packet_size;
  635. spin_unlock_irqrestore(&bt->rx_lock, flags);
  636. read_count += read_size;
  637. cur_buf_ofs += read_size;
  638. count -= read_size;
  639. }
  640. /*
  641. * save current timestamp & buffer time in times_tamp and
  642. * buf_data_equivalent_time
  643. */
  644. bt->rx->time_stamp = sched_clock();
  645. bt->rx->buf_data_equivalent_time =
  646. (unsigned long long)(bt->rx->packet_w - bt->rx->packet_r) *
  647. SCO_RX_PLC_SIZE * 16 * 1000 / 2 / 64;
  648. bt->rx->buf_data_equivalent_time += read_count * SCO_RX_PLC_SIZE *
  649. 16 * 1000 / packet_size / 2 / 64;
  650. /* return equivalent time(us) to data count */
  651. bt->rx->buf_data_equivalent_time *= 1000;
  652. return read_count;
  653. }
  654. static ssize_t mtk_btcvsd_snd_write(struct mtk_btcvsd_snd *bt,
  655. char __user *buf,
  656. size_t count)
  657. {
  658. int written_size = count, avail, cur_write_idx, write_size, cont;
  659. unsigned int cur_buf_ofs = 0;
  660. unsigned long flags;
  661. unsigned int packet_size = bt->tx->packet_size;
  662. /*
  663. * save current timestamp & buffer time in time_stamp and
  664. * buf_data_equivalent_time
  665. */
  666. bt->tx->time_stamp = sched_clock();
  667. bt->tx->buf_data_equivalent_time =
  668. (unsigned long long)(bt->tx->packet_w - bt->tx->packet_r) *
  669. packet_size * 16 * 1000 / 2 / 64;
  670. /* return equivalent time(us) to data count */
  671. bt->tx->buf_data_equivalent_time *= 1000;
  672. while (count) {
  673. spin_lock_irqsave(&bt->tx_lock, flags);
  674. /* free space of TX packet buffer */
  675. avail = bt->tx->buf_size -
  676. (bt->tx->packet_w - bt->tx->packet_r) * packet_size;
  677. cur_write_idx = (bt->tx->packet_w % SCO_TX_PACKER_BUF_NUM) *
  678. packet_size;
  679. spin_unlock_irqrestore(&bt->tx_lock, flags);
  680. if (!avail) {
  681. int ret = wait_for_bt_irq(bt, bt->tx);
  682. if (ret)
  683. return written_size;
  684. continue;
  685. }
  686. /* count must be multiple of bt->tx->packet_size */
  687. if (count % packet_size != 0 ||
  688. avail % packet_size != 0) {
  689. dev_warn(bt->dev, "%s(), count %zu or avail %d is not multiple of packet_size %d\n",
  690. __func__, count, avail, packet_size);
  691. count -= count % packet_size;
  692. avail -= avail % packet_size;
  693. }
  694. if (count > avail)
  695. write_size = avail;
  696. else
  697. write_size = count;
  698. /* calculate continue space */
  699. cont = bt->tx->buf_size - cur_write_idx;
  700. if (write_size > cont)
  701. write_size = cont;
  702. if (copy_from_user(bt->tx_packet_buf +
  703. cur_write_idx,
  704. buf + cur_buf_ofs,
  705. write_size)) {
  706. dev_warn(bt->dev, "%s(), copy_from_user fail\n",
  707. __func__);
  708. return -EFAULT;
  709. }
  710. spin_lock_irqsave(&bt->tx_lock, flags);
  711. bt->tx->packet_w += write_size / packet_size;
  712. spin_unlock_irqrestore(&bt->tx_lock, flags);
  713. cur_buf_ofs += write_size;
  714. count -= write_size;
  715. }
  716. return written_size;
  717. }
  718. static struct mtk_btcvsd_snd_stream *get_bt_stream
  719. (struct mtk_btcvsd_snd *bt, struct snd_pcm_substream *substream)
  720. {
  721. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  722. return bt->tx;
  723. else
  724. return bt->rx;
  725. }
  726. /* pcm ops */
  727. static const struct snd_pcm_hardware mtk_btcvsd_hardware = {
  728. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  729. SNDRV_PCM_INFO_RESUME),
  730. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  731. .buffer_bytes_max = 24 * 1024,
  732. .period_bytes_max = 24 * 1024,
  733. .periods_min = 2,
  734. .periods_max = 16,
  735. .fifo_size = 0,
  736. };
  737. static int mtk_pcm_btcvsd_open(struct snd_soc_component *component,
  738. struct snd_pcm_substream *substream)
  739. {
  740. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  741. int ret;
  742. dev_dbg(bt->dev, "%s(), stream %d, substream %p\n",
  743. __func__, substream->stream, substream);
  744. snd_soc_set_runtime_hwparams(substream, &mtk_btcvsd_hardware);
  745. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  746. ret = mtk_btcvsd_snd_tx_init(bt);
  747. bt->tx->substream = substream;
  748. } else {
  749. ret = mtk_btcvsd_snd_rx_init(bt);
  750. bt->rx->substream = substream;
  751. }
  752. return ret;
  753. }
  754. static int mtk_pcm_btcvsd_close(struct snd_soc_component *component,
  755. struct snd_pcm_substream *substream)
  756. {
  757. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  758. struct mtk_btcvsd_snd_stream *bt_stream = get_bt_stream(bt, substream);
  759. dev_dbg(bt->dev, "%s(), stream %d\n", __func__, substream->stream);
  760. mtk_btcvsd_snd_set_state(bt, bt_stream, BT_SCO_STATE_IDLE);
  761. bt_stream->substream = NULL;
  762. return 0;
  763. }
  764. static int mtk_pcm_btcvsd_hw_params(struct snd_soc_component *component,
  765. struct snd_pcm_substream *substream,
  766. struct snd_pcm_hw_params *hw_params)
  767. {
  768. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  769. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  770. params_buffer_bytes(hw_params) % bt->tx->packet_size != 0) {
  771. dev_warn(bt->dev, "%s(), error, buffer size %d not valid\n",
  772. __func__,
  773. params_buffer_bytes(hw_params));
  774. return -EINVAL;
  775. }
  776. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  777. return 0;
  778. }
  779. static int mtk_pcm_btcvsd_hw_free(struct snd_soc_component *component,
  780. struct snd_pcm_substream *substream)
  781. {
  782. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  783. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  784. btcvsd_tx_clean_buffer(bt);
  785. return 0;
  786. }
  787. static int mtk_pcm_btcvsd_prepare(struct snd_soc_component *component,
  788. struct snd_pcm_substream *substream)
  789. {
  790. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  791. struct mtk_btcvsd_snd_stream *bt_stream = get_bt_stream(bt, substream);
  792. dev_dbg(bt->dev, "%s(), stream %d\n", __func__, substream->stream);
  793. mtk_btcvsd_snd_set_state(bt, bt_stream, BT_SCO_STATE_RUNNING);
  794. return 0;
  795. }
  796. static int mtk_pcm_btcvsd_trigger(struct snd_soc_component *component,
  797. struct snd_pcm_substream *substream, int cmd)
  798. {
  799. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  800. struct mtk_btcvsd_snd_stream *bt_stream = get_bt_stream(bt, substream);
  801. int stream = substream->stream;
  802. int hw_packet_ptr;
  803. dev_dbg(bt->dev, "%s(), stream %d, cmd %d\n",
  804. __func__, substream->stream, cmd);
  805. switch (cmd) {
  806. case SNDRV_PCM_TRIGGER_START:
  807. case SNDRV_PCM_TRIGGER_RESUME:
  808. hw_packet_ptr = stream == SNDRV_PCM_STREAM_PLAYBACK ?
  809. bt_stream->packet_r : bt_stream->packet_w;
  810. bt_stream->prev_packet_idx = hw_packet_ptr;
  811. bt_stream->prev_frame = 0;
  812. bt_stream->trigger_start = 1;
  813. return 0;
  814. case SNDRV_PCM_TRIGGER_STOP:
  815. case SNDRV_PCM_TRIGGER_SUSPEND:
  816. bt_stream->trigger_start = 0;
  817. mtk_btcvsd_snd_set_state(bt, bt_stream, BT_SCO_STATE_ENDING);
  818. return 0;
  819. default:
  820. return -EINVAL;
  821. }
  822. }
  823. static snd_pcm_uframes_t mtk_pcm_btcvsd_pointer(
  824. struct snd_soc_component *component,
  825. struct snd_pcm_substream *substream)
  826. {
  827. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  828. struct mtk_btcvsd_snd_stream *bt_stream;
  829. snd_pcm_uframes_t frame = 0;
  830. int byte = 0;
  831. int hw_packet_ptr;
  832. int packet_diff;
  833. spinlock_t *lock; /* spinlock for bt stream control */
  834. unsigned long flags;
  835. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  836. lock = &bt->tx_lock;
  837. bt_stream = bt->tx;
  838. } else {
  839. lock = &bt->rx_lock;
  840. bt_stream = bt->rx;
  841. }
  842. spin_lock_irqsave(lock, flags);
  843. hw_packet_ptr = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  844. bt->tx->packet_r : bt->rx->packet_w;
  845. /* get packet diff from last time */
  846. if (hw_packet_ptr >= bt_stream->prev_packet_idx) {
  847. packet_diff = hw_packet_ptr - bt_stream->prev_packet_idx;
  848. } else {
  849. /* integer overflow */
  850. packet_diff = (INT_MAX - bt_stream->prev_packet_idx) +
  851. (hw_packet_ptr - INT_MIN) + 1;
  852. }
  853. bt_stream->prev_packet_idx = hw_packet_ptr;
  854. /* increased bytes */
  855. byte = packet_diff * bt_stream->packet_size;
  856. frame = btcvsd_bytes_to_frame(substream, byte);
  857. frame += bt_stream->prev_frame;
  858. frame %= substream->runtime->buffer_size;
  859. bt_stream->prev_frame = frame;
  860. spin_unlock_irqrestore(lock, flags);
  861. return frame;
  862. }
  863. static int mtk_pcm_btcvsd_copy(struct snd_soc_component *component,
  864. struct snd_pcm_substream *substream,
  865. int channel, unsigned long pos,
  866. void __user *buf, unsigned long count)
  867. {
  868. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(component);
  869. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  870. return mtk_btcvsd_snd_write(bt, buf, count);
  871. else
  872. return mtk_btcvsd_snd_read(bt, buf, count);
  873. }
  874. /* kcontrol */
  875. static const char *const btsco_band_str[] = {"NB", "WB"};
  876. static const struct soc_enum btcvsd_enum[] = {
  877. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(btsco_band_str), btsco_band_str),
  878. };
  879. static int btcvsd_band_get(struct snd_kcontrol *kcontrol,
  880. struct snd_ctl_elem_value *ucontrol)
  881. {
  882. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  883. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  884. ucontrol->value.integer.value[0] = bt->band;
  885. return 0;
  886. }
  887. static int btcvsd_band_set(struct snd_kcontrol *kcontrol,
  888. struct snd_ctl_elem_value *ucontrol)
  889. {
  890. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  891. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  892. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  893. if (ucontrol->value.enumerated.item[0] >= e->items)
  894. return -EINVAL;
  895. bt->band = ucontrol->value.integer.value[0];
  896. dev_dbg(bt->dev, "%s(), band %d\n", __func__, bt->band);
  897. return 0;
  898. }
  899. static int btcvsd_loopback_get(struct snd_kcontrol *kcontrol,
  900. struct snd_ctl_elem_value *ucontrol)
  901. {
  902. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  903. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  904. bool lpbk_en = bt->tx->state == BT_SCO_STATE_LOOPBACK;
  905. ucontrol->value.integer.value[0] = lpbk_en;
  906. return 0;
  907. }
  908. static int btcvsd_loopback_set(struct snd_kcontrol *kcontrol,
  909. struct snd_ctl_elem_value *ucontrol)
  910. {
  911. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  912. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  913. if (ucontrol->value.integer.value[0]) {
  914. mtk_btcvsd_snd_set_state(bt, bt->tx, BT_SCO_STATE_LOOPBACK);
  915. mtk_btcvsd_snd_set_state(bt, bt->rx, BT_SCO_STATE_LOOPBACK);
  916. } else {
  917. mtk_btcvsd_snd_set_state(bt, bt->tx, BT_SCO_STATE_RUNNING);
  918. mtk_btcvsd_snd_set_state(bt, bt->rx, BT_SCO_STATE_RUNNING);
  919. }
  920. return 0;
  921. }
  922. static int btcvsd_tx_mute_get(struct snd_kcontrol *kcontrol,
  923. struct snd_ctl_elem_value *ucontrol)
  924. {
  925. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  926. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  927. if (!bt->tx) {
  928. ucontrol->value.integer.value[0] = 0;
  929. return 0;
  930. }
  931. ucontrol->value.integer.value[0] = bt->tx->mute;
  932. return 0;
  933. }
  934. static int btcvsd_tx_mute_set(struct snd_kcontrol *kcontrol,
  935. struct snd_ctl_elem_value *ucontrol)
  936. {
  937. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  938. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  939. if (!bt->tx)
  940. return 0;
  941. bt->tx->mute = ucontrol->value.integer.value[0];
  942. return 0;
  943. }
  944. static int btcvsd_rx_irq_received_get(struct snd_kcontrol *kcontrol,
  945. struct snd_ctl_elem_value *ucontrol)
  946. {
  947. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  948. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  949. if (!bt->rx)
  950. return 0;
  951. ucontrol->value.integer.value[0] = bt->rx->rw_cnt ? 1 : 0;
  952. return 0;
  953. }
  954. static int btcvsd_rx_timeout_get(struct snd_kcontrol *kcontrol,
  955. struct snd_ctl_elem_value *ucontrol)
  956. {
  957. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  958. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  959. if (!bt->rx)
  960. return 0;
  961. ucontrol->value.integer.value[0] = bt->rx->timeout;
  962. bt->rx->timeout = 0;
  963. return 0;
  964. }
  965. static int btcvsd_rx_timestamp_get(struct snd_kcontrol *kcontrol,
  966. unsigned int __user *data, unsigned int size)
  967. {
  968. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  969. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  970. int ret = 0;
  971. struct mtk_btcvsd_snd_time_buffer_info time_buffer_info_rx;
  972. if (size > sizeof(struct mtk_btcvsd_snd_time_buffer_info))
  973. return -EINVAL;
  974. get_rx_time_stamp(bt, &time_buffer_info_rx);
  975. dev_dbg(bt->dev, "%s(), time_stamp_us %llu, data_count_equi_time %llu",
  976. __func__,
  977. time_buffer_info_rx.time_stamp_us,
  978. time_buffer_info_rx.data_count_equi_time);
  979. if (copy_to_user(data, &time_buffer_info_rx,
  980. sizeof(struct mtk_btcvsd_snd_time_buffer_info))) {
  981. dev_warn(bt->dev, "%s(), copy_to_user fail", __func__);
  982. ret = -EFAULT;
  983. }
  984. return ret;
  985. }
  986. static int btcvsd_tx_irq_received_get(struct snd_kcontrol *kcontrol,
  987. struct snd_ctl_elem_value *ucontrol)
  988. {
  989. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  990. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  991. if (!bt->tx)
  992. return 0;
  993. ucontrol->value.integer.value[0] = bt->tx->rw_cnt ? 1 : 0;
  994. return 0;
  995. }
  996. static int btcvsd_tx_timeout_get(struct snd_kcontrol *kcontrol,
  997. struct snd_ctl_elem_value *ucontrol)
  998. {
  999. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  1000. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  1001. ucontrol->value.integer.value[0] = bt->tx->timeout;
  1002. return 0;
  1003. }
  1004. static int btcvsd_tx_timestamp_get(struct snd_kcontrol *kcontrol,
  1005. unsigned int __user *data, unsigned int size)
  1006. {
  1007. struct snd_soc_component *cmpnt = snd_soc_kcontrol_component(kcontrol);
  1008. struct mtk_btcvsd_snd *bt = snd_soc_component_get_drvdata(cmpnt);
  1009. int ret = 0;
  1010. struct mtk_btcvsd_snd_time_buffer_info time_buffer_info_tx;
  1011. if (size > sizeof(struct mtk_btcvsd_snd_time_buffer_info))
  1012. return -EINVAL;
  1013. get_tx_time_stamp(bt, &time_buffer_info_tx);
  1014. dev_dbg(bt->dev, "%s(), time_stamp_us %llu, data_count_equi_time %llu",
  1015. __func__,
  1016. time_buffer_info_tx.time_stamp_us,
  1017. time_buffer_info_tx.data_count_equi_time);
  1018. if (copy_to_user(data, &time_buffer_info_tx,
  1019. sizeof(struct mtk_btcvsd_snd_time_buffer_info))) {
  1020. dev_warn(bt->dev, "%s(), copy_to_user fail", __func__);
  1021. ret = -EFAULT;
  1022. }
  1023. return ret;
  1024. }
  1025. static const struct snd_kcontrol_new mtk_btcvsd_snd_controls[] = {
  1026. SOC_ENUM_EXT("BTCVSD Band", btcvsd_enum[0],
  1027. btcvsd_band_get, btcvsd_band_set),
  1028. SOC_SINGLE_BOOL_EXT("BTCVSD Loopback Switch", 0,
  1029. btcvsd_loopback_get, btcvsd_loopback_set),
  1030. SOC_SINGLE_BOOL_EXT("BTCVSD Tx Mute Switch", 0,
  1031. btcvsd_tx_mute_get, btcvsd_tx_mute_set),
  1032. SOC_SINGLE_BOOL_EXT("BTCVSD Tx Irq Received Switch", 0,
  1033. btcvsd_tx_irq_received_get, NULL),
  1034. SOC_SINGLE_BOOL_EXT("BTCVSD Tx Timeout Switch", 0,
  1035. btcvsd_tx_timeout_get, NULL),
  1036. SOC_SINGLE_BOOL_EXT("BTCVSD Rx Irq Received Switch", 0,
  1037. btcvsd_rx_irq_received_get, NULL),
  1038. SOC_SINGLE_BOOL_EXT("BTCVSD Rx Timeout Switch", 0,
  1039. btcvsd_rx_timeout_get, NULL),
  1040. SND_SOC_BYTES_TLV("BTCVSD Rx Timestamp",
  1041. sizeof(struct mtk_btcvsd_snd_time_buffer_info),
  1042. btcvsd_rx_timestamp_get, NULL),
  1043. SND_SOC_BYTES_TLV("BTCVSD Tx Timestamp",
  1044. sizeof(struct mtk_btcvsd_snd_time_buffer_info),
  1045. btcvsd_tx_timestamp_get, NULL),
  1046. };
  1047. static int mtk_btcvsd_snd_component_probe(struct snd_soc_component *component)
  1048. {
  1049. return snd_soc_add_component_controls(component,
  1050. mtk_btcvsd_snd_controls,
  1051. ARRAY_SIZE(mtk_btcvsd_snd_controls));
  1052. }
  1053. static const struct snd_soc_component_driver mtk_btcvsd_snd_platform = {
  1054. .name = BTCVSD_SND_NAME,
  1055. .probe = mtk_btcvsd_snd_component_probe,
  1056. .open = mtk_pcm_btcvsd_open,
  1057. .close = mtk_pcm_btcvsd_close,
  1058. .hw_params = mtk_pcm_btcvsd_hw_params,
  1059. .hw_free = mtk_pcm_btcvsd_hw_free,
  1060. .prepare = mtk_pcm_btcvsd_prepare,
  1061. .trigger = mtk_pcm_btcvsd_trigger,
  1062. .pointer = mtk_pcm_btcvsd_pointer,
  1063. .copy_user = mtk_pcm_btcvsd_copy,
  1064. };
  1065. static int mtk_btcvsd_snd_probe(struct platform_device *pdev)
  1066. {
  1067. int ret;
  1068. int irq_id;
  1069. u32 offset[5] = {0, 0, 0, 0, 0};
  1070. struct mtk_btcvsd_snd *btcvsd;
  1071. struct device *dev = &pdev->dev;
  1072. /* init btcvsd private data */
  1073. btcvsd = devm_kzalloc(dev, sizeof(*btcvsd), GFP_KERNEL);
  1074. if (!btcvsd)
  1075. return -ENOMEM;
  1076. platform_set_drvdata(pdev, btcvsd);
  1077. btcvsd->dev = dev;
  1078. /* init tx/rx */
  1079. btcvsd->rx = devm_kzalloc(btcvsd->dev, sizeof(*btcvsd->rx), GFP_KERNEL);
  1080. if (!btcvsd->rx)
  1081. return -ENOMEM;
  1082. btcvsd->tx = devm_kzalloc(btcvsd->dev, sizeof(*btcvsd->tx), GFP_KERNEL);
  1083. if (!btcvsd->tx)
  1084. return -ENOMEM;
  1085. spin_lock_init(&btcvsd->tx_lock);
  1086. spin_lock_init(&btcvsd->rx_lock);
  1087. init_waitqueue_head(&btcvsd->tx_wait);
  1088. init_waitqueue_head(&btcvsd->rx_wait);
  1089. mtk_btcvsd_snd_tx_init(btcvsd);
  1090. mtk_btcvsd_snd_rx_init(btcvsd);
  1091. /* irq */
  1092. irq_id = platform_get_irq(pdev, 0);
  1093. if (irq_id <= 0)
  1094. return irq_id < 0 ? irq_id : -ENXIO;
  1095. ret = devm_request_irq(dev, irq_id, mtk_btcvsd_snd_irq_handler,
  1096. IRQF_TRIGGER_LOW, "BTCVSD_ISR_Handle",
  1097. (void *)btcvsd);
  1098. if (ret) {
  1099. dev_err(dev, "could not request_irq for BTCVSD_ISR_Handle\n");
  1100. return ret;
  1101. }
  1102. btcvsd->irq_id = irq_id;
  1103. /* iomap */
  1104. btcvsd->bt_pkv_base = of_iomap(dev->of_node, 0);
  1105. if (!btcvsd->bt_pkv_base) {
  1106. dev_err(dev, "iomap bt_pkv_base fail\n");
  1107. return -EIO;
  1108. }
  1109. btcvsd->bt_sram_bank2_base = of_iomap(dev->of_node, 1);
  1110. if (!btcvsd->bt_sram_bank2_base) {
  1111. dev_err(dev, "iomap bt_sram_bank2_base fail\n");
  1112. ret = -EIO;
  1113. goto unmap_pkv_err;
  1114. }
  1115. btcvsd->infra = syscon_regmap_lookup_by_phandle(dev->of_node,
  1116. "mediatek,infracfg");
  1117. if (IS_ERR(btcvsd->infra)) {
  1118. dev_err(dev, "cannot find infra controller: %ld\n",
  1119. PTR_ERR(btcvsd->infra));
  1120. ret = PTR_ERR(btcvsd->infra);
  1121. goto unmap_bank2_err;
  1122. }
  1123. /* get offset */
  1124. ret = of_property_read_u32_array(dev->of_node, "mediatek,offset",
  1125. offset,
  1126. ARRAY_SIZE(offset));
  1127. if (ret) {
  1128. dev_warn(dev, "%s(), get offset fail, ret %d\n", __func__, ret);
  1129. goto unmap_bank2_err;
  1130. }
  1131. btcvsd->infra_misc_offset = offset[0];
  1132. btcvsd->conn_bt_cvsd_mask = offset[1];
  1133. btcvsd->cvsd_mcu_read_offset = offset[2];
  1134. btcvsd->cvsd_mcu_write_offset = offset[3];
  1135. btcvsd->cvsd_packet_indicator = offset[4];
  1136. btcvsd->bt_reg_pkt_r = btcvsd->bt_pkv_base +
  1137. btcvsd->cvsd_mcu_read_offset;
  1138. btcvsd->bt_reg_pkt_w = btcvsd->bt_pkv_base +
  1139. btcvsd->cvsd_mcu_write_offset;
  1140. btcvsd->bt_reg_ctl = btcvsd->bt_pkv_base +
  1141. btcvsd->cvsd_packet_indicator;
  1142. /* init state */
  1143. mtk_btcvsd_snd_set_state(btcvsd, btcvsd->tx, BT_SCO_STATE_IDLE);
  1144. mtk_btcvsd_snd_set_state(btcvsd, btcvsd->rx, BT_SCO_STATE_IDLE);
  1145. ret = devm_snd_soc_register_component(dev, &mtk_btcvsd_snd_platform,
  1146. NULL, 0);
  1147. if (ret)
  1148. goto unmap_bank2_err;
  1149. return 0;
  1150. unmap_bank2_err:
  1151. iounmap(btcvsd->bt_sram_bank2_base);
  1152. unmap_pkv_err:
  1153. iounmap(btcvsd->bt_pkv_base);
  1154. return ret;
  1155. }
  1156. static int mtk_btcvsd_snd_remove(struct platform_device *pdev)
  1157. {
  1158. struct mtk_btcvsd_snd *btcvsd = dev_get_drvdata(&pdev->dev);
  1159. iounmap(btcvsd->bt_pkv_base);
  1160. iounmap(btcvsd->bt_sram_bank2_base);
  1161. return 0;
  1162. }
  1163. static const struct of_device_id mtk_btcvsd_snd_dt_match[] = {
  1164. { .compatible = "mediatek,mtk-btcvsd-snd", },
  1165. {},
  1166. };
  1167. MODULE_DEVICE_TABLE(of, mtk_btcvsd_snd_dt_match);
  1168. static struct platform_driver mtk_btcvsd_snd_driver = {
  1169. .driver = {
  1170. .name = "mtk-btcvsd-snd",
  1171. .of_match_table = mtk_btcvsd_snd_dt_match,
  1172. },
  1173. .probe = mtk_btcvsd_snd_probe,
  1174. .remove = mtk_btcvsd_snd_remove,
  1175. };
  1176. module_platform_driver(mtk_btcvsd_snd_driver);
  1177. MODULE_DESCRIPTION("Mediatek ALSA BT SCO CVSD/MSBC Driver");
  1178. MODULE_AUTHOR("KaiChieh Chuang <[email protected]>");
  1179. MODULE_LICENSE("GPL v2");