soc-acpi-intel-tgl-match.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * soc-acpi-intel-tgl-match.c - tables and support for TGL ACPI enumeration.
  4. *
  5. * Copyright (c) 2019, Intel Corporation.
  6. *
  7. */
  8. #include <sound/soc-acpi.h>
  9. #include <sound/soc-acpi-intel-match.h>
  10. #include "soc-acpi-intel-sdw-mockup-match.h"
  11. static const struct snd_soc_acpi_codecs essx_83x6 = {
  12. .num_codecs = 3,
  13. .codecs = { "ESSX8316", "ESSX8326", "ESSX8336"},
  14. };
  15. static const struct snd_soc_acpi_codecs tgl_codecs = {
  16. .num_codecs = 1,
  17. .codecs = {"MX98357A"}
  18. };
  19. static const struct snd_soc_acpi_endpoint single_endpoint = {
  20. .num = 0,
  21. .aggregated = 0,
  22. .group_position = 0,
  23. .group_id = 0,
  24. };
  25. static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
  26. .num = 0,
  27. .aggregated = 1,
  28. .group_position = 0,
  29. .group_id = 1,
  30. };
  31. static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
  32. .num = 0,
  33. .aggregated = 1,
  34. .group_position = 1,
  35. .group_id = 1,
  36. };
  37. static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
  38. {
  39. .adr = 0x000020025D071100ull,
  40. .num_endpoints = 1,
  41. .endpoints = &single_endpoint,
  42. .name_prefix = "rt711"
  43. }
  44. };
  45. static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
  46. {
  47. .adr = 0x000120025D071100ull,
  48. .num_endpoints = 1,
  49. .endpoints = &single_endpoint,
  50. .name_prefix = "rt711"
  51. }
  52. };
  53. static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
  54. {
  55. .adr = 0x000120025D130800ull,
  56. .num_endpoints = 1,
  57. .endpoints = &spk_l_endpoint,
  58. .name_prefix = "rt1308-1"
  59. },
  60. {
  61. .adr = 0x000122025D130800ull,
  62. .num_endpoints = 1,
  63. .endpoints = &spk_r_endpoint,
  64. .name_prefix = "rt1308-2"
  65. }
  66. };
  67. static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
  68. {
  69. .adr = 0x000120025D130800ull,
  70. .num_endpoints = 1,
  71. .endpoints = &single_endpoint,
  72. .name_prefix = "rt1308-1"
  73. }
  74. };
  75. static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
  76. {
  77. .adr = 0x000220025D130800ull,
  78. .num_endpoints = 1,
  79. .endpoints = &single_endpoint,
  80. .name_prefix = "rt1308-1"
  81. }
  82. };
  83. static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
  84. {
  85. .adr = 0x000120025D130800ull,
  86. .num_endpoints = 1,
  87. .endpoints = &spk_l_endpoint,
  88. .name_prefix = "rt1308-1"
  89. }
  90. };
  91. static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
  92. {
  93. .adr = 0x000220025D130800ull,
  94. .num_endpoints = 1,
  95. .endpoints = &spk_r_endpoint,
  96. .name_prefix = "rt1308-2"
  97. }
  98. };
  99. static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
  100. {
  101. .adr = 0x000021025D071500ull,
  102. .num_endpoints = 1,
  103. .endpoints = &single_endpoint,
  104. .name_prefix = "rt715"
  105. }
  106. };
  107. static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
  108. {
  109. .adr = 0x000320025D071500ull,
  110. .num_endpoints = 1,
  111. .endpoints = &single_endpoint,
  112. .name_prefix = "rt715"
  113. }
  114. };
  115. static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
  116. {
  117. .adr = 0x000123019F837300ull,
  118. .num_endpoints = 1,
  119. .endpoints = &spk_r_endpoint,
  120. .name_prefix = "Right"
  121. },
  122. {
  123. .adr = 0x000127019F837300ull,
  124. .num_endpoints = 1,
  125. .endpoints = &spk_l_endpoint,
  126. .name_prefix = "Left"
  127. }
  128. };
  129. static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
  130. {
  131. .adr = 0x000021025D568200ull,
  132. .num_endpoints = 1,
  133. .endpoints = &single_endpoint,
  134. .name_prefix = "rt5682"
  135. }
  136. };
  137. static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
  138. {
  139. .adr = 0x000030025D071101ull,
  140. .num_endpoints = 1,
  141. .endpoints = &single_endpoint,
  142. .name_prefix = "rt711"
  143. }
  144. };
  145. static const struct snd_soc_acpi_adr_device rt1316_1_single_adr[] = {
  146. {
  147. .adr = 0x000131025D131601ull,
  148. .num_endpoints = 1,
  149. .endpoints = &single_endpoint,
  150. .name_prefix = "rt1316-1"
  151. }
  152. };
  153. static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
  154. {
  155. .adr = 0x000131025D131601ull, /* unique ID is set for some reason */
  156. .num_endpoints = 1,
  157. .endpoints = &spk_l_endpoint,
  158. .name_prefix = "rt1316-1"
  159. }
  160. };
  161. static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
  162. {
  163. .adr = 0x000230025D131601ull,
  164. .num_endpoints = 1,
  165. .endpoints = &spk_r_endpoint,
  166. .name_prefix = "rt1316-2"
  167. }
  168. };
  169. static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
  170. {
  171. .adr = 0x000330025D071401ull,
  172. .num_endpoints = 1,
  173. .endpoints = &single_endpoint,
  174. .name_prefix = "rt714"
  175. }
  176. };
  177. static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
  178. {
  179. .mask = BIT(0),
  180. .num_adr = ARRAY_SIZE(rt711_0_adr),
  181. .adr_d = rt711_0_adr,
  182. },
  183. {
  184. .mask = BIT(1),
  185. .num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
  186. .adr_d = rt1308_1_dual_adr,
  187. },
  188. {}
  189. };
  190. static const struct snd_soc_acpi_link_adr tgl_rvp_headset_only[] = {
  191. {
  192. .mask = BIT(0),
  193. .num_adr = ARRAY_SIZE(rt711_0_adr),
  194. .adr_d = rt711_0_adr,
  195. },
  196. {}
  197. };
  198. static const struct snd_soc_acpi_link_adr tgl_hp[] = {
  199. {
  200. .mask = BIT(0),
  201. .num_adr = ARRAY_SIZE(rt711_0_adr),
  202. .adr_d = rt711_0_adr,
  203. },
  204. {
  205. .mask = BIT(1),
  206. .num_adr = ARRAY_SIZE(rt1308_1_single_adr),
  207. .adr_d = rt1308_1_single_adr,
  208. },
  209. {}
  210. };
  211. static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
  212. {
  213. .mask = BIT(0),
  214. .num_adr = ARRAY_SIZE(rt5682_0_adr),
  215. .adr_d = rt5682_0_adr,
  216. },
  217. {
  218. .mask = BIT(1),
  219. .num_adr = ARRAY_SIZE(mx8373_1_adr),
  220. .adr_d = mx8373_1_adr,
  221. },
  222. {}
  223. };
  224. static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
  225. {
  226. .mask = BIT(0),
  227. .num_adr = ARRAY_SIZE(rt711_0_adr),
  228. .adr_d = rt711_0_adr,
  229. },
  230. {
  231. .mask = BIT(1),
  232. .num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
  233. .adr_d = rt1308_1_group1_adr,
  234. },
  235. {
  236. .mask = BIT(2),
  237. .num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
  238. .adr_d = rt1308_2_group1_adr,
  239. },
  240. {
  241. .mask = BIT(3),
  242. .num_adr = ARRAY_SIZE(rt715_3_adr),
  243. .adr_d = rt715_3_adr,
  244. },
  245. {}
  246. };
  247. static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
  248. {
  249. .mask = BIT(0),
  250. .num_adr = ARRAY_SIZE(rt711_0_adr),
  251. .adr_d = rt711_0_adr,
  252. },
  253. {
  254. .mask = BIT(1),
  255. .num_adr = ARRAY_SIZE(rt1308_1_single_adr),
  256. .adr_d = rt1308_1_single_adr,
  257. },
  258. {
  259. .mask = BIT(3),
  260. .num_adr = ARRAY_SIZE(rt715_3_adr),
  261. .adr_d = rt715_3_adr,
  262. },
  263. {}
  264. };
  265. static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
  266. {
  267. .mask = BIT(1),
  268. .num_adr = ARRAY_SIZE(rt711_1_adr),
  269. .adr_d = rt711_1_adr,
  270. },
  271. {
  272. .mask = BIT(2),
  273. .num_adr = ARRAY_SIZE(rt1308_2_single_adr),
  274. .adr_d = rt1308_2_single_adr,
  275. },
  276. {
  277. .mask = BIT(0),
  278. .num_adr = ARRAY_SIZE(rt715_0_adr),
  279. .adr_d = rt715_0_adr,
  280. },
  281. {}
  282. };
  283. static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
  284. {
  285. .mask = BIT(0),
  286. .num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
  287. .adr_d = rt711_sdca_0_adr,
  288. },
  289. {
  290. .mask = BIT(1),
  291. .num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
  292. .adr_d = rt1316_1_group1_adr,
  293. },
  294. {
  295. .mask = BIT(2),
  296. .num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
  297. .adr_d = rt1316_2_group1_adr,
  298. },
  299. {
  300. .mask = BIT(3),
  301. .num_adr = ARRAY_SIZE(rt714_3_adr),
  302. .adr_d = rt714_3_adr,
  303. },
  304. {}
  305. };
  306. static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca_mono[] = {
  307. {
  308. .mask = BIT(0),
  309. .num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
  310. .adr_d = rt711_sdca_0_adr,
  311. },
  312. {
  313. .mask = BIT(1),
  314. .num_adr = ARRAY_SIZE(rt1316_1_single_adr),
  315. .adr_d = rt1316_1_single_adr,
  316. },
  317. {
  318. .mask = BIT(3),
  319. .num_adr = ARRAY_SIZE(rt714_3_adr),
  320. .adr_d = rt714_3_adr,
  321. },
  322. {}
  323. };
  324. static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
  325. .num_codecs = 1,
  326. .codecs = {"MX98373"}
  327. };
  328. static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
  329. .num_codecs = 1,
  330. .codecs = {"10EC1011"}
  331. };
  332. static const struct snd_soc_acpi_codecs tgl_rt5682_rt5682s_hp = {
  333. .num_codecs = 2,
  334. .codecs = {"10EC5682", "RTL5682"},
  335. };
  336. static const struct snd_soc_acpi_codecs tgl_lt6911_hdmi = {
  337. .num_codecs = 1,
  338. .codecs = {"INTC10B0"}
  339. };
  340. struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
  341. {
  342. .comp_ids = &tgl_rt5682_rt5682s_hp,
  343. .drv_name = "tgl_mx98357_rt5682",
  344. .machine_quirk = snd_soc_acpi_codec_list,
  345. .quirk_data = &tgl_codecs,
  346. .sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
  347. },
  348. {
  349. .comp_ids = &tgl_rt5682_rt5682s_hp,
  350. .drv_name = "tgl_mx98373_rt5682",
  351. .machine_quirk = snd_soc_acpi_codec_list,
  352. .quirk_data = &tgl_max98373_amp,
  353. .sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
  354. },
  355. {
  356. .comp_ids = &tgl_rt5682_rt5682s_hp,
  357. .drv_name = "tgl_rt1011_rt5682",
  358. .machine_quirk = snd_soc_acpi_codec_list,
  359. .quirk_data = &tgl_rt1011_amp,
  360. .sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
  361. },
  362. {
  363. .comp_ids = &essx_83x6,
  364. .drv_name = "sof-essx8336",
  365. .sof_tplg_filename = "sof-tgl-es8336", /* the tplg suffix is added at run time */
  366. .tplg_quirk_mask = SND_SOC_ACPI_TPLG_INTEL_SSP_NUMBER |
  367. SND_SOC_ACPI_TPLG_INTEL_SSP_MSB |
  368. SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER,
  369. },
  370. {
  371. .id = "10EC1308",
  372. .drv_name = "tgl_rt1308_hdmi_ssp",
  373. .machine_quirk = snd_soc_acpi_codec_list,
  374. .quirk_data = &tgl_lt6911_hdmi,
  375. .sof_tplg_filename = "sof-tgl-rt1308-ssp2-hdmi-ssp15.tplg"
  376. },
  377. {},
  378. };
  379. EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
  380. /* this table is used when there is no I2S codec present */
  381. struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
  382. /* mockup tests need to be first */
  383. {
  384. .link_mask = GENMASK(3, 0),
  385. .links = sdw_mockup_headset_2amps_mic,
  386. .drv_name = "sof_sdw",
  387. .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
  388. },
  389. {
  390. .link_mask = BIT(0) | BIT(1) | BIT(3),
  391. .links = sdw_mockup_headset_1amp_mic,
  392. .drv_name = "sof_sdw",
  393. .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
  394. },
  395. {
  396. .link_mask = BIT(0) | BIT(1) | BIT(2),
  397. .links = sdw_mockup_mic_headset_1amp,
  398. .drv_name = "sof_sdw",
  399. .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
  400. },
  401. {
  402. .link_mask = 0x7,
  403. .links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
  404. .drv_name = "sof_sdw",
  405. .sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
  406. },
  407. {
  408. .link_mask = 0xF, /* 4 active links required */
  409. .links = tgl_3_in_1_default,
  410. .drv_name = "sof_sdw",
  411. .sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
  412. },
  413. {
  414. /*
  415. * link_mask should be 0xB, but all links are enabled by BIOS.
  416. * This entry will be selected if there is no rt1308 exposed
  417. * on link2 since it will fail to match the above entry.
  418. */
  419. .link_mask = 0xF,
  420. .links = tgl_3_in_1_mono_amp,
  421. .drv_name = "sof_sdw",
  422. .sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
  423. },
  424. {
  425. .link_mask = 0xF, /* 4 active links required */
  426. .links = tgl_3_in_1_sdca,
  427. .drv_name = "sof_sdw",
  428. .sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
  429. },
  430. {
  431. /*
  432. * link_mask should be 0xB, but all links are enabled by BIOS.
  433. * This entry will be selected if there is no rt1316 amplifier exposed
  434. * on link2 since it will fail to match the above entry.
  435. */
  436. .link_mask = 0xF, /* 4 active links required */
  437. .links = tgl_3_in_1_sdca_mono,
  438. .drv_name = "sof_sdw",
  439. .sof_tplg_filename = "sof-tgl-rt711-l0-rt1316-l1-mono-rt714-l3.tplg",
  440. },
  441. {
  442. .link_mask = 0x3, /* rt711 on link 0 and 1 rt1308 on link 1 */
  443. .links = tgl_hp,
  444. .drv_name = "sof_sdw",
  445. .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
  446. },
  447. {
  448. .link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
  449. .links = tgl_rvp,
  450. .drv_name = "sof_sdw",
  451. .sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
  452. },
  453. {
  454. .link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
  455. .links = tgl_chromebook_base,
  456. .drv_name = "sof_sdw",
  457. .sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
  458. },
  459. {
  460. .link_mask = 0x1, /* rt711 on link 0 */
  461. .links = tgl_rvp_headset_only,
  462. .drv_name = "sof_sdw",
  463. .sof_tplg_filename = "sof-tgl-rt711.tplg",
  464. },
  465. {},
  466. };
  467. EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);