loader.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. //
  3. // Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
  4. //
  5. // Authors: Cezary Rojewski <[email protected]>
  6. // Amadeusz Slawinski <[email protected]>
  7. //
  8. #include <linux/firmware.h>
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include <sound/hdaudio.h>
  12. #include <sound/hdaudio_ext.h>
  13. #include "avs.h"
  14. #include "cldma.h"
  15. #include "messages.h"
  16. #include "registers.h"
  17. #include "topology.h"
  18. #define AVS_ROM_STS_MASK 0xFF
  19. #define AVS_ROM_INIT_DONE 0x1
  20. #define SKL_ROM_BASEFW_ENTERED 0xF
  21. #define APL_ROM_FW_ENTERED 0x5
  22. #define AVS_ROM_INIT_POLLING_US 5
  23. #define SKL_ROM_INIT_TIMEOUT_US 1000000
  24. #define APL_ROM_INIT_TIMEOUT_US 300000
  25. #define APL_ROM_INIT_RETRIES 3
  26. #define AVS_FW_INIT_POLLING_US 500
  27. #define AVS_FW_INIT_TIMEOUT_MS 3000
  28. #define AVS_FW_INIT_TIMEOUT_US (AVS_FW_INIT_TIMEOUT_MS * 1000)
  29. #define AVS_CLDMA_START_DELAY_MS 100
  30. #define AVS_ROOT_DIR "intel/avs"
  31. #define AVS_BASEFW_FILENAME "dsp_basefw.bin"
  32. #define AVS_EXT_MANIFEST_MAGIC 0x31454124
  33. #define SKL_MANIFEST_MAGIC 0x00000006
  34. #define SKL_ADSPFW_OFFSET 0x284
  35. #define APL_MANIFEST_MAGIC 0x44504324
  36. #define APL_ADSPFW_OFFSET 0x2000
  37. /* Occasionally, engineering (release candidate) firmware is provided for testing. */
  38. static bool debug_ignore_fw_version;
  39. module_param_named(ignore_fw_version, debug_ignore_fw_version, bool, 0444);
  40. MODULE_PARM_DESC(ignore_fw_version, "Verify FW version 0=yes (default), 1=no");
  41. #define AVS_LIB_NAME_SIZE 8
  42. struct avs_fw_manifest {
  43. u32 id;
  44. u32 len;
  45. char name[AVS_LIB_NAME_SIZE];
  46. u32 preload_page_count;
  47. u32 img_flags;
  48. u32 feature_mask;
  49. struct avs_fw_version version;
  50. } __packed;
  51. struct avs_fw_ext_manifest {
  52. u32 id;
  53. u32 len;
  54. u16 version_major;
  55. u16 version_minor;
  56. u32 entries;
  57. } __packed;
  58. static int avs_fw_ext_manifest_strip(struct firmware *fw)
  59. {
  60. struct avs_fw_ext_manifest *man;
  61. if (fw->size < sizeof(*man))
  62. return -EINVAL;
  63. man = (struct avs_fw_ext_manifest *)fw->data;
  64. if (man->id == AVS_EXT_MANIFEST_MAGIC) {
  65. fw->data += man->len;
  66. fw->size -= man->len;
  67. }
  68. return 0;
  69. }
  70. static int avs_fw_manifest_offset(struct firmware *fw)
  71. {
  72. /* Header type found in first DWORD of fw binary. */
  73. u32 magic = *(u32 *)fw->data;
  74. switch (magic) {
  75. case SKL_MANIFEST_MAGIC:
  76. return SKL_ADSPFW_OFFSET;
  77. case APL_MANIFEST_MAGIC:
  78. return APL_ADSPFW_OFFSET;
  79. default:
  80. return -EINVAL;
  81. }
  82. }
  83. static int avs_fw_manifest_strip_verify(struct avs_dev *adev, struct firmware *fw,
  84. const struct avs_fw_version *min)
  85. {
  86. struct avs_fw_manifest *man;
  87. int offset, ret;
  88. ret = avs_fw_ext_manifest_strip(fw);
  89. if (ret)
  90. return ret;
  91. offset = avs_fw_manifest_offset(fw);
  92. if (offset < 0)
  93. return offset;
  94. if (fw->size < offset + sizeof(*man))
  95. return -EINVAL;
  96. if (!min)
  97. return 0;
  98. man = (struct avs_fw_manifest *)(fw->data + offset);
  99. if (man->version.major != min->major ||
  100. man->version.minor != min->minor ||
  101. man->version.hotfix != min->hotfix ||
  102. man->version.build < min->build) {
  103. dev_warn(adev->dev, "bad FW version %d.%d.%d.%d, expected %d.%d.%d.%d or newer\n",
  104. man->version.major, man->version.minor,
  105. man->version.hotfix, man->version.build,
  106. min->major, min->minor, min->hotfix, min->build);
  107. if (!debug_ignore_fw_version)
  108. return -EINVAL;
  109. }
  110. return 0;
  111. }
  112. int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw)
  113. {
  114. struct hda_cldma *cl = &code_loader;
  115. unsigned int reg;
  116. int ret;
  117. ret = avs_dsp_op(adev, power, AVS_MAIN_CORE_MASK, true);
  118. if (ret < 0)
  119. return ret;
  120. ret = avs_dsp_op(adev, reset, AVS_MAIN_CORE_MASK, false);
  121. if (ret < 0)
  122. return ret;
  123. ret = hda_cldma_reset(cl);
  124. if (ret < 0) {
  125. dev_err(adev->dev, "cldma reset failed: %d\n", ret);
  126. return ret;
  127. }
  128. hda_cldma_setup(cl);
  129. ret = avs_dsp_op(adev, stall, AVS_MAIN_CORE_MASK, false);
  130. if (ret < 0)
  131. return ret;
  132. reinit_completion(&adev->fw_ready);
  133. avs_dsp_op(adev, int_control, true);
  134. /* await ROM init */
  135. ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg,
  136. (reg & AVS_ROM_INIT_DONE) == AVS_ROM_INIT_DONE,
  137. AVS_ROM_INIT_POLLING_US, SKL_ROM_INIT_TIMEOUT_US);
  138. if (ret < 0) {
  139. dev_err(adev->dev, "rom init timeout: %d\n", ret);
  140. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  141. return ret;
  142. }
  143. hda_cldma_set_data(cl, (void *)fw->data, fw->size);
  144. /* transfer firmware */
  145. hda_cldma_transfer(cl, 0);
  146. ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg,
  147. (reg & AVS_ROM_STS_MASK) == SKL_ROM_BASEFW_ENTERED,
  148. AVS_FW_INIT_POLLING_US, AVS_FW_INIT_TIMEOUT_US);
  149. hda_cldma_stop(cl);
  150. if (ret < 0) {
  151. dev_err(adev->dev, "transfer fw failed: %d\n", ret);
  152. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  153. return ret;
  154. }
  155. return 0;
  156. }
  157. int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id)
  158. {
  159. struct hda_cldma *cl = &code_loader;
  160. int ret;
  161. hda_cldma_set_data(cl, (void *)lib->data, lib->size);
  162. /* transfer modules manifest */
  163. hda_cldma_transfer(cl, msecs_to_jiffies(AVS_CLDMA_START_DELAY_MS));
  164. /* DMA id ignored as there is only ever one code-loader DMA */
  165. ret = avs_ipc_load_library(adev, 0, id);
  166. hda_cldma_stop(cl);
  167. if (ret) {
  168. ret = AVS_IPC_RET(ret);
  169. dev_err(adev->dev, "transfer lib %d failed: %d\n", id, ret);
  170. }
  171. return ret;
  172. }
  173. static int avs_cldma_load_module(struct avs_dev *adev, struct avs_module_entry *mentry)
  174. {
  175. struct hda_cldma *cl = &code_loader;
  176. const struct firmware *mod;
  177. char *mod_name;
  178. int ret;
  179. mod_name = kasprintf(GFP_KERNEL, "%s/%s/dsp_mod_%pUL.bin", AVS_ROOT_DIR,
  180. adev->spec->name, mentry->uuid.b);
  181. if (!mod_name)
  182. return -ENOMEM;
  183. ret = avs_request_firmware(adev, &mod, mod_name);
  184. kfree(mod_name);
  185. if (ret < 0)
  186. return ret;
  187. hda_cldma_set_data(cl, (void *)mod->data, mod->size);
  188. hda_cldma_transfer(cl, msecs_to_jiffies(AVS_CLDMA_START_DELAY_MS));
  189. ret = avs_ipc_load_modules(adev, &mentry->module_id, 1);
  190. hda_cldma_stop(cl);
  191. if (ret) {
  192. dev_err(adev->dev, "load module %d failed: %d\n", mentry->module_id, ret);
  193. avs_release_last_firmware(adev);
  194. return AVS_IPC_RET(ret);
  195. }
  196. return 0;
  197. }
  198. int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,
  199. struct avs_module_entry *mods, u32 num_mods)
  200. {
  201. u16 *mod_ids;
  202. int ret, i;
  203. /* Either load to DSP or unload them to free space. */
  204. if (load) {
  205. for (i = 0; i < num_mods; i++) {
  206. ret = avs_cldma_load_module(adev, &mods[i]);
  207. if (ret)
  208. return ret;
  209. }
  210. return 0;
  211. }
  212. mod_ids = kcalloc(num_mods, sizeof(u16), GFP_KERNEL);
  213. if (!mod_ids)
  214. return -ENOMEM;
  215. for (i = 0; i < num_mods; i++)
  216. mod_ids[i] = mods[i].module_id;
  217. ret = avs_ipc_unload_modules(adev, mod_ids, num_mods);
  218. kfree(mod_ids);
  219. if (ret)
  220. return AVS_IPC_RET(ret);
  221. return 0;
  222. }
  223. static int
  224. avs_hda_init_rom(struct avs_dev *adev, unsigned int dma_id, bool purge)
  225. {
  226. const struct avs_spec *const spec = adev->spec;
  227. unsigned int corex_mask, reg;
  228. int ret;
  229. corex_mask = spec->core_init_mask & ~AVS_MAIN_CORE_MASK;
  230. ret = avs_dsp_op(adev, power, spec->core_init_mask, true);
  231. if (ret < 0)
  232. goto err;
  233. ret = avs_dsp_op(adev, reset, AVS_MAIN_CORE_MASK, false);
  234. if (ret < 0)
  235. goto err;
  236. reinit_completion(&adev->fw_ready);
  237. avs_dsp_op(adev, int_control, true);
  238. /* set boot config */
  239. ret = avs_ipc_set_boot_config(adev, dma_id, purge);
  240. if (ret) {
  241. ret = AVS_IPC_RET(ret);
  242. goto err;
  243. }
  244. /* await ROM init */
  245. ret = snd_hdac_adsp_readq_poll(adev, spec->rom_status, reg,
  246. (reg & 0xF) == AVS_ROM_INIT_DONE ||
  247. (reg & 0xF) == APL_ROM_FW_ENTERED,
  248. AVS_ROM_INIT_POLLING_US, APL_ROM_INIT_TIMEOUT_US);
  249. if (ret < 0) {
  250. dev_err(adev->dev, "rom init timeout: %d\n", ret);
  251. goto err;
  252. }
  253. /* power down non-main cores */
  254. if (corex_mask) {
  255. ret = avs_dsp_op(adev, power, corex_mask, false);
  256. if (ret < 0)
  257. goto err;
  258. }
  259. return 0;
  260. err:
  261. avs_dsp_core_disable(adev, spec->core_init_mask);
  262. return ret;
  263. }
  264. static int avs_imr_load_basefw(struct avs_dev *adev)
  265. {
  266. int ret;
  267. /* DMA id ignored when flashing from IMR as no transfer occurs. */
  268. ret = avs_hda_init_rom(adev, 0, false);
  269. if (ret < 0) {
  270. dev_err(adev->dev, "rom init failed: %d\n", ret);
  271. return ret;
  272. }
  273. ret = wait_for_completion_timeout(&adev->fw_ready,
  274. msecs_to_jiffies(AVS_FW_INIT_TIMEOUT_MS));
  275. if (!ret) {
  276. dev_err(adev->dev, "firmware ready timeout\n");
  277. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  278. return -ETIMEDOUT;
  279. }
  280. return 0;
  281. }
  282. int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw)
  283. {
  284. struct snd_pcm_substream substream;
  285. struct snd_dma_buffer dmab;
  286. struct hdac_ext_stream *estream;
  287. struct hdac_stream *hstream;
  288. struct hdac_bus *bus = &adev->base.core;
  289. unsigned int sdfmt, reg;
  290. int ret, i;
  291. /* configure hda dma */
  292. memset(&substream, 0, sizeof(substream));
  293. substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
  294. estream = snd_hdac_ext_stream_assign(bus, &substream,
  295. HDAC_EXT_STREAM_TYPE_HOST);
  296. if (!estream)
  297. return -ENODEV;
  298. hstream = hdac_stream(estream);
  299. /* code loading performed with default format */
  300. sdfmt = snd_hdac_calc_stream_format(48000, 1, SNDRV_PCM_FORMAT_S32_LE, 32, 0);
  301. ret = snd_hdac_dsp_prepare(hstream, sdfmt, fw->size, &dmab);
  302. if (ret < 0)
  303. goto release_stream;
  304. /* enable SPIB for hda stream */
  305. snd_hdac_ext_stream_spbcap_enable(bus, true, hstream->index);
  306. ret = snd_hdac_ext_stream_set_spib(bus, estream, fw->size);
  307. if (ret)
  308. goto cleanup_resources;
  309. memcpy(dmab.area, fw->data, fw->size);
  310. for (i = 0; i < APL_ROM_INIT_RETRIES; i++) {
  311. unsigned int dma_id = hstream->stream_tag - 1;
  312. ret = avs_hda_init_rom(adev, dma_id, true);
  313. if (!ret)
  314. break;
  315. dev_info(adev->dev, "#%d rom init fail: %d\n", i + 1, ret);
  316. }
  317. if (ret < 0)
  318. goto cleanup_resources;
  319. /* transfer firmware */
  320. snd_hdac_dsp_trigger(hstream, true);
  321. ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg,
  322. (reg & AVS_ROM_STS_MASK) == APL_ROM_FW_ENTERED,
  323. AVS_FW_INIT_POLLING_US, AVS_FW_INIT_TIMEOUT_US);
  324. snd_hdac_dsp_trigger(hstream, false);
  325. if (ret < 0) {
  326. dev_err(adev->dev, "transfer fw failed: %d\n", ret);
  327. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  328. }
  329. cleanup_resources:
  330. /* disable SPIB for hda stream */
  331. snd_hdac_ext_stream_spbcap_enable(bus, false, hstream->index);
  332. snd_hdac_ext_stream_set_spib(bus, estream, 0);
  333. snd_hdac_dsp_cleanup(hstream, &dmab);
  334. release_stream:
  335. snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
  336. return ret;
  337. }
  338. int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id)
  339. {
  340. struct snd_pcm_substream substream;
  341. struct snd_dma_buffer dmab;
  342. struct hdac_ext_stream *estream;
  343. struct hdac_stream *stream;
  344. struct hdac_bus *bus = &adev->base.core;
  345. unsigned int sdfmt;
  346. int ret;
  347. /* configure hda dma */
  348. memset(&substream, 0, sizeof(substream));
  349. substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
  350. estream = snd_hdac_ext_stream_assign(bus, &substream,
  351. HDAC_EXT_STREAM_TYPE_HOST);
  352. if (!estream)
  353. return -ENODEV;
  354. stream = hdac_stream(estream);
  355. /* code loading performed with default format */
  356. sdfmt = snd_hdac_calc_stream_format(48000, 1, SNDRV_PCM_FORMAT_S32_LE, 32, 0);
  357. ret = snd_hdac_dsp_prepare(stream, sdfmt, lib->size, &dmab);
  358. if (ret < 0)
  359. goto release_stream;
  360. /* enable SPIB for hda stream */
  361. snd_hdac_ext_stream_spbcap_enable(bus, true, stream->index);
  362. snd_hdac_ext_stream_set_spib(bus, estream, lib->size);
  363. memcpy(dmab.area, lib->data, lib->size);
  364. /* transfer firmware */
  365. snd_hdac_dsp_trigger(stream, true);
  366. ret = avs_ipc_load_library(adev, stream->stream_tag - 1, id);
  367. snd_hdac_dsp_trigger(stream, false);
  368. if (ret) {
  369. dev_err(adev->dev, "transfer lib %d failed: %d\n", id, ret);
  370. ret = AVS_IPC_RET(ret);
  371. }
  372. /* disable SPIB for hda stream */
  373. snd_hdac_ext_stream_spbcap_enable(bus, false, stream->index);
  374. snd_hdac_ext_stream_set_spib(bus, estream, 0);
  375. snd_hdac_dsp_cleanup(stream, &dmab);
  376. release_stream:
  377. snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
  378. return ret;
  379. }
  380. int avs_hda_transfer_modules(struct avs_dev *adev, bool load,
  381. struct avs_module_entry *mods, u32 num_mods)
  382. {
  383. /*
  384. * All platforms without CLDMA are equipped with IMR,
  385. * and thus the module transferring is offloaded to DSP.
  386. */
  387. return 0;
  388. }
  389. int avs_dsp_load_libraries(struct avs_dev *adev, struct avs_tplg_library *libs, u32 num_libs)
  390. {
  391. int start, id, i = 0;
  392. int ret;
  393. /* Calculate the id to assign for the next lib. */
  394. for (id = 0; id < adev->fw_cfg.max_libs_count; id++)
  395. if (adev->lib_names[id][0] == '\0')
  396. break;
  397. if (id + num_libs >= adev->fw_cfg.max_libs_count)
  398. return -EINVAL;
  399. start = id;
  400. while (i < num_libs) {
  401. struct avs_fw_manifest *man;
  402. const struct firmware *fw;
  403. struct firmware stripped_fw;
  404. char *filename;
  405. int j;
  406. filename = kasprintf(GFP_KERNEL, "%s/%s/%s", AVS_ROOT_DIR, adev->spec->name,
  407. libs[i].name);
  408. if (!filename)
  409. return -ENOMEM;
  410. /*
  411. * If any call after this one fails, requested firmware is not released with
  412. * avs_release_last_firmware() as failing to load code results in need for reload
  413. * of entire driver module. And then avs_release_firmwares() is in place already.
  414. */
  415. ret = avs_request_firmware(adev, &fw, filename);
  416. kfree(filename);
  417. if (ret < 0)
  418. return ret;
  419. stripped_fw = *fw;
  420. ret = avs_fw_manifest_strip_verify(adev, &stripped_fw, NULL);
  421. if (ret) {
  422. dev_err(adev->dev, "invalid library data: %d\n", ret);
  423. return ret;
  424. }
  425. ret = avs_fw_manifest_offset(&stripped_fw);
  426. if (ret < 0)
  427. return ret;
  428. man = (struct avs_fw_manifest *)(stripped_fw.data + ret);
  429. /* Don't load anything that's already in DSP memory. */
  430. for (j = 0; j < id; j++)
  431. if (!strncmp(adev->lib_names[j], man->name, AVS_LIB_NAME_SIZE))
  432. goto next_lib;
  433. ret = avs_dsp_op(adev, load_lib, &stripped_fw, id);
  434. if (ret)
  435. return ret;
  436. strncpy(adev->lib_names[id], man->name, AVS_LIB_NAME_SIZE);
  437. id++;
  438. next_lib:
  439. i++;
  440. }
  441. return start == id ? 1 : 0;
  442. }
  443. static int avs_dsp_load_basefw(struct avs_dev *adev)
  444. {
  445. const struct avs_fw_version *min_req;
  446. const struct avs_spec *const spec = adev->spec;
  447. const struct firmware *fw;
  448. struct firmware stripped_fw;
  449. char *filename;
  450. int ret;
  451. filename = kasprintf(GFP_KERNEL, "%s/%s/%s", AVS_ROOT_DIR, spec->name, AVS_BASEFW_FILENAME);
  452. if (!filename)
  453. return -ENOMEM;
  454. ret = avs_request_firmware(adev, &fw, filename);
  455. kfree(filename);
  456. if (ret < 0) {
  457. dev_err(adev->dev, "request firmware failed: %d\n", ret);
  458. return ret;
  459. }
  460. stripped_fw = *fw;
  461. min_req = &adev->spec->min_fw_version;
  462. ret = avs_fw_manifest_strip_verify(adev, &stripped_fw, min_req);
  463. if (ret < 0) {
  464. dev_err(adev->dev, "invalid firmware data: %d\n", ret);
  465. goto release_fw;
  466. }
  467. ret = avs_dsp_op(adev, load_basefw, &stripped_fw);
  468. if (ret < 0) {
  469. dev_err(adev->dev, "basefw load failed: %d\n", ret);
  470. goto release_fw;
  471. }
  472. ret = wait_for_completion_timeout(&adev->fw_ready,
  473. msecs_to_jiffies(AVS_FW_INIT_TIMEOUT_MS));
  474. if (!ret) {
  475. dev_err(adev->dev, "firmware ready timeout\n");
  476. avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK);
  477. ret = -ETIMEDOUT;
  478. goto release_fw;
  479. }
  480. return 0;
  481. release_fw:
  482. avs_release_last_firmware(adev);
  483. return ret;
  484. }
  485. int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge)
  486. {
  487. struct avs_soc_component *acomp;
  488. int ret, i;
  489. /* Forgo full boot if flash from IMR succeeds. */
  490. if (!purge && avs_platattr_test(adev, IMR)) {
  491. ret = avs_imr_load_basefw(adev);
  492. if (!ret)
  493. return 0;
  494. dev_dbg(adev->dev, "firmware flash from imr failed: %d\n", ret);
  495. }
  496. /* Full boot, clear cached data except for basefw (slot 0). */
  497. for (i = 1; i < adev->fw_cfg.max_libs_count; i++)
  498. memset(adev->lib_names[i], 0, AVS_LIB_NAME_SIZE);
  499. avs_hda_clock_gating_enable(adev, false);
  500. avs_hda_l1sen_enable(adev, false);
  501. ret = avs_dsp_load_basefw(adev);
  502. if (ret)
  503. goto reenable_gating;
  504. mutex_lock(&adev->comp_list_mutex);
  505. list_for_each_entry(acomp, &adev->comp_list, node) {
  506. struct avs_tplg *tplg = acomp->tplg;
  507. ret = avs_dsp_load_libraries(adev, tplg->libs, tplg->num_libs);
  508. if (ret < 0)
  509. break;
  510. }
  511. mutex_unlock(&adev->comp_list_mutex);
  512. reenable_gating:
  513. avs_hda_l1sen_enable(adev, true);
  514. avs_hda_clock_gating_enable(adev, true);
  515. if (ret < 0)
  516. return ret;
  517. /* With all code loaded, refresh module information. */
  518. ret = avs_module_info_init(adev, true);
  519. if (ret) {
  520. dev_err(adev->dev, "init module info failed: %d\n", ret);
  521. return ret;
  522. }
  523. return 0;
  524. }
  525. int avs_dsp_first_boot_firmware(struct avs_dev *adev)
  526. {
  527. int ret, i;
  528. if (avs_platattr_test(adev, CLDMA)) {
  529. ret = hda_cldma_init(&code_loader, &adev->base.core,
  530. adev->dsp_ba, AVS_CL_DEFAULT_BUFFER_SIZE);
  531. if (ret < 0) {
  532. dev_err(adev->dev, "cldma init failed: %d\n", ret);
  533. return ret;
  534. }
  535. }
  536. ret = avs_dsp_boot_firmware(adev, true);
  537. if (ret < 0) {
  538. dev_err(adev->dev, "firmware boot failed: %d\n", ret);
  539. return ret;
  540. }
  541. ret = avs_ipc_get_hw_config(adev, &adev->hw_cfg);
  542. if (ret) {
  543. dev_err(adev->dev, "get hw cfg failed: %d\n", ret);
  544. return AVS_IPC_RET(ret);
  545. }
  546. ret = avs_ipc_get_fw_config(adev, &adev->fw_cfg);
  547. if (ret) {
  548. dev_err(adev->dev, "get fw cfg failed: %d\n", ret);
  549. return AVS_IPC_RET(ret);
  550. }
  551. adev->core_refs = devm_kcalloc(adev->dev, adev->hw_cfg.dsp_cores,
  552. sizeof(*adev->core_refs), GFP_KERNEL);
  553. adev->lib_names = devm_kcalloc(adev->dev, adev->fw_cfg.max_libs_count,
  554. sizeof(*adev->lib_names), GFP_KERNEL);
  555. if (!adev->core_refs || !adev->lib_names)
  556. return -ENOMEM;
  557. for (i = 0; i < adev->fw_cfg.max_libs_count; i++) {
  558. adev->lib_names[i] = devm_kzalloc(adev->dev, AVS_LIB_NAME_SIZE, GFP_KERNEL);
  559. if (!adev->lib_names[i])
  560. return -ENOMEM;
  561. }
  562. /* basefw always occupies slot 0 */
  563. strcpy(&adev->lib_names[0][0], "BASEFW");
  564. ida_init(&adev->ppl_ida);
  565. return 0;
  566. }