imx-pcm-rpmsg.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. // Copyright 2017-2021 NXP
  3. #include <linux/dma-mapping.h>
  4. #include <linux/slab.h>
  5. #include <linux/module.h>
  6. #include <linux/delay.h>
  7. #include <linux/rpmsg.h>
  8. #include <sound/core.h>
  9. #include <sound/pcm.h>
  10. #include <sound/pcm_params.h>
  11. #include <sound/dmaengine_pcm.h>
  12. #include <sound/soc.h>
  13. #include "imx-pcm.h"
  14. #include "fsl_rpmsg.h"
  15. #include "imx-pcm-rpmsg.h"
  16. static struct snd_pcm_hardware imx_rpmsg_pcm_hardware = {
  17. .info = SNDRV_PCM_INFO_INTERLEAVED |
  18. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  19. SNDRV_PCM_INFO_BATCH |
  20. SNDRV_PCM_INFO_MMAP |
  21. SNDRV_PCM_INFO_MMAP_VALID |
  22. SNDRV_PCM_INFO_NO_PERIOD_WAKEUP |
  23. SNDRV_PCM_INFO_PAUSE |
  24. SNDRV_PCM_INFO_RESUME,
  25. .buffer_bytes_max = IMX_DEFAULT_DMABUF_SIZE,
  26. .period_bytes_min = 512,
  27. .period_bytes_max = 65536,
  28. .periods_min = 2,
  29. .periods_max = 6000,
  30. .fifo_size = 0,
  31. };
  32. static int imx_rpmsg_pcm_send_message(struct rpmsg_msg *msg,
  33. struct rpmsg_info *info)
  34. {
  35. struct rpmsg_device *rpdev = info->rpdev;
  36. int ret = 0;
  37. mutex_lock(&info->msg_lock);
  38. if (!rpdev) {
  39. dev_err(info->dev, "rpmsg channel not ready\n");
  40. mutex_unlock(&info->msg_lock);
  41. return -EINVAL;
  42. }
  43. dev_dbg(&rpdev->dev, "send cmd %d\n", msg->s_msg.header.cmd);
  44. if (!(msg->s_msg.header.type == MSG_TYPE_C))
  45. reinit_completion(&info->cmd_complete);
  46. ret = rpmsg_send(rpdev->ept, (void *)&msg->s_msg,
  47. sizeof(struct rpmsg_s_msg));
  48. if (ret) {
  49. dev_err(&rpdev->dev, "rpmsg_send failed: %d\n", ret);
  50. mutex_unlock(&info->msg_lock);
  51. return ret;
  52. }
  53. /* No receive msg for TYPE_C command */
  54. if (msg->s_msg.header.type == MSG_TYPE_C) {
  55. mutex_unlock(&info->msg_lock);
  56. return 0;
  57. }
  58. /* wait response from rpmsg */
  59. ret = wait_for_completion_timeout(&info->cmd_complete,
  60. msecs_to_jiffies(RPMSG_TIMEOUT));
  61. if (!ret) {
  62. dev_err(&rpdev->dev, "rpmsg_send cmd %d timeout!\n",
  63. msg->s_msg.header.cmd);
  64. mutex_unlock(&info->msg_lock);
  65. return -ETIMEDOUT;
  66. }
  67. memcpy(&msg->r_msg, &info->r_msg, sizeof(struct rpmsg_r_msg));
  68. memcpy(&info->msg[msg->r_msg.header.cmd].r_msg,
  69. &msg->r_msg, sizeof(struct rpmsg_r_msg));
  70. /*
  71. * Reset the buffer pointer to be zero, actully we have
  72. * set the buffer pointer to be zero in imx_rpmsg_terminate_all
  73. * But if there is timer task queued in queue, after it is
  74. * executed the buffer pointer will be changed, so need to
  75. * reset it again with TERMINATE command.
  76. */
  77. switch (msg->s_msg.header.cmd) {
  78. case TX_TERMINATE:
  79. info->msg[TX_POINTER].r_msg.param.buffer_offset = 0;
  80. break;
  81. case RX_TERMINATE:
  82. info->msg[RX_POINTER].r_msg.param.buffer_offset = 0;
  83. break;
  84. default:
  85. break;
  86. }
  87. dev_dbg(&rpdev->dev, "cmd:%d, resp %d\n", msg->s_msg.header.cmd,
  88. info->r_msg.param.resp);
  89. mutex_unlock(&info->msg_lock);
  90. return 0;
  91. }
  92. static int imx_rpmsg_insert_workqueue(struct snd_pcm_substream *substream,
  93. struct rpmsg_msg *msg,
  94. struct rpmsg_info *info)
  95. {
  96. unsigned long flags;
  97. int ret = 0;
  98. /*
  99. * Queue the work to workqueue.
  100. * If the queue is full, drop the message.
  101. */
  102. spin_lock_irqsave(&info->wq_lock, flags);
  103. if (info->work_write_index != info->work_read_index) {
  104. int index = info->work_write_index;
  105. memcpy(&info->work_list[index].msg, msg,
  106. sizeof(struct rpmsg_s_msg));
  107. queue_work(info->rpmsg_wq, &info->work_list[index].work);
  108. info->work_write_index++;
  109. info->work_write_index %= WORK_MAX_NUM;
  110. } else {
  111. info->msg_drop_count[substream->stream]++;
  112. ret = -EPIPE;
  113. }
  114. spin_unlock_irqrestore(&info->wq_lock, flags);
  115. return ret;
  116. }
  117. static int imx_rpmsg_pcm_hw_params(struct snd_soc_component *component,
  118. struct snd_pcm_substream *substream,
  119. struct snd_pcm_hw_params *params)
  120. {
  121. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  122. struct rpmsg_msg *msg;
  123. int ret = 0;
  124. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  125. msg = &info->msg[TX_HW_PARAM];
  126. msg->s_msg.header.cmd = TX_HW_PARAM;
  127. } else {
  128. msg = &info->msg[RX_HW_PARAM];
  129. msg->s_msg.header.cmd = RX_HW_PARAM;
  130. }
  131. msg->s_msg.param.rate = params_rate(params);
  132. switch (params_format(params)) {
  133. case SNDRV_PCM_FORMAT_S16_LE:
  134. msg->s_msg.param.format = RPMSG_S16_LE;
  135. break;
  136. case SNDRV_PCM_FORMAT_S24_LE:
  137. msg->s_msg.param.format = RPMSG_S24_LE;
  138. break;
  139. case SNDRV_PCM_FORMAT_DSD_U16_LE:
  140. msg->s_msg.param.format = RPMSG_DSD_U16_LE;
  141. break;
  142. case SNDRV_PCM_FORMAT_DSD_U32_LE:
  143. msg->s_msg.param.format = RPMSG_DSD_U32_LE;
  144. break;
  145. default:
  146. msg->s_msg.param.format = RPMSG_S32_LE;
  147. break;
  148. }
  149. switch (params_channels(params)) {
  150. case 1:
  151. msg->s_msg.param.channels = RPMSG_CH_LEFT;
  152. break;
  153. case 2:
  154. msg->s_msg.param.channels = RPMSG_CH_STEREO;
  155. break;
  156. default:
  157. ret = -EINVAL;
  158. break;
  159. }
  160. info->send_message(msg, info);
  161. return ret;
  162. }
  163. static snd_pcm_uframes_t imx_rpmsg_pcm_pointer(struct snd_soc_component *component,
  164. struct snd_pcm_substream *substream)
  165. {
  166. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  167. struct rpmsg_msg *msg;
  168. unsigned int pos = 0;
  169. int buffer_tail = 0;
  170. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  171. msg = &info->msg[TX_PERIOD_DONE + MSG_TYPE_A_NUM];
  172. else
  173. msg = &info->msg[RX_PERIOD_DONE + MSG_TYPE_A_NUM];
  174. buffer_tail = msg->r_msg.param.buffer_tail;
  175. pos = buffer_tail * snd_pcm_lib_period_bytes(substream);
  176. return bytes_to_frames(substream->runtime, pos);
  177. }
  178. static void imx_rpmsg_timer_callback(struct timer_list *t)
  179. {
  180. struct stream_timer *stream_timer =
  181. from_timer(stream_timer, t, timer);
  182. struct snd_pcm_substream *substream = stream_timer->substream;
  183. struct rpmsg_info *info = stream_timer->info;
  184. struct rpmsg_msg *msg;
  185. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  186. msg = &info->msg[TX_PERIOD_DONE + MSG_TYPE_A_NUM];
  187. msg->s_msg.header.cmd = TX_PERIOD_DONE;
  188. } else {
  189. msg = &info->msg[RX_PERIOD_DONE + MSG_TYPE_A_NUM];
  190. msg->s_msg.header.cmd = RX_PERIOD_DONE;
  191. }
  192. imx_rpmsg_insert_workqueue(substream, msg, info);
  193. }
  194. static int imx_rpmsg_pcm_open(struct snd_soc_component *component,
  195. struct snd_pcm_substream *substream)
  196. {
  197. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  198. struct rpmsg_msg *msg;
  199. int ret = 0;
  200. int cmd;
  201. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  202. msg = &info->msg[TX_OPEN];
  203. msg->s_msg.header.cmd = TX_OPEN;
  204. /* reinitialize buffer counter*/
  205. cmd = TX_PERIOD_DONE + MSG_TYPE_A_NUM;
  206. info->msg[cmd].s_msg.param.buffer_tail = 0;
  207. info->msg[cmd].r_msg.param.buffer_tail = 0;
  208. info->msg[TX_POINTER].r_msg.param.buffer_offset = 0;
  209. } else {
  210. msg = &info->msg[RX_OPEN];
  211. msg->s_msg.header.cmd = RX_OPEN;
  212. /* reinitialize buffer counter*/
  213. cmd = RX_PERIOD_DONE + MSG_TYPE_A_NUM;
  214. info->msg[cmd].s_msg.param.buffer_tail = 0;
  215. info->msg[cmd].r_msg.param.buffer_tail = 0;
  216. info->msg[RX_POINTER].r_msg.param.buffer_offset = 0;
  217. }
  218. info->send_message(msg, info);
  219. imx_rpmsg_pcm_hardware.period_bytes_max =
  220. imx_rpmsg_pcm_hardware.buffer_bytes_max / 2;
  221. snd_soc_set_runtime_hwparams(substream, &imx_rpmsg_pcm_hardware);
  222. ret = snd_pcm_hw_constraint_integer(substream->runtime,
  223. SNDRV_PCM_HW_PARAM_PERIODS);
  224. if (ret < 0)
  225. return ret;
  226. info->msg_drop_count[substream->stream] = 0;
  227. /* Create timer*/
  228. info->stream_timer[substream->stream].info = info;
  229. info->stream_timer[substream->stream].substream = substream;
  230. timer_setup(&info->stream_timer[substream->stream].timer,
  231. imx_rpmsg_timer_callback, 0);
  232. return ret;
  233. }
  234. static int imx_rpmsg_pcm_close(struct snd_soc_component *component,
  235. struct snd_pcm_substream *substream)
  236. {
  237. struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
  238. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  239. struct rpmsg_msg *msg;
  240. int ret = 0;
  241. /* Flush work in workqueue to make TX_CLOSE is the last message */
  242. flush_workqueue(info->rpmsg_wq);
  243. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  244. msg = &info->msg[TX_CLOSE];
  245. msg->s_msg.header.cmd = TX_CLOSE;
  246. } else {
  247. msg = &info->msg[RX_CLOSE];
  248. msg->s_msg.header.cmd = RX_CLOSE;
  249. }
  250. info->send_message(msg, info);
  251. del_timer(&info->stream_timer[substream->stream].timer);
  252. rtd->dai_link->ignore_suspend = 0;
  253. if (info->msg_drop_count[substream->stream])
  254. dev_warn(rtd->dev, "Msg is dropped!, number is %d\n",
  255. info->msg_drop_count[substream->stream]);
  256. return ret;
  257. }
  258. static int imx_rpmsg_pcm_prepare(struct snd_soc_component *component,
  259. struct snd_pcm_substream *substream)
  260. {
  261. struct snd_pcm_runtime *runtime = substream->runtime;
  262. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  263. struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  264. struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev);
  265. /*
  266. * NON-MMAP mode, NONBLOCK, Version 2, enable lpa in dts
  267. * four conditions to determine the lpa is enabled.
  268. */
  269. if ((runtime->access == SNDRV_PCM_ACCESS_RW_INTERLEAVED ||
  270. runtime->access == SNDRV_PCM_ACCESS_RW_NONINTERLEAVED) &&
  271. rpmsg->enable_lpa) {
  272. /*
  273. * Ignore suspend operation in low power mode
  274. * M core will continue playback music on A core suspend.
  275. */
  276. rtd->dai_link->ignore_suspend = 1;
  277. rpmsg->force_lpa = 1;
  278. } else {
  279. rpmsg->force_lpa = 0;
  280. }
  281. return 0;
  282. }
  283. static void imx_rpmsg_pcm_dma_complete(void *arg)
  284. {
  285. struct snd_pcm_substream *substream = arg;
  286. snd_pcm_period_elapsed(substream);
  287. }
  288. static int imx_rpmsg_prepare_and_submit(struct snd_soc_component *component,
  289. struct snd_pcm_substream *substream)
  290. {
  291. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  292. struct rpmsg_msg *msg;
  293. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  294. msg = &info->msg[TX_BUFFER];
  295. msg->s_msg.header.cmd = TX_BUFFER;
  296. } else {
  297. msg = &info->msg[RX_BUFFER];
  298. msg->s_msg.header.cmd = RX_BUFFER;
  299. }
  300. /* Send buffer address and buffer size */
  301. msg->s_msg.param.buffer_addr = substream->runtime->dma_addr;
  302. msg->s_msg.param.buffer_size = snd_pcm_lib_buffer_bytes(substream);
  303. msg->s_msg.param.period_size = snd_pcm_lib_period_bytes(substream);
  304. msg->s_msg.param.buffer_tail = 0;
  305. info->num_period[substream->stream] = msg->s_msg.param.buffer_size /
  306. msg->s_msg.param.period_size;
  307. info->callback[substream->stream] = imx_rpmsg_pcm_dma_complete;
  308. info->callback_param[substream->stream] = substream;
  309. return imx_rpmsg_insert_workqueue(substream, msg, info);
  310. }
  311. static int imx_rpmsg_async_issue_pending(struct snd_soc_component *component,
  312. struct snd_pcm_substream *substream)
  313. {
  314. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  315. struct rpmsg_msg *msg;
  316. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  317. msg = &info->msg[TX_START];
  318. msg->s_msg.header.cmd = TX_START;
  319. } else {
  320. msg = &info->msg[RX_START];
  321. msg->s_msg.header.cmd = RX_START;
  322. }
  323. return imx_rpmsg_insert_workqueue(substream, msg, info);
  324. }
  325. static int imx_rpmsg_restart(struct snd_soc_component *component,
  326. struct snd_pcm_substream *substream)
  327. {
  328. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  329. struct rpmsg_msg *msg;
  330. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  331. msg = &info->msg[TX_RESTART];
  332. msg->s_msg.header.cmd = TX_RESTART;
  333. } else {
  334. msg = &info->msg[RX_RESTART];
  335. msg->s_msg.header.cmd = RX_RESTART;
  336. }
  337. return imx_rpmsg_insert_workqueue(substream, msg, info);
  338. }
  339. static int imx_rpmsg_pause(struct snd_soc_component *component,
  340. struct snd_pcm_substream *substream)
  341. {
  342. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  343. struct rpmsg_msg *msg;
  344. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  345. msg = &info->msg[TX_PAUSE];
  346. msg->s_msg.header.cmd = TX_PAUSE;
  347. } else {
  348. msg = &info->msg[RX_PAUSE];
  349. msg->s_msg.header.cmd = RX_PAUSE;
  350. }
  351. return imx_rpmsg_insert_workqueue(substream, msg, info);
  352. }
  353. static int imx_rpmsg_terminate_all(struct snd_soc_component *component,
  354. struct snd_pcm_substream *substream)
  355. {
  356. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  357. struct rpmsg_msg *msg;
  358. int cmd;
  359. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  360. msg = &info->msg[TX_TERMINATE];
  361. msg->s_msg.header.cmd = TX_TERMINATE;
  362. /* Clear buffer count*/
  363. cmd = TX_PERIOD_DONE + MSG_TYPE_A_NUM;
  364. info->msg[cmd].s_msg.param.buffer_tail = 0;
  365. info->msg[cmd].r_msg.param.buffer_tail = 0;
  366. info->msg[TX_POINTER].r_msg.param.buffer_offset = 0;
  367. } else {
  368. msg = &info->msg[RX_TERMINATE];
  369. msg->s_msg.header.cmd = RX_TERMINATE;
  370. /* Clear buffer count*/
  371. cmd = RX_PERIOD_DONE + MSG_TYPE_A_NUM;
  372. info->msg[cmd].s_msg.param.buffer_tail = 0;
  373. info->msg[cmd].r_msg.param.buffer_tail = 0;
  374. info->msg[RX_POINTER].r_msg.param.buffer_offset = 0;
  375. }
  376. del_timer(&info->stream_timer[substream->stream].timer);
  377. return imx_rpmsg_insert_workqueue(substream, msg, info);
  378. }
  379. static int imx_rpmsg_pcm_trigger(struct snd_soc_component *component,
  380. struct snd_pcm_substream *substream, int cmd)
  381. {
  382. struct snd_pcm_runtime *runtime = substream->runtime;
  383. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  384. struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  385. struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev);
  386. int ret = 0;
  387. switch (cmd) {
  388. case SNDRV_PCM_TRIGGER_START:
  389. ret = imx_rpmsg_prepare_and_submit(component, substream);
  390. if (ret)
  391. return ret;
  392. ret = imx_rpmsg_async_issue_pending(component, substream);
  393. break;
  394. case SNDRV_PCM_TRIGGER_RESUME:
  395. if (rpmsg->force_lpa)
  396. break;
  397. fallthrough;
  398. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  399. ret = imx_rpmsg_restart(component, substream);
  400. break;
  401. case SNDRV_PCM_TRIGGER_SUSPEND:
  402. if (!rpmsg->force_lpa) {
  403. if (runtime->info & SNDRV_PCM_INFO_PAUSE)
  404. ret = imx_rpmsg_pause(component, substream);
  405. else
  406. ret = imx_rpmsg_terminate_all(component, substream);
  407. }
  408. break;
  409. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  410. ret = imx_rpmsg_pause(component, substream);
  411. break;
  412. case SNDRV_PCM_TRIGGER_STOP:
  413. ret = imx_rpmsg_terminate_all(component, substream);
  414. break;
  415. default:
  416. return -EINVAL;
  417. }
  418. if (ret)
  419. return ret;
  420. return 0;
  421. }
  422. /*
  423. * imx_rpmsg_pcm_ack
  424. *
  425. * Send the period index to M core through rpmsg, but not send
  426. * all the period index to M core, reduce some unnessesary msg
  427. * to reduce the pressure of rpmsg bandwidth.
  428. */
  429. static int imx_rpmsg_pcm_ack(struct snd_soc_component *component,
  430. struct snd_pcm_substream *substream)
  431. {
  432. struct snd_pcm_runtime *runtime = substream->runtime;
  433. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  434. struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  435. struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev);
  436. struct rpmsg_info *info = dev_get_drvdata(component->dev);
  437. snd_pcm_uframes_t period_size = runtime->period_size;
  438. snd_pcm_sframes_t avail;
  439. struct timer_list *timer;
  440. struct rpmsg_msg *msg;
  441. unsigned long flags;
  442. int buffer_tail = 0;
  443. int written_num;
  444. if (!rpmsg->force_lpa)
  445. return 0;
  446. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  447. msg = &info->msg[TX_PERIOD_DONE + MSG_TYPE_A_NUM];
  448. msg->s_msg.header.cmd = TX_PERIOD_DONE;
  449. } else {
  450. msg = &info->msg[RX_PERIOD_DONE + MSG_TYPE_A_NUM];
  451. msg->s_msg.header.cmd = RX_PERIOD_DONE;
  452. }
  453. msg->s_msg.header.type = MSG_TYPE_C;
  454. buffer_tail = (frames_to_bytes(runtime, runtime->control->appl_ptr) %
  455. snd_pcm_lib_buffer_bytes(substream));
  456. buffer_tail = buffer_tail / snd_pcm_lib_period_bytes(substream);
  457. /* There is update for period index */
  458. if (buffer_tail != msg->s_msg.param.buffer_tail) {
  459. written_num = buffer_tail - msg->s_msg.param.buffer_tail;
  460. if (written_num < 0)
  461. written_num += runtime->periods;
  462. msg->s_msg.param.buffer_tail = buffer_tail;
  463. /* The notification message is updated to latest */
  464. spin_lock_irqsave(&info->lock[substream->stream], flags);
  465. memcpy(&info->notify[substream->stream], msg,
  466. sizeof(struct rpmsg_s_msg));
  467. info->notify_updated[substream->stream] = true;
  468. spin_unlock_irqrestore(&info->lock[substream->stream], flags);
  469. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  470. avail = snd_pcm_playback_hw_avail(runtime);
  471. else
  472. avail = snd_pcm_capture_hw_avail(runtime);
  473. timer = &info->stream_timer[substream->stream].timer;
  474. /*
  475. * If the data in the buffer is less than one period before
  476. * this fill, which means the data may not enough on M
  477. * core side, we need to send message immediately to let
  478. * M core know the pointer is updated.
  479. * if there is more than one period data in the buffer before
  480. * this fill, which means the data is enough on M core side,
  481. * we can delay one period (using timer) to send the message
  482. * for reduce the message number in workqueue, because the
  483. * pointer may be updated by ack function later, we can
  484. * send latest pointer to M core side.
  485. */
  486. if ((avail - written_num * period_size) <= period_size) {
  487. imx_rpmsg_insert_workqueue(substream, msg, info);
  488. } else if (rpmsg->force_lpa && !timer_pending(timer)) {
  489. int time_msec;
  490. time_msec = (int)(runtime->period_size * 1000 / runtime->rate);
  491. mod_timer(timer, jiffies + msecs_to_jiffies(time_msec));
  492. }
  493. }
  494. return 0;
  495. }
  496. static int imx_rpmsg_pcm_new(struct snd_soc_component *component,
  497. struct snd_soc_pcm_runtime *rtd)
  498. {
  499. struct snd_card *card = rtd->card->snd_card;
  500. struct snd_pcm *pcm = rtd->pcm;
  501. struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
  502. struct fsl_rpmsg *rpmsg = dev_get_drvdata(cpu_dai->dev);
  503. int ret;
  504. ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
  505. if (ret)
  506. return ret;
  507. imx_rpmsg_pcm_hardware.buffer_bytes_max = rpmsg->buffer_size;
  508. return snd_pcm_set_fixed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_WC,
  509. pcm->card->dev, rpmsg->buffer_size);
  510. }
  511. static const struct snd_soc_component_driver imx_rpmsg_soc_component = {
  512. .name = IMX_PCM_DRV_NAME,
  513. .pcm_construct = imx_rpmsg_pcm_new,
  514. .open = imx_rpmsg_pcm_open,
  515. .close = imx_rpmsg_pcm_close,
  516. .hw_params = imx_rpmsg_pcm_hw_params,
  517. .trigger = imx_rpmsg_pcm_trigger,
  518. .pointer = imx_rpmsg_pcm_pointer,
  519. .ack = imx_rpmsg_pcm_ack,
  520. .prepare = imx_rpmsg_pcm_prepare,
  521. };
  522. static void imx_rpmsg_pcm_work(struct work_struct *work)
  523. {
  524. struct work_of_rpmsg *work_of_rpmsg;
  525. bool is_notification = false;
  526. struct rpmsg_info *info;
  527. struct rpmsg_msg msg;
  528. unsigned long flags;
  529. work_of_rpmsg = container_of(work, struct work_of_rpmsg, work);
  530. info = work_of_rpmsg->info;
  531. /*
  532. * Every work in the work queue, first we check if there
  533. * is update for period is filled, because there may be not
  534. * enough data in M core side, need to let M core know
  535. * data is updated immediately.
  536. */
  537. spin_lock_irqsave(&info->lock[TX], flags);
  538. if (info->notify_updated[TX]) {
  539. memcpy(&msg, &info->notify[TX], sizeof(struct rpmsg_s_msg));
  540. info->notify_updated[TX] = false;
  541. spin_unlock_irqrestore(&info->lock[TX], flags);
  542. info->send_message(&msg, info);
  543. } else {
  544. spin_unlock_irqrestore(&info->lock[TX], flags);
  545. }
  546. spin_lock_irqsave(&info->lock[RX], flags);
  547. if (info->notify_updated[RX]) {
  548. memcpy(&msg, &info->notify[RX], sizeof(struct rpmsg_s_msg));
  549. info->notify_updated[RX] = false;
  550. spin_unlock_irqrestore(&info->lock[RX], flags);
  551. info->send_message(&msg, info);
  552. } else {
  553. spin_unlock_irqrestore(&info->lock[RX], flags);
  554. }
  555. /* Skip the notification message for it has been processed above */
  556. if (work_of_rpmsg->msg.s_msg.header.type == MSG_TYPE_C &&
  557. (work_of_rpmsg->msg.s_msg.header.cmd == TX_PERIOD_DONE ||
  558. work_of_rpmsg->msg.s_msg.header.cmd == RX_PERIOD_DONE))
  559. is_notification = true;
  560. if (!is_notification)
  561. info->send_message(&work_of_rpmsg->msg, info);
  562. /* update read index */
  563. spin_lock_irqsave(&info->wq_lock, flags);
  564. info->work_read_index++;
  565. info->work_read_index %= WORK_MAX_NUM;
  566. spin_unlock_irqrestore(&info->wq_lock, flags);
  567. }
  568. static int imx_rpmsg_pcm_probe(struct platform_device *pdev)
  569. {
  570. struct snd_soc_component *component;
  571. struct rpmsg_info *info;
  572. int ret, i;
  573. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  574. if (!info)
  575. return -ENOMEM;
  576. platform_set_drvdata(pdev, info);
  577. info->rpdev = container_of(pdev->dev.parent, struct rpmsg_device, dev);
  578. info->dev = &pdev->dev;
  579. /* Setup work queue */
  580. info->rpmsg_wq = alloc_ordered_workqueue("rpmsg_audio",
  581. WQ_HIGHPRI |
  582. WQ_UNBOUND |
  583. WQ_FREEZABLE);
  584. if (!info->rpmsg_wq) {
  585. dev_err(&pdev->dev, "workqueue create failed\n");
  586. return -ENOMEM;
  587. }
  588. /* Write index initialize 1, make it differ with the read index */
  589. info->work_write_index = 1;
  590. info->send_message = imx_rpmsg_pcm_send_message;
  591. for (i = 0; i < WORK_MAX_NUM; i++) {
  592. INIT_WORK(&info->work_list[i].work, imx_rpmsg_pcm_work);
  593. info->work_list[i].info = info;
  594. }
  595. /* Initialize msg */
  596. for (i = 0; i < MSG_MAX_NUM; i++) {
  597. info->msg[i].s_msg.header.cate = IMX_RPMSG_AUDIO;
  598. info->msg[i].s_msg.header.major = IMX_RMPSG_MAJOR;
  599. info->msg[i].s_msg.header.minor = IMX_RMPSG_MINOR;
  600. info->msg[i].s_msg.header.type = MSG_TYPE_A;
  601. info->msg[i].s_msg.param.audioindex = 0;
  602. }
  603. init_completion(&info->cmd_complete);
  604. mutex_init(&info->msg_lock);
  605. spin_lock_init(&info->lock[TX]);
  606. spin_lock_init(&info->lock[RX]);
  607. spin_lock_init(&info->wq_lock);
  608. ret = devm_snd_soc_register_component(&pdev->dev,
  609. &imx_rpmsg_soc_component,
  610. NULL, 0);
  611. if (ret)
  612. goto fail;
  613. component = snd_soc_lookup_component(&pdev->dev, IMX_PCM_DRV_NAME);
  614. if (!component) {
  615. ret = -EINVAL;
  616. goto fail;
  617. }
  618. #ifdef CONFIG_DEBUG_FS
  619. component->debugfs_prefix = "rpmsg";
  620. #endif
  621. return 0;
  622. fail:
  623. if (info->rpmsg_wq)
  624. destroy_workqueue(info->rpmsg_wq);
  625. return ret;
  626. }
  627. static int imx_rpmsg_pcm_remove(struct platform_device *pdev)
  628. {
  629. struct rpmsg_info *info = platform_get_drvdata(pdev);
  630. if (info->rpmsg_wq)
  631. destroy_workqueue(info->rpmsg_wq);
  632. return 0;
  633. }
  634. #ifdef CONFIG_PM
  635. static int imx_rpmsg_pcm_runtime_resume(struct device *dev)
  636. {
  637. struct rpmsg_info *info = dev_get_drvdata(dev);
  638. cpu_latency_qos_add_request(&info->pm_qos_req, 0);
  639. return 0;
  640. }
  641. static int imx_rpmsg_pcm_runtime_suspend(struct device *dev)
  642. {
  643. struct rpmsg_info *info = dev_get_drvdata(dev);
  644. cpu_latency_qos_remove_request(&info->pm_qos_req);
  645. return 0;
  646. }
  647. #endif
  648. #ifdef CONFIG_PM_SLEEP
  649. static int imx_rpmsg_pcm_suspend(struct device *dev)
  650. {
  651. struct rpmsg_info *info = dev_get_drvdata(dev);
  652. struct rpmsg_msg *rpmsg_tx;
  653. struct rpmsg_msg *rpmsg_rx;
  654. rpmsg_tx = &info->msg[TX_SUSPEND];
  655. rpmsg_rx = &info->msg[RX_SUSPEND];
  656. rpmsg_tx->s_msg.header.cmd = TX_SUSPEND;
  657. info->send_message(rpmsg_tx, info);
  658. rpmsg_rx->s_msg.header.cmd = RX_SUSPEND;
  659. info->send_message(rpmsg_rx, info);
  660. return 0;
  661. }
  662. static int imx_rpmsg_pcm_resume(struct device *dev)
  663. {
  664. struct rpmsg_info *info = dev_get_drvdata(dev);
  665. struct rpmsg_msg *rpmsg_tx;
  666. struct rpmsg_msg *rpmsg_rx;
  667. rpmsg_tx = &info->msg[TX_RESUME];
  668. rpmsg_rx = &info->msg[RX_RESUME];
  669. rpmsg_tx->s_msg.header.cmd = TX_RESUME;
  670. info->send_message(rpmsg_tx, info);
  671. rpmsg_rx->s_msg.header.cmd = RX_RESUME;
  672. info->send_message(rpmsg_rx, info);
  673. return 0;
  674. }
  675. #endif /* CONFIG_PM_SLEEP */
  676. static const struct dev_pm_ops imx_rpmsg_pcm_pm_ops = {
  677. SET_RUNTIME_PM_OPS(imx_rpmsg_pcm_runtime_suspend,
  678. imx_rpmsg_pcm_runtime_resume,
  679. NULL)
  680. SET_SYSTEM_SLEEP_PM_OPS(imx_rpmsg_pcm_suspend,
  681. imx_rpmsg_pcm_resume)
  682. };
  683. static struct platform_driver imx_pcm_rpmsg_driver = {
  684. .probe = imx_rpmsg_pcm_probe,
  685. .remove = imx_rpmsg_pcm_remove,
  686. .driver = {
  687. .name = IMX_PCM_DRV_NAME,
  688. .pm = &imx_rpmsg_pcm_pm_ops,
  689. },
  690. };
  691. module_platform_driver(imx_pcm_rpmsg_driver);
  692. MODULE_DESCRIPTION("Freescale SoC Audio RPMSG PCM interface");
  693. MODULE_AUTHOR("Shengjiu Wang <[email protected]>");
  694. MODULE_ALIAS("platform:" IMX_PCM_DRV_NAME);
  695. MODULE_LICENSE("GPL v2");