wm8983.h 57 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * wm8983.h -- WM8983 ALSA SoC Audio driver
  4. *
  5. * Copyright 2011 Wolfson Microelectronics plc
  6. *
  7. * Author: Dimitris Papastamos <[email protected]>
  8. */
  9. #ifndef _WM8983_H
  10. #define _WM8983_H
  11. /*
  12. * Register values.
  13. */
  14. #define WM8983_SOFTWARE_RESET 0x00
  15. #define WM8983_POWER_MANAGEMENT_1 0x01
  16. #define WM8983_POWER_MANAGEMENT_2 0x02
  17. #define WM8983_POWER_MANAGEMENT_3 0x03
  18. #define WM8983_AUDIO_INTERFACE 0x04
  19. #define WM8983_COMPANDING_CONTROL 0x05
  20. #define WM8983_CLOCK_GEN_CONTROL 0x06
  21. #define WM8983_ADDITIONAL_CONTROL 0x07
  22. #define WM8983_GPIO_CONTROL 0x08
  23. #define WM8983_JACK_DETECT_CONTROL_1 0x09
  24. #define WM8983_DAC_CONTROL 0x0A
  25. #define WM8983_LEFT_DAC_DIGITAL_VOL 0x0B
  26. #define WM8983_RIGHT_DAC_DIGITAL_VOL 0x0C
  27. #define WM8983_JACK_DETECT_CONTROL_2 0x0D
  28. #define WM8983_ADC_CONTROL 0x0E
  29. #define WM8983_LEFT_ADC_DIGITAL_VOL 0x0F
  30. #define WM8983_RIGHT_ADC_DIGITAL_VOL 0x10
  31. #define WM8983_EQ1_LOW_SHELF 0x12
  32. #define WM8983_EQ2_PEAK_1 0x13
  33. #define WM8983_EQ3_PEAK_2 0x14
  34. #define WM8983_EQ4_PEAK_3 0x15
  35. #define WM8983_EQ5_HIGH_SHELF 0x16
  36. #define WM8983_DAC_LIMITER_1 0x18
  37. #define WM8983_DAC_LIMITER_2 0x19
  38. #define WM8983_NOTCH_FILTER_1 0x1B
  39. #define WM8983_NOTCH_FILTER_2 0x1C
  40. #define WM8983_NOTCH_FILTER_3 0x1D
  41. #define WM8983_NOTCH_FILTER_4 0x1E
  42. #define WM8983_ALC_CONTROL_1 0x20
  43. #define WM8983_ALC_CONTROL_2 0x21
  44. #define WM8983_ALC_CONTROL_3 0x22
  45. #define WM8983_NOISE_GATE 0x23
  46. #define WM8983_PLL_N 0x24
  47. #define WM8983_PLL_K_1 0x25
  48. #define WM8983_PLL_K_2 0x26
  49. #define WM8983_PLL_K_3 0x27
  50. #define WM8983_3D_CONTROL 0x29
  51. #define WM8983_OUT4_TO_ADC 0x2A
  52. #define WM8983_BEEP_CONTROL 0x2B
  53. #define WM8983_INPUT_CTRL 0x2C
  54. #define WM8983_LEFT_INP_PGA_GAIN_CTRL 0x2D
  55. #define WM8983_RIGHT_INP_PGA_GAIN_CTRL 0x2E
  56. #define WM8983_LEFT_ADC_BOOST_CTRL 0x2F
  57. #define WM8983_RIGHT_ADC_BOOST_CTRL 0x30
  58. #define WM8983_OUTPUT_CTRL 0x31
  59. #define WM8983_LEFT_MIXER_CTRL 0x32
  60. #define WM8983_RIGHT_MIXER_CTRL 0x33
  61. #define WM8983_LOUT1_HP_VOLUME_CTRL 0x34
  62. #define WM8983_ROUT1_HP_VOLUME_CTRL 0x35
  63. #define WM8983_LOUT2_SPK_VOLUME_CTRL 0x36
  64. #define WM8983_ROUT2_SPK_VOLUME_CTRL 0x37
  65. #define WM8983_OUT3_MIXER_CTRL 0x38
  66. #define WM8983_OUT4_MONO_MIX_CTRL 0x39
  67. #define WM8983_BIAS_CTRL 0x3D
  68. #define WM8983_REGISTER_COUNT 59
  69. #define WM8983_MAX_REGISTER 0x3F
  70. /*
  71. * Field Definitions.
  72. */
  73. /*
  74. * R0 (0x00) - Software Reset
  75. */
  76. #define WM8983_SOFTWARE_RESET_MASK 0x01FF /* SOFTWARE_RESET - [8:0] */
  77. #define WM8983_SOFTWARE_RESET_SHIFT 0 /* SOFTWARE_RESET - [8:0] */
  78. #define WM8983_SOFTWARE_RESET_WIDTH 9 /* SOFTWARE_RESET - [8:0] */
  79. /*
  80. * R1 (0x01) - Power management 1
  81. */
  82. #define WM8983_BUFDCOPEN 0x0100 /* BUFDCOPEN */
  83. #define WM8983_BUFDCOPEN_MASK 0x0100 /* BUFDCOPEN */
  84. #define WM8983_BUFDCOPEN_SHIFT 8 /* BUFDCOPEN */
  85. #define WM8983_BUFDCOPEN_WIDTH 1 /* BUFDCOPEN */
  86. #define WM8983_OUT4MIXEN 0x0080 /* OUT4MIXEN */
  87. #define WM8983_OUT4MIXEN_MASK 0x0080 /* OUT4MIXEN */
  88. #define WM8983_OUT4MIXEN_SHIFT 7 /* OUT4MIXEN */
  89. #define WM8983_OUT4MIXEN_WIDTH 1 /* OUT4MIXEN */
  90. #define WM8983_OUT3MIXEN 0x0040 /* OUT3MIXEN */
  91. #define WM8983_OUT3MIXEN_MASK 0x0040 /* OUT3MIXEN */
  92. #define WM8983_OUT3MIXEN_SHIFT 6 /* OUT3MIXEN */
  93. #define WM8983_OUT3MIXEN_WIDTH 1 /* OUT3MIXEN */
  94. #define WM8983_PLLEN 0x0020 /* PLLEN */
  95. #define WM8983_PLLEN_MASK 0x0020 /* PLLEN */
  96. #define WM8983_PLLEN_SHIFT 5 /* PLLEN */
  97. #define WM8983_PLLEN_WIDTH 1 /* PLLEN */
  98. #define WM8983_MICBEN 0x0010 /* MICBEN */
  99. #define WM8983_MICBEN_MASK 0x0010 /* MICBEN */
  100. #define WM8983_MICBEN_SHIFT 4 /* MICBEN */
  101. #define WM8983_MICBEN_WIDTH 1 /* MICBEN */
  102. #define WM8983_BIASEN 0x0008 /* BIASEN */
  103. #define WM8983_BIASEN_MASK 0x0008 /* BIASEN */
  104. #define WM8983_BIASEN_SHIFT 3 /* BIASEN */
  105. #define WM8983_BIASEN_WIDTH 1 /* BIASEN */
  106. #define WM8983_BUFIOEN 0x0004 /* BUFIOEN */
  107. #define WM8983_BUFIOEN_MASK 0x0004 /* BUFIOEN */
  108. #define WM8983_BUFIOEN_SHIFT 2 /* BUFIOEN */
  109. #define WM8983_BUFIOEN_WIDTH 1 /* BUFIOEN */
  110. #define WM8983_VMIDSEL_MASK 0x0003 /* VMIDSEL - [1:0] */
  111. #define WM8983_VMIDSEL_SHIFT 0 /* VMIDSEL - [1:0] */
  112. #define WM8983_VMIDSEL_WIDTH 2 /* VMIDSEL - [1:0] */
  113. /*
  114. * R2 (0x02) - Power management 2
  115. */
  116. #define WM8983_ROUT1EN 0x0100 /* ROUT1EN */
  117. #define WM8983_ROUT1EN_MASK 0x0100 /* ROUT1EN */
  118. #define WM8983_ROUT1EN_SHIFT 8 /* ROUT1EN */
  119. #define WM8983_ROUT1EN_WIDTH 1 /* ROUT1EN */
  120. #define WM8983_LOUT1EN 0x0080 /* LOUT1EN */
  121. #define WM8983_LOUT1EN_MASK 0x0080 /* LOUT1EN */
  122. #define WM8983_LOUT1EN_SHIFT 7 /* LOUT1EN */
  123. #define WM8983_LOUT1EN_WIDTH 1 /* LOUT1EN */
  124. #define WM8983_SLEEP 0x0040 /* SLEEP */
  125. #define WM8983_SLEEP_MASK 0x0040 /* SLEEP */
  126. #define WM8983_SLEEP_SHIFT 6 /* SLEEP */
  127. #define WM8983_SLEEP_WIDTH 1 /* SLEEP */
  128. #define WM8983_BOOSTENR 0x0020 /* BOOSTENR */
  129. #define WM8983_BOOSTENR_MASK 0x0020 /* BOOSTENR */
  130. #define WM8983_BOOSTENR_SHIFT 5 /* BOOSTENR */
  131. #define WM8983_BOOSTENR_WIDTH 1 /* BOOSTENR */
  132. #define WM8983_BOOSTENL 0x0010 /* BOOSTENL */
  133. #define WM8983_BOOSTENL_MASK 0x0010 /* BOOSTENL */
  134. #define WM8983_BOOSTENL_SHIFT 4 /* BOOSTENL */
  135. #define WM8983_BOOSTENL_WIDTH 1 /* BOOSTENL */
  136. #define WM8983_INPGAENR 0x0008 /* INPGAENR */
  137. #define WM8983_INPGAENR_MASK 0x0008 /* INPGAENR */
  138. #define WM8983_INPGAENR_SHIFT 3 /* INPGAENR */
  139. #define WM8983_INPGAENR_WIDTH 1 /* INPGAENR */
  140. #define WM8983_INPPGAENL 0x0004 /* INPPGAENL */
  141. #define WM8983_INPPGAENL_MASK 0x0004 /* INPPGAENL */
  142. #define WM8983_INPPGAENL_SHIFT 2 /* INPPGAENL */
  143. #define WM8983_INPPGAENL_WIDTH 1 /* INPPGAENL */
  144. #define WM8983_ADCENR 0x0002 /* ADCENR */
  145. #define WM8983_ADCENR_MASK 0x0002 /* ADCENR */
  146. #define WM8983_ADCENR_SHIFT 1 /* ADCENR */
  147. #define WM8983_ADCENR_WIDTH 1 /* ADCENR */
  148. #define WM8983_ADCENL 0x0001 /* ADCENL */
  149. #define WM8983_ADCENL_MASK 0x0001 /* ADCENL */
  150. #define WM8983_ADCENL_SHIFT 0 /* ADCENL */
  151. #define WM8983_ADCENL_WIDTH 1 /* ADCENL */
  152. /*
  153. * R3 (0x03) - Power management 3
  154. */
  155. #define WM8983_OUT4EN 0x0100 /* OUT4EN */
  156. #define WM8983_OUT4EN_MASK 0x0100 /* OUT4EN */
  157. #define WM8983_OUT4EN_SHIFT 8 /* OUT4EN */
  158. #define WM8983_OUT4EN_WIDTH 1 /* OUT4EN */
  159. #define WM8983_OUT3EN 0x0080 /* OUT3EN */
  160. #define WM8983_OUT3EN_MASK 0x0080 /* OUT3EN */
  161. #define WM8983_OUT3EN_SHIFT 7 /* OUT3EN */
  162. #define WM8983_OUT3EN_WIDTH 1 /* OUT3EN */
  163. #define WM8983_LOUT2EN 0x0040 /* LOUT2EN */
  164. #define WM8983_LOUT2EN_MASK 0x0040 /* LOUT2EN */
  165. #define WM8983_LOUT2EN_SHIFT 6 /* LOUT2EN */
  166. #define WM8983_LOUT2EN_WIDTH 1 /* LOUT2EN */
  167. #define WM8983_ROUT2EN 0x0020 /* ROUT2EN */
  168. #define WM8983_ROUT2EN_MASK 0x0020 /* ROUT2EN */
  169. #define WM8983_ROUT2EN_SHIFT 5 /* ROUT2EN */
  170. #define WM8983_ROUT2EN_WIDTH 1 /* ROUT2EN */
  171. #define WM8983_RMIXEN 0x0008 /* RMIXEN */
  172. #define WM8983_RMIXEN_MASK 0x0008 /* RMIXEN */
  173. #define WM8983_RMIXEN_SHIFT 3 /* RMIXEN */
  174. #define WM8983_RMIXEN_WIDTH 1 /* RMIXEN */
  175. #define WM8983_LMIXEN 0x0004 /* LMIXEN */
  176. #define WM8983_LMIXEN_MASK 0x0004 /* LMIXEN */
  177. #define WM8983_LMIXEN_SHIFT 2 /* LMIXEN */
  178. #define WM8983_LMIXEN_WIDTH 1 /* LMIXEN */
  179. #define WM8983_DACENR 0x0002 /* DACENR */
  180. #define WM8983_DACENR_MASK 0x0002 /* DACENR */
  181. #define WM8983_DACENR_SHIFT 1 /* DACENR */
  182. #define WM8983_DACENR_WIDTH 1 /* DACENR */
  183. #define WM8983_DACENL 0x0001 /* DACENL */
  184. #define WM8983_DACENL_MASK 0x0001 /* DACENL */
  185. #define WM8983_DACENL_SHIFT 0 /* DACENL */
  186. #define WM8983_DACENL_WIDTH 1 /* DACENL */
  187. /*
  188. * R4 (0x04) - Audio Interface
  189. */
  190. #define WM8983_BCP 0x0100 /* BCP */
  191. #define WM8983_BCP_MASK 0x0100 /* BCP */
  192. #define WM8983_BCP_SHIFT 8 /* BCP */
  193. #define WM8983_BCP_WIDTH 1 /* BCP */
  194. #define WM8983_LRCP 0x0080 /* LRCP */
  195. #define WM8983_LRCP_MASK 0x0080 /* LRCP */
  196. #define WM8983_LRCP_SHIFT 7 /* LRCP */
  197. #define WM8983_LRCP_WIDTH 1 /* LRCP */
  198. #define WM8983_WL_MASK 0x0060 /* WL - [6:5] */
  199. #define WM8983_WL_SHIFT 5 /* WL - [6:5] */
  200. #define WM8983_WL_WIDTH 2 /* WL - [6:5] */
  201. #define WM8983_FMT_MASK 0x0018 /* FMT - [4:3] */
  202. #define WM8983_FMT_SHIFT 3 /* FMT - [4:3] */
  203. #define WM8983_FMT_WIDTH 2 /* FMT - [4:3] */
  204. #define WM8983_DLRSWAP 0x0004 /* DLRSWAP */
  205. #define WM8983_DLRSWAP_MASK 0x0004 /* DLRSWAP */
  206. #define WM8983_DLRSWAP_SHIFT 2 /* DLRSWAP */
  207. #define WM8983_DLRSWAP_WIDTH 1 /* DLRSWAP */
  208. #define WM8983_ALRSWAP 0x0002 /* ALRSWAP */
  209. #define WM8983_ALRSWAP_MASK 0x0002 /* ALRSWAP */
  210. #define WM8983_ALRSWAP_SHIFT 1 /* ALRSWAP */
  211. #define WM8983_ALRSWAP_WIDTH 1 /* ALRSWAP */
  212. #define WM8983_MONO 0x0001 /* MONO */
  213. #define WM8983_MONO_MASK 0x0001 /* MONO */
  214. #define WM8983_MONO_SHIFT 0 /* MONO */
  215. #define WM8983_MONO_WIDTH 1 /* MONO */
  216. /*
  217. * R5 (0x05) - Companding control
  218. */
  219. #define WM8983_WL8 0x0020 /* WL8 */
  220. #define WM8983_WL8_MASK 0x0020 /* WL8 */
  221. #define WM8983_WL8_SHIFT 5 /* WL8 */
  222. #define WM8983_WL8_WIDTH 1 /* WL8 */
  223. #define WM8983_DAC_COMP_MASK 0x0018 /* DAC_COMP - [4:3] */
  224. #define WM8983_DAC_COMP_SHIFT 3 /* DAC_COMP - [4:3] */
  225. #define WM8983_DAC_COMP_WIDTH 2 /* DAC_COMP - [4:3] */
  226. #define WM8983_ADC_COMP_MASK 0x0006 /* ADC_COMP - [2:1] */
  227. #define WM8983_ADC_COMP_SHIFT 1 /* ADC_COMP - [2:1] */
  228. #define WM8983_ADC_COMP_WIDTH 2 /* ADC_COMP - [2:1] */
  229. #define WM8983_LOOPBACK 0x0001 /* LOOPBACK */
  230. #define WM8983_LOOPBACK_MASK 0x0001 /* LOOPBACK */
  231. #define WM8983_LOOPBACK_SHIFT 0 /* LOOPBACK */
  232. #define WM8983_LOOPBACK_WIDTH 1 /* LOOPBACK */
  233. /*
  234. * R6 (0x06) - Clock Gen control
  235. */
  236. #define WM8983_CLKSEL 0x0100 /* CLKSEL */
  237. #define WM8983_CLKSEL_MASK 0x0100 /* CLKSEL */
  238. #define WM8983_CLKSEL_SHIFT 8 /* CLKSEL */
  239. #define WM8983_CLKSEL_WIDTH 1 /* CLKSEL */
  240. #define WM8983_MCLKDIV_MASK 0x00E0 /* MCLKDIV - [7:5] */
  241. #define WM8983_MCLKDIV_SHIFT 5 /* MCLKDIV - [7:5] */
  242. #define WM8983_MCLKDIV_WIDTH 3 /* MCLKDIV - [7:5] */
  243. #define WM8983_BCLKDIV_MASK 0x001C /* BCLKDIV - [4:2] */
  244. #define WM8983_BCLKDIV_SHIFT 2 /* BCLKDIV - [4:2] */
  245. #define WM8983_BCLKDIV_WIDTH 3 /* BCLKDIV - [4:2] */
  246. #define WM8983_MS 0x0001 /* MS */
  247. #define WM8983_MS_MASK 0x0001 /* MS */
  248. #define WM8983_MS_SHIFT 0 /* MS */
  249. #define WM8983_MS_WIDTH 1 /* MS */
  250. /*
  251. * R7 (0x07) - Additional control
  252. */
  253. #define WM8983_SR_MASK 0x000E /* SR - [3:1] */
  254. #define WM8983_SR_SHIFT 1 /* SR - [3:1] */
  255. #define WM8983_SR_WIDTH 3 /* SR - [3:1] */
  256. #define WM8983_SLOWCLKEN 0x0001 /* SLOWCLKEN */
  257. #define WM8983_SLOWCLKEN_MASK 0x0001 /* SLOWCLKEN */
  258. #define WM8983_SLOWCLKEN_SHIFT 0 /* SLOWCLKEN */
  259. #define WM8983_SLOWCLKEN_WIDTH 1 /* SLOWCLKEN */
  260. /*
  261. * R8 (0x08) - GPIO Control
  262. */
  263. #define WM8983_OPCLKDIV_MASK 0x0030 /* OPCLKDIV - [5:4] */
  264. #define WM8983_OPCLKDIV_SHIFT 4 /* OPCLKDIV - [5:4] */
  265. #define WM8983_OPCLKDIV_WIDTH 2 /* OPCLKDIV - [5:4] */
  266. #define WM8983_GPIO1POL 0x0008 /* GPIO1POL */
  267. #define WM8983_GPIO1POL_MASK 0x0008 /* GPIO1POL */
  268. #define WM8983_GPIO1POL_SHIFT 3 /* GPIO1POL */
  269. #define WM8983_GPIO1POL_WIDTH 1 /* GPIO1POL */
  270. #define WM8983_GPIO1SEL_MASK 0x0007 /* GPIO1SEL - [2:0] */
  271. #define WM8983_GPIO1SEL_SHIFT 0 /* GPIO1SEL - [2:0] */
  272. #define WM8983_GPIO1SEL_WIDTH 3 /* GPIO1SEL - [2:0] */
  273. /*
  274. * R9 (0x09) - Jack Detect Control 1
  275. */
  276. #define WM8983_JD_VMID1 0x0100 /* JD_VMID1 */
  277. #define WM8983_JD_VMID1_MASK 0x0100 /* JD_VMID1 */
  278. #define WM8983_JD_VMID1_SHIFT 8 /* JD_VMID1 */
  279. #define WM8983_JD_VMID1_WIDTH 1 /* JD_VMID1 */
  280. #define WM8983_JD_VMID0 0x0080 /* JD_VMID0 */
  281. #define WM8983_JD_VMID0_MASK 0x0080 /* JD_VMID0 */
  282. #define WM8983_JD_VMID0_SHIFT 7 /* JD_VMID0 */
  283. #define WM8983_JD_VMID0_WIDTH 1 /* JD_VMID0 */
  284. #define WM8983_JD_EN 0x0040 /* JD_EN */
  285. #define WM8983_JD_EN_MASK 0x0040 /* JD_EN */
  286. #define WM8983_JD_EN_SHIFT 6 /* JD_EN */
  287. #define WM8983_JD_EN_WIDTH 1 /* JD_EN */
  288. #define WM8983_JD_SEL_MASK 0x0030 /* JD_SEL - [5:4] */
  289. #define WM8983_JD_SEL_SHIFT 4 /* JD_SEL - [5:4] */
  290. #define WM8983_JD_SEL_WIDTH 2 /* JD_SEL - [5:4] */
  291. /*
  292. * R10 (0x0A) - DAC Control
  293. */
  294. #define WM8983_SOFTMUTE 0x0040 /* SOFTMUTE */
  295. #define WM8983_SOFTMUTE_MASK 0x0040 /* SOFTMUTE */
  296. #define WM8983_SOFTMUTE_SHIFT 6 /* SOFTMUTE */
  297. #define WM8983_SOFTMUTE_WIDTH 1 /* SOFTMUTE */
  298. #define WM8983_DACOSR128 0x0008 /* DACOSR128 */
  299. #define WM8983_DACOSR128_MASK 0x0008 /* DACOSR128 */
  300. #define WM8983_DACOSR128_SHIFT 3 /* DACOSR128 */
  301. #define WM8983_DACOSR128_WIDTH 1 /* DACOSR128 */
  302. #define WM8983_AMUTE 0x0004 /* AMUTE */
  303. #define WM8983_AMUTE_MASK 0x0004 /* AMUTE */
  304. #define WM8983_AMUTE_SHIFT 2 /* AMUTE */
  305. #define WM8983_AMUTE_WIDTH 1 /* AMUTE */
  306. #define WM8983_DACRPOL 0x0002 /* DACRPOL */
  307. #define WM8983_DACRPOL_MASK 0x0002 /* DACRPOL */
  308. #define WM8983_DACRPOL_SHIFT 1 /* DACRPOL */
  309. #define WM8983_DACRPOL_WIDTH 1 /* DACRPOL */
  310. #define WM8983_DACLPOL 0x0001 /* DACLPOL */
  311. #define WM8983_DACLPOL_MASK 0x0001 /* DACLPOL */
  312. #define WM8983_DACLPOL_SHIFT 0 /* DACLPOL */
  313. #define WM8983_DACLPOL_WIDTH 1 /* DACLPOL */
  314. /*
  315. * R11 (0x0B) - Left DAC digital Vol
  316. */
  317. #define WM8983_DACVU 0x0100 /* DACVU */
  318. #define WM8983_DACVU_MASK 0x0100 /* DACVU */
  319. #define WM8983_DACVU_SHIFT 8 /* DACVU */
  320. #define WM8983_DACVU_WIDTH 1 /* DACVU */
  321. #define WM8983_DACLVOL_MASK 0x00FF /* DACLVOL - [7:0] */
  322. #define WM8983_DACLVOL_SHIFT 0 /* DACLVOL - [7:0] */
  323. #define WM8983_DACLVOL_WIDTH 8 /* DACLVOL - [7:0] */
  324. /*
  325. * R12 (0x0C) - Right DAC digital vol
  326. */
  327. #define WM8983_DACVU 0x0100 /* DACVU */
  328. #define WM8983_DACVU_MASK 0x0100 /* DACVU */
  329. #define WM8983_DACVU_SHIFT 8 /* DACVU */
  330. #define WM8983_DACVU_WIDTH 1 /* DACVU */
  331. #define WM8983_DACRVOL_MASK 0x00FF /* DACRVOL - [7:0] */
  332. #define WM8983_DACRVOL_SHIFT 0 /* DACRVOL - [7:0] */
  333. #define WM8983_DACRVOL_WIDTH 8 /* DACRVOL - [7:0] */
  334. /*
  335. * R13 (0x0D) - Jack Detect Control 2
  336. */
  337. #define WM8983_JD_EN1_MASK 0x00F0 /* JD_EN1 - [7:4] */
  338. #define WM8983_JD_EN1_SHIFT 4 /* JD_EN1 - [7:4] */
  339. #define WM8983_JD_EN1_WIDTH 4 /* JD_EN1 - [7:4] */
  340. #define WM8983_JD_EN0_MASK 0x000F /* JD_EN0 - [3:0] */
  341. #define WM8983_JD_EN0_SHIFT 0 /* JD_EN0 - [3:0] */
  342. #define WM8983_JD_EN0_WIDTH 4 /* JD_EN0 - [3:0] */
  343. /*
  344. * R14 (0x0E) - ADC Control
  345. */
  346. #define WM8983_HPFEN 0x0100 /* HPFEN */
  347. #define WM8983_HPFEN_MASK 0x0100 /* HPFEN */
  348. #define WM8983_HPFEN_SHIFT 8 /* HPFEN */
  349. #define WM8983_HPFEN_WIDTH 1 /* HPFEN */
  350. #define WM8983_HPFAPP 0x0080 /* HPFAPP */
  351. #define WM8983_HPFAPP_MASK 0x0080 /* HPFAPP */
  352. #define WM8983_HPFAPP_SHIFT 7 /* HPFAPP */
  353. #define WM8983_HPFAPP_WIDTH 1 /* HPFAPP */
  354. #define WM8983_HPFCUT_MASK 0x0070 /* HPFCUT - [6:4] */
  355. #define WM8983_HPFCUT_SHIFT 4 /* HPFCUT - [6:4] */
  356. #define WM8983_HPFCUT_WIDTH 3 /* HPFCUT - [6:4] */
  357. #define WM8983_ADCOSR128 0x0008 /* ADCOSR128 */
  358. #define WM8983_ADCOSR128_MASK 0x0008 /* ADCOSR128 */
  359. #define WM8983_ADCOSR128_SHIFT 3 /* ADCOSR128 */
  360. #define WM8983_ADCOSR128_WIDTH 1 /* ADCOSR128 */
  361. #define WM8983_ADCRPOL 0x0002 /* ADCRPOL */
  362. #define WM8983_ADCRPOL_MASK 0x0002 /* ADCRPOL */
  363. #define WM8983_ADCRPOL_SHIFT 1 /* ADCRPOL */
  364. #define WM8983_ADCRPOL_WIDTH 1 /* ADCRPOL */
  365. #define WM8983_ADCLPOL 0x0001 /* ADCLPOL */
  366. #define WM8983_ADCLPOL_MASK 0x0001 /* ADCLPOL */
  367. #define WM8983_ADCLPOL_SHIFT 0 /* ADCLPOL */
  368. #define WM8983_ADCLPOL_WIDTH 1 /* ADCLPOL */
  369. /*
  370. * R15 (0x0F) - Left ADC Digital Vol
  371. */
  372. #define WM8983_ADCVU 0x0100 /* ADCVU */
  373. #define WM8983_ADCVU_MASK 0x0100 /* ADCVU */
  374. #define WM8983_ADCVU_SHIFT 8 /* ADCVU */
  375. #define WM8983_ADCVU_WIDTH 1 /* ADCVU */
  376. #define WM8983_ADCLVOL_MASK 0x00FF /* ADCLVOL - [7:0] */
  377. #define WM8983_ADCLVOL_SHIFT 0 /* ADCLVOL - [7:0] */
  378. #define WM8983_ADCLVOL_WIDTH 8 /* ADCLVOL - [7:0] */
  379. /*
  380. * R16 (0x10) - Right ADC Digital Vol
  381. */
  382. #define WM8983_ADCVU 0x0100 /* ADCVU */
  383. #define WM8983_ADCVU_MASK 0x0100 /* ADCVU */
  384. #define WM8983_ADCVU_SHIFT 8 /* ADCVU */
  385. #define WM8983_ADCVU_WIDTH 1 /* ADCVU */
  386. #define WM8983_ADCRVOL_MASK 0x00FF /* ADCRVOL - [7:0] */
  387. #define WM8983_ADCRVOL_SHIFT 0 /* ADCRVOL - [7:0] */
  388. #define WM8983_ADCRVOL_WIDTH 8 /* ADCRVOL - [7:0] */
  389. /*
  390. * R18 (0x12) - EQ1 - low shelf
  391. */
  392. #define WM8983_EQ3DMODE 0x0100 /* EQ3DMODE */
  393. #define WM8983_EQ3DMODE_MASK 0x0100 /* EQ3DMODE */
  394. #define WM8983_EQ3DMODE_SHIFT 8 /* EQ3DMODE */
  395. #define WM8983_EQ3DMODE_WIDTH 1 /* EQ3DMODE */
  396. #define WM8983_EQ1C_MASK 0x0060 /* EQ1C - [6:5] */
  397. #define WM8983_EQ1C_SHIFT 5 /* EQ1C - [6:5] */
  398. #define WM8983_EQ1C_WIDTH 2 /* EQ1C - [6:5] */
  399. #define WM8983_EQ1G_MASK 0x001F /* EQ1G - [4:0] */
  400. #define WM8983_EQ1G_SHIFT 0 /* EQ1G - [4:0] */
  401. #define WM8983_EQ1G_WIDTH 5 /* EQ1G - [4:0] */
  402. /*
  403. * R19 (0x13) - EQ2 - peak 1
  404. */
  405. #define WM8983_EQ2BW 0x0100 /* EQ2BW */
  406. #define WM8983_EQ2BW_MASK 0x0100 /* EQ2BW */
  407. #define WM8983_EQ2BW_SHIFT 8 /* EQ2BW */
  408. #define WM8983_EQ2BW_WIDTH 1 /* EQ2BW */
  409. #define WM8983_EQ2C_MASK 0x0060 /* EQ2C - [6:5] */
  410. #define WM8983_EQ2C_SHIFT 5 /* EQ2C - [6:5] */
  411. #define WM8983_EQ2C_WIDTH 2 /* EQ2C - [6:5] */
  412. #define WM8983_EQ2G_MASK 0x001F /* EQ2G - [4:0] */
  413. #define WM8983_EQ2G_SHIFT 0 /* EQ2G - [4:0] */
  414. #define WM8983_EQ2G_WIDTH 5 /* EQ2G - [4:0] */
  415. /*
  416. * R20 (0x14) - EQ3 - peak 2
  417. */
  418. #define WM8983_EQ3BW 0x0100 /* EQ3BW */
  419. #define WM8983_EQ3BW_MASK 0x0100 /* EQ3BW */
  420. #define WM8983_EQ3BW_SHIFT 8 /* EQ3BW */
  421. #define WM8983_EQ3BW_WIDTH 1 /* EQ3BW */
  422. #define WM8983_EQ3C_MASK 0x0060 /* EQ3C - [6:5] */
  423. #define WM8983_EQ3C_SHIFT 5 /* EQ3C - [6:5] */
  424. #define WM8983_EQ3C_WIDTH 2 /* EQ3C - [6:5] */
  425. #define WM8983_EQ3G_MASK 0x001F /* EQ3G - [4:0] */
  426. #define WM8983_EQ3G_SHIFT 0 /* EQ3G - [4:0] */
  427. #define WM8983_EQ3G_WIDTH 5 /* EQ3G - [4:0] */
  428. /*
  429. * R21 (0x15) - EQ4 - peak 3
  430. */
  431. #define WM8983_EQ4BW 0x0100 /* EQ4BW */
  432. #define WM8983_EQ4BW_MASK 0x0100 /* EQ4BW */
  433. #define WM8983_EQ4BW_SHIFT 8 /* EQ4BW */
  434. #define WM8983_EQ4BW_WIDTH 1 /* EQ4BW */
  435. #define WM8983_EQ4C_MASK 0x0060 /* EQ4C - [6:5] */
  436. #define WM8983_EQ4C_SHIFT 5 /* EQ4C - [6:5] */
  437. #define WM8983_EQ4C_WIDTH 2 /* EQ4C - [6:5] */
  438. #define WM8983_EQ4G_MASK 0x001F /* EQ4G - [4:0] */
  439. #define WM8983_EQ4G_SHIFT 0 /* EQ4G - [4:0] */
  440. #define WM8983_EQ4G_WIDTH 5 /* EQ4G - [4:0] */
  441. /*
  442. * R22 (0x16) - EQ5 - high shelf
  443. */
  444. #define WM8983_EQ5C_MASK 0x0060 /* EQ5C - [6:5] */
  445. #define WM8983_EQ5C_SHIFT 5 /* EQ5C - [6:5] */
  446. #define WM8983_EQ5C_WIDTH 2 /* EQ5C - [6:5] */
  447. #define WM8983_EQ5G_MASK 0x001F /* EQ5G - [4:0] */
  448. #define WM8983_EQ5G_SHIFT 0 /* EQ5G - [4:0] */
  449. #define WM8983_EQ5G_WIDTH 5 /* EQ5G - [4:0] */
  450. /*
  451. * R24 (0x18) - DAC Limiter 1
  452. */
  453. #define WM8983_LIMEN 0x0100 /* LIMEN */
  454. #define WM8983_LIMEN_MASK 0x0100 /* LIMEN */
  455. #define WM8983_LIMEN_SHIFT 8 /* LIMEN */
  456. #define WM8983_LIMEN_WIDTH 1 /* LIMEN */
  457. #define WM8983_LIMDCY_MASK 0x00F0 /* LIMDCY - [7:4] */
  458. #define WM8983_LIMDCY_SHIFT 4 /* LIMDCY - [7:4] */
  459. #define WM8983_LIMDCY_WIDTH 4 /* LIMDCY - [7:4] */
  460. #define WM8983_LIMATK_MASK 0x000F /* LIMATK - [3:0] */
  461. #define WM8983_LIMATK_SHIFT 0 /* LIMATK - [3:0] */
  462. #define WM8983_LIMATK_WIDTH 4 /* LIMATK - [3:0] */
  463. /*
  464. * R25 (0x19) - DAC Limiter 2
  465. */
  466. #define WM8983_LIMLVL_MASK 0x0070 /* LIMLVL - [6:4] */
  467. #define WM8983_LIMLVL_SHIFT 4 /* LIMLVL - [6:4] */
  468. #define WM8983_LIMLVL_WIDTH 3 /* LIMLVL - [6:4] */
  469. #define WM8983_LIMBOOST_MASK 0x000F /* LIMBOOST - [3:0] */
  470. #define WM8983_LIMBOOST_SHIFT 0 /* LIMBOOST - [3:0] */
  471. #define WM8983_LIMBOOST_WIDTH 4 /* LIMBOOST - [3:0] */
  472. /*
  473. * R27 (0x1B) - Notch Filter 1
  474. */
  475. #define WM8983_NFU 0x0100 /* NFU */
  476. #define WM8983_NFU_MASK 0x0100 /* NFU */
  477. #define WM8983_NFU_SHIFT 8 /* NFU */
  478. #define WM8983_NFU_WIDTH 1 /* NFU */
  479. #define WM8983_NFEN 0x0080 /* NFEN */
  480. #define WM8983_NFEN_MASK 0x0080 /* NFEN */
  481. #define WM8983_NFEN_SHIFT 7 /* NFEN */
  482. #define WM8983_NFEN_WIDTH 1 /* NFEN */
  483. #define WM8983_NFA0_13_7_MASK 0x007F /* NFA0(13:7) - [6:0] */
  484. #define WM8983_NFA0_13_7_SHIFT 0 /* NFA0(13:7) - [6:0] */
  485. #define WM8983_NFA0_13_7_WIDTH 7 /* NFA0(13:7) - [6:0] */
  486. /*
  487. * R28 (0x1C) - Notch Filter 2
  488. */
  489. #define WM8983_NFU 0x0100 /* NFU */
  490. #define WM8983_NFU_MASK 0x0100 /* NFU */
  491. #define WM8983_NFU_SHIFT 8 /* NFU */
  492. #define WM8983_NFU_WIDTH 1 /* NFU */
  493. #define WM8983_NFA0_6_0_MASK 0x007F /* NFA0(6:0) - [6:0] */
  494. #define WM8983_NFA0_6_0_SHIFT 0 /* NFA0(6:0) - [6:0] */
  495. #define WM8983_NFA0_6_0_WIDTH 7 /* NFA0(6:0) - [6:0] */
  496. /*
  497. * R29 (0x1D) - Notch Filter 3
  498. */
  499. #define WM8983_NFU 0x0100 /* NFU */
  500. #define WM8983_NFU_MASK 0x0100 /* NFU */
  501. #define WM8983_NFU_SHIFT 8 /* NFU */
  502. #define WM8983_NFU_WIDTH 1 /* NFU */
  503. #define WM8983_NFA1_13_7_MASK 0x007F /* NFA1(13:7) - [6:0] */
  504. #define WM8983_NFA1_13_7_SHIFT 0 /* NFA1(13:7) - [6:0] */
  505. #define WM8983_NFA1_13_7_WIDTH 7 /* NFA1(13:7) - [6:0] */
  506. /*
  507. * R30 (0x1E) - Notch Filter 4
  508. */
  509. #define WM8983_NFU 0x0100 /* NFU */
  510. #define WM8983_NFU_MASK 0x0100 /* NFU */
  511. #define WM8983_NFU_SHIFT 8 /* NFU */
  512. #define WM8983_NFU_WIDTH 1 /* NFU */
  513. #define WM8983_NFA1_6_0_MASK 0x007F /* NFA1(6:0) - [6:0] */
  514. #define WM8983_NFA1_6_0_SHIFT 0 /* NFA1(6:0) - [6:0] */
  515. #define WM8983_NFA1_6_0_WIDTH 7 /* NFA1(6:0) - [6:0] */
  516. /*
  517. * R32 (0x20) - ALC control 1
  518. */
  519. #define WM8983_ALCSEL_MASK 0x0180 /* ALCSEL - [8:7] */
  520. #define WM8983_ALCSEL_SHIFT 7 /* ALCSEL - [8:7] */
  521. #define WM8983_ALCSEL_WIDTH 2 /* ALCSEL - [8:7] */
  522. #define WM8983_ALCMAX_MASK 0x0038 /* ALCMAX - [5:3] */
  523. #define WM8983_ALCMAX_SHIFT 3 /* ALCMAX - [5:3] */
  524. #define WM8983_ALCMAX_WIDTH 3 /* ALCMAX - [5:3] */
  525. #define WM8983_ALCMIN_MASK 0x0007 /* ALCMIN - [2:0] */
  526. #define WM8983_ALCMIN_SHIFT 0 /* ALCMIN - [2:0] */
  527. #define WM8983_ALCMIN_WIDTH 3 /* ALCMIN - [2:0] */
  528. /*
  529. * R33 (0x21) - ALC control 2
  530. */
  531. #define WM8983_ALCHLD_MASK 0x00F0 /* ALCHLD - [7:4] */
  532. #define WM8983_ALCHLD_SHIFT 4 /* ALCHLD - [7:4] */
  533. #define WM8983_ALCHLD_WIDTH 4 /* ALCHLD - [7:4] */
  534. #define WM8983_ALCLVL_MASK 0x000F /* ALCLVL - [3:0] */
  535. #define WM8983_ALCLVL_SHIFT 0 /* ALCLVL - [3:0] */
  536. #define WM8983_ALCLVL_WIDTH 4 /* ALCLVL - [3:0] */
  537. /*
  538. * R34 (0x22) - ALC control 3
  539. */
  540. #define WM8983_ALCMODE 0x0100 /* ALCMODE */
  541. #define WM8983_ALCMODE_MASK 0x0100 /* ALCMODE */
  542. #define WM8983_ALCMODE_SHIFT 8 /* ALCMODE */
  543. #define WM8983_ALCMODE_WIDTH 1 /* ALCMODE */
  544. #define WM8983_ALCDCY_MASK 0x00F0 /* ALCDCY - [7:4] */
  545. #define WM8983_ALCDCY_SHIFT 4 /* ALCDCY - [7:4] */
  546. #define WM8983_ALCDCY_WIDTH 4 /* ALCDCY - [7:4] */
  547. #define WM8983_ALCATK_MASK 0x000F /* ALCATK - [3:0] */
  548. #define WM8983_ALCATK_SHIFT 0 /* ALCATK - [3:0] */
  549. #define WM8983_ALCATK_WIDTH 4 /* ALCATK - [3:0] */
  550. /*
  551. * R35 (0x23) - Noise Gate
  552. */
  553. #define WM8983_NGEN 0x0008 /* NGEN */
  554. #define WM8983_NGEN_MASK 0x0008 /* NGEN */
  555. #define WM8983_NGEN_SHIFT 3 /* NGEN */
  556. #define WM8983_NGEN_WIDTH 1 /* NGEN */
  557. #define WM8983_NGTH_MASK 0x0007 /* NGTH - [2:0] */
  558. #define WM8983_NGTH_SHIFT 0 /* NGTH - [2:0] */
  559. #define WM8983_NGTH_WIDTH 3 /* NGTH - [2:0] */
  560. /*
  561. * R36 (0x24) - PLL N
  562. */
  563. #define WM8983_PLL_PRESCALE 0x0010 /* PLL_PRESCALE */
  564. #define WM8983_PLL_PRESCALE_MASK 0x0010 /* PLL_PRESCALE */
  565. #define WM8983_PLL_PRESCALE_SHIFT 4 /* PLL_PRESCALE */
  566. #define WM8983_PLL_PRESCALE_WIDTH 1 /* PLL_PRESCALE */
  567. #define WM8983_PLLN_MASK 0x000F /* PLLN - [3:0] */
  568. #define WM8983_PLLN_SHIFT 0 /* PLLN - [3:0] */
  569. #define WM8983_PLLN_WIDTH 4 /* PLLN - [3:0] */
  570. /*
  571. * R37 (0x25) - PLL K 1
  572. */
  573. #define WM8983_PLLK_23_18_MASK 0x003F /* PLLK(23:18) - [5:0] */
  574. #define WM8983_PLLK_23_18_SHIFT 0 /* PLLK(23:18) - [5:0] */
  575. #define WM8983_PLLK_23_18_WIDTH 6 /* PLLK(23:18) - [5:0] */
  576. /*
  577. * R38 (0x26) - PLL K 2
  578. */
  579. #define WM8983_PLLK_17_9_MASK 0x01FF /* PLLK(17:9) - [8:0] */
  580. #define WM8983_PLLK_17_9_SHIFT 0 /* PLLK(17:9) - [8:0] */
  581. #define WM8983_PLLK_17_9_WIDTH 9 /* PLLK(17:9) - [8:0] */
  582. /*
  583. * R39 (0x27) - PLL K 3
  584. */
  585. #define WM8983_PLLK_8_0_MASK 0x01FF /* PLLK(8:0) - [8:0] */
  586. #define WM8983_PLLK_8_0_SHIFT 0 /* PLLK(8:0) - [8:0] */
  587. #define WM8983_PLLK_8_0_WIDTH 9 /* PLLK(8:0) - [8:0] */
  588. /*
  589. * R41 (0x29) - 3D control
  590. */
  591. #define WM8983_DEPTH3D_MASK 0x000F /* DEPTH3D - [3:0] */
  592. #define WM8983_DEPTH3D_SHIFT 0 /* DEPTH3D - [3:0] */
  593. #define WM8983_DEPTH3D_WIDTH 4 /* DEPTH3D - [3:0] */
  594. /*
  595. * R42 (0x2A) - OUT4 to ADC
  596. */
  597. #define WM8983_OUT4_2ADCVOL_MASK 0x01C0 /* OUT4_2ADCVOL - [8:6] */
  598. #define WM8983_OUT4_2ADCVOL_SHIFT 6 /* OUT4_2ADCVOL - [8:6] */
  599. #define WM8983_OUT4_2ADCVOL_WIDTH 3 /* OUT4_2ADCVOL - [8:6] */
  600. #define WM8983_OUT4_2LNR 0x0020 /* OUT4_2LNR */
  601. #define WM8983_OUT4_2LNR_MASK 0x0020 /* OUT4_2LNR */
  602. #define WM8983_OUT4_2LNR_SHIFT 5 /* OUT4_2LNR */
  603. #define WM8983_OUT4_2LNR_WIDTH 1 /* OUT4_2LNR */
  604. #define WM8983_POBCTRL 0x0004 /* POBCTRL */
  605. #define WM8983_POBCTRL_MASK 0x0004 /* POBCTRL */
  606. #define WM8983_POBCTRL_SHIFT 2 /* POBCTRL */
  607. #define WM8983_POBCTRL_WIDTH 1 /* POBCTRL */
  608. #define WM8983_DELEN 0x0002 /* DELEN */
  609. #define WM8983_DELEN_MASK 0x0002 /* DELEN */
  610. #define WM8983_DELEN_SHIFT 1 /* DELEN */
  611. #define WM8983_DELEN_WIDTH 1 /* DELEN */
  612. #define WM8983_OUT1DEL 0x0001 /* OUT1DEL */
  613. #define WM8983_OUT1DEL_MASK 0x0001 /* OUT1DEL */
  614. #define WM8983_OUT1DEL_SHIFT 0 /* OUT1DEL */
  615. #define WM8983_OUT1DEL_WIDTH 1 /* OUT1DEL */
  616. /*
  617. * R43 (0x2B) - Beep control
  618. */
  619. #define WM8983_BYPL2RMIX 0x0100 /* BYPL2RMIX */
  620. #define WM8983_BYPL2RMIX_MASK 0x0100 /* BYPL2RMIX */
  621. #define WM8983_BYPL2RMIX_SHIFT 8 /* BYPL2RMIX */
  622. #define WM8983_BYPL2RMIX_WIDTH 1 /* BYPL2RMIX */
  623. #define WM8983_BYPR2LMIX 0x0080 /* BYPR2LMIX */
  624. #define WM8983_BYPR2LMIX_MASK 0x0080 /* BYPR2LMIX */
  625. #define WM8983_BYPR2LMIX_SHIFT 7 /* BYPR2LMIX */
  626. #define WM8983_BYPR2LMIX_WIDTH 1 /* BYPR2LMIX */
  627. #define WM8983_MUTERPGA2INV 0x0020 /* MUTERPGA2INV */
  628. #define WM8983_MUTERPGA2INV_MASK 0x0020 /* MUTERPGA2INV */
  629. #define WM8983_MUTERPGA2INV_SHIFT 5 /* MUTERPGA2INV */
  630. #define WM8983_MUTERPGA2INV_WIDTH 1 /* MUTERPGA2INV */
  631. #define WM8983_INVROUT2 0x0010 /* INVROUT2 */
  632. #define WM8983_INVROUT2_MASK 0x0010 /* INVROUT2 */
  633. #define WM8983_INVROUT2_SHIFT 4 /* INVROUT2 */
  634. #define WM8983_INVROUT2_WIDTH 1 /* INVROUT2 */
  635. #define WM8983_BEEPVOL_MASK 0x000E /* BEEPVOL - [3:1] */
  636. #define WM8983_BEEPVOL_SHIFT 1 /* BEEPVOL - [3:1] */
  637. #define WM8983_BEEPVOL_WIDTH 3 /* BEEPVOL - [3:1] */
  638. #define WM8983_BEEPEN 0x0001 /* BEEPEN */
  639. #define WM8983_BEEPEN_MASK 0x0001 /* BEEPEN */
  640. #define WM8983_BEEPEN_SHIFT 0 /* BEEPEN */
  641. #define WM8983_BEEPEN_WIDTH 1 /* BEEPEN */
  642. /*
  643. * R44 (0x2C) - Input ctrl
  644. */
  645. #define WM8983_MBVSEL 0x0100 /* MBVSEL */
  646. #define WM8983_MBVSEL_MASK 0x0100 /* MBVSEL */
  647. #define WM8983_MBVSEL_SHIFT 8 /* MBVSEL */
  648. #define WM8983_MBVSEL_WIDTH 1 /* MBVSEL */
  649. #define WM8983_R2_2INPPGA 0x0040 /* R2_2INPPGA */
  650. #define WM8983_R2_2INPPGA_MASK 0x0040 /* R2_2INPPGA */
  651. #define WM8983_R2_2INPPGA_SHIFT 6 /* R2_2INPPGA */
  652. #define WM8983_R2_2INPPGA_WIDTH 1 /* R2_2INPPGA */
  653. #define WM8983_RIN2INPPGA 0x0020 /* RIN2INPPGA */
  654. #define WM8983_RIN2INPPGA_MASK 0x0020 /* RIN2INPPGA */
  655. #define WM8983_RIN2INPPGA_SHIFT 5 /* RIN2INPPGA */
  656. #define WM8983_RIN2INPPGA_WIDTH 1 /* RIN2INPPGA */
  657. #define WM8983_RIP2INPPGA 0x0010 /* RIP2INPPGA */
  658. #define WM8983_RIP2INPPGA_MASK 0x0010 /* RIP2INPPGA */
  659. #define WM8983_RIP2INPPGA_SHIFT 4 /* RIP2INPPGA */
  660. #define WM8983_RIP2INPPGA_WIDTH 1 /* RIP2INPPGA */
  661. #define WM8983_L2_2INPPGA 0x0004 /* L2_2INPPGA */
  662. #define WM8983_L2_2INPPGA_MASK 0x0004 /* L2_2INPPGA */
  663. #define WM8983_L2_2INPPGA_SHIFT 2 /* L2_2INPPGA */
  664. #define WM8983_L2_2INPPGA_WIDTH 1 /* L2_2INPPGA */
  665. #define WM8983_LIN2INPPGA 0x0002 /* LIN2INPPGA */
  666. #define WM8983_LIN2INPPGA_MASK 0x0002 /* LIN2INPPGA */
  667. #define WM8983_LIN2INPPGA_SHIFT 1 /* LIN2INPPGA */
  668. #define WM8983_LIN2INPPGA_WIDTH 1 /* LIN2INPPGA */
  669. #define WM8983_LIP2INPPGA 0x0001 /* LIP2INPPGA */
  670. #define WM8983_LIP2INPPGA_MASK 0x0001 /* LIP2INPPGA */
  671. #define WM8983_LIP2INPPGA_SHIFT 0 /* LIP2INPPGA */
  672. #define WM8983_LIP2INPPGA_WIDTH 1 /* LIP2INPPGA */
  673. /*
  674. * R45 (0x2D) - Left INP PGA gain ctrl
  675. */
  676. #define WM8983_INPGAVU 0x0100 /* INPGAVU */
  677. #define WM8983_INPGAVU_MASK 0x0100 /* INPGAVU */
  678. #define WM8983_INPGAVU_SHIFT 8 /* INPGAVU */
  679. #define WM8983_INPGAVU_WIDTH 1 /* INPGAVU */
  680. #define WM8983_INPPGAZCL 0x0080 /* INPPGAZCL */
  681. #define WM8983_INPPGAZCL_MASK 0x0080 /* INPPGAZCL */
  682. #define WM8983_INPPGAZCL_SHIFT 7 /* INPPGAZCL */
  683. #define WM8983_INPPGAZCL_WIDTH 1 /* INPPGAZCL */
  684. #define WM8983_INPPGAMUTEL 0x0040 /* INPPGAMUTEL */
  685. #define WM8983_INPPGAMUTEL_MASK 0x0040 /* INPPGAMUTEL */
  686. #define WM8983_INPPGAMUTEL_SHIFT 6 /* INPPGAMUTEL */
  687. #define WM8983_INPPGAMUTEL_WIDTH 1 /* INPPGAMUTEL */
  688. #define WM8983_INPPGAVOLL_MASK 0x003F /* INPPGAVOLL - [5:0] */
  689. #define WM8983_INPPGAVOLL_SHIFT 0 /* INPPGAVOLL - [5:0] */
  690. #define WM8983_INPPGAVOLL_WIDTH 6 /* INPPGAVOLL - [5:0] */
  691. /*
  692. * R46 (0x2E) - Right INP PGA gain ctrl
  693. */
  694. #define WM8983_INPGAVU 0x0100 /* INPGAVU */
  695. #define WM8983_INPGAVU_MASK 0x0100 /* INPGAVU */
  696. #define WM8983_INPGAVU_SHIFT 8 /* INPGAVU */
  697. #define WM8983_INPGAVU_WIDTH 1 /* INPGAVU */
  698. #define WM8983_INPPGAZCR 0x0080 /* INPPGAZCR */
  699. #define WM8983_INPPGAZCR_MASK 0x0080 /* INPPGAZCR */
  700. #define WM8983_INPPGAZCR_SHIFT 7 /* INPPGAZCR */
  701. #define WM8983_INPPGAZCR_WIDTH 1 /* INPPGAZCR */
  702. #define WM8983_INPPGAMUTER 0x0040 /* INPPGAMUTER */
  703. #define WM8983_INPPGAMUTER_MASK 0x0040 /* INPPGAMUTER */
  704. #define WM8983_INPPGAMUTER_SHIFT 6 /* INPPGAMUTER */
  705. #define WM8983_INPPGAMUTER_WIDTH 1 /* INPPGAMUTER */
  706. #define WM8983_INPPGAVOLR_MASK 0x003F /* INPPGAVOLR - [5:0] */
  707. #define WM8983_INPPGAVOLR_SHIFT 0 /* INPPGAVOLR - [5:0] */
  708. #define WM8983_INPPGAVOLR_WIDTH 6 /* INPPGAVOLR - [5:0] */
  709. /*
  710. * R47 (0x2F) - Left ADC BOOST ctrl
  711. */
  712. #define WM8983_PGABOOSTL 0x0100 /* PGABOOSTL */
  713. #define WM8983_PGABOOSTL_MASK 0x0100 /* PGABOOSTL */
  714. #define WM8983_PGABOOSTL_SHIFT 8 /* PGABOOSTL */
  715. #define WM8983_PGABOOSTL_WIDTH 1 /* PGABOOSTL */
  716. #define WM8983_L2_2BOOSTVOL_MASK 0x0070 /* L2_2BOOSTVOL - [6:4] */
  717. #define WM8983_L2_2BOOSTVOL_SHIFT 4 /* L2_2BOOSTVOL - [6:4] */
  718. #define WM8983_L2_2BOOSTVOL_WIDTH 3 /* L2_2BOOSTVOL - [6:4] */
  719. #define WM8983_AUXL2BOOSTVOL_MASK 0x0007 /* AUXL2BOOSTVOL - [2:0] */
  720. #define WM8983_AUXL2BOOSTVOL_SHIFT 0 /* AUXL2BOOSTVOL - [2:0] */
  721. #define WM8983_AUXL2BOOSTVOL_WIDTH 3 /* AUXL2BOOSTVOL - [2:0] */
  722. /*
  723. * R48 (0x30) - Right ADC BOOST ctrl
  724. */
  725. #define WM8983_PGABOOSTR 0x0100 /* PGABOOSTR */
  726. #define WM8983_PGABOOSTR_MASK 0x0100 /* PGABOOSTR */
  727. #define WM8983_PGABOOSTR_SHIFT 8 /* PGABOOSTR */
  728. #define WM8983_PGABOOSTR_WIDTH 1 /* PGABOOSTR */
  729. #define WM8983_R2_2BOOSTVOL_MASK 0x0070 /* R2_2BOOSTVOL - [6:4] */
  730. #define WM8983_R2_2BOOSTVOL_SHIFT 4 /* R2_2BOOSTVOL - [6:4] */
  731. #define WM8983_R2_2BOOSTVOL_WIDTH 3 /* R2_2BOOSTVOL - [6:4] */
  732. #define WM8983_AUXR2BOOSTVOL_MASK 0x0007 /* AUXR2BOOSTVOL - [2:0] */
  733. #define WM8983_AUXR2BOOSTVOL_SHIFT 0 /* AUXR2BOOSTVOL - [2:0] */
  734. #define WM8983_AUXR2BOOSTVOL_WIDTH 3 /* AUXR2BOOSTVOL - [2:0] */
  735. /*
  736. * R49 (0x31) - Output ctrl
  737. */
  738. #define WM8983_DACL2RMIX 0x0040 /* DACL2RMIX */
  739. #define WM8983_DACL2RMIX_MASK 0x0040 /* DACL2RMIX */
  740. #define WM8983_DACL2RMIX_SHIFT 6 /* DACL2RMIX */
  741. #define WM8983_DACL2RMIX_WIDTH 1 /* DACL2RMIX */
  742. #define WM8983_DACR2LMIX 0x0020 /* DACR2LMIX */
  743. #define WM8983_DACR2LMIX_MASK 0x0020 /* DACR2LMIX */
  744. #define WM8983_DACR2LMIX_SHIFT 5 /* DACR2LMIX */
  745. #define WM8983_DACR2LMIX_WIDTH 1 /* DACR2LMIX */
  746. #define WM8983_OUT4BOOST 0x0010 /* OUT4BOOST */
  747. #define WM8983_OUT4BOOST_MASK 0x0010 /* OUT4BOOST */
  748. #define WM8983_OUT4BOOST_SHIFT 4 /* OUT4BOOST */
  749. #define WM8983_OUT4BOOST_WIDTH 1 /* OUT4BOOST */
  750. #define WM8983_OUT3BOOST 0x0008 /* OUT3BOOST */
  751. #define WM8983_OUT3BOOST_MASK 0x0008 /* OUT3BOOST */
  752. #define WM8983_OUT3BOOST_SHIFT 3 /* OUT3BOOST */
  753. #define WM8983_OUT3BOOST_WIDTH 1 /* OUT3BOOST */
  754. #define WM8983_SPKBOOST 0x0004 /* SPKBOOST */
  755. #define WM8983_SPKBOOST_MASK 0x0004 /* SPKBOOST */
  756. #define WM8983_SPKBOOST_SHIFT 2 /* SPKBOOST */
  757. #define WM8983_SPKBOOST_WIDTH 1 /* SPKBOOST */
  758. #define WM8983_TSDEN 0x0002 /* TSDEN */
  759. #define WM8983_TSDEN_MASK 0x0002 /* TSDEN */
  760. #define WM8983_TSDEN_SHIFT 1 /* TSDEN */
  761. #define WM8983_TSDEN_WIDTH 1 /* TSDEN */
  762. #define WM8983_VROI 0x0001 /* VROI */
  763. #define WM8983_VROI_MASK 0x0001 /* VROI */
  764. #define WM8983_VROI_SHIFT 0 /* VROI */
  765. #define WM8983_VROI_WIDTH 1 /* VROI */
  766. /*
  767. * R50 (0x32) - Left mixer ctrl
  768. */
  769. #define WM8983_AUXLMIXVOL_MASK 0x01C0 /* AUXLMIXVOL - [8:6] */
  770. #define WM8983_AUXLMIXVOL_SHIFT 6 /* AUXLMIXVOL - [8:6] */
  771. #define WM8983_AUXLMIXVOL_WIDTH 3 /* AUXLMIXVOL - [8:6] */
  772. #define WM8983_AUXL2LMIX 0x0020 /* AUXL2LMIX */
  773. #define WM8983_AUXL2LMIX_MASK 0x0020 /* AUXL2LMIX */
  774. #define WM8983_AUXL2LMIX_SHIFT 5 /* AUXL2LMIX */
  775. #define WM8983_AUXL2LMIX_WIDTH 1 /* AUXL2LMIX */
  776. #define WM8983_BYPLMIXVOL_MASK 0x001C /* BYPLMIXVOL - [4:2] */
  777. #define WM8983_BYPLMIXVOL_SHIFT 2 /* BYPLMIXVOL - [4:2] */
  778. #define WM8983_BYPLMIXVOL_WIDTH 3 /* BYPLMIXVOL - [4:2] */
  779. #define WM8983_BYPL2LMIX 0x0002 /* BYPL2LMIX */
  780. #define WM8983_BYPL2LMIX_MASK 0x0002 /* BYPL2LMIX */
  781. #define WM8983_BYPL2LMIX_SHIFT 1 /* BYPL2LMIX */
  782. #define WM8983_BYPL2LMIX_WIDTH 1 /* BYPL2LMIX */
  783. #define WM8983_DACL2LMIX 0x0001 /* DACL2LMIX */
  784. #define WM8983_DACL2LMIX_MASK 0x0001 /* DACL2LMIX */
  785. #define WM8983_DACL2LMIX_SHIFT 0 /* DACL2LMIX */
  786. #define WM8983_DACL2LMIX_WIDTH 1 /* DACL2LMIX */
  787. /*
  788. * R51 (0x33) - Right mixer ctrl
  789. */
  790. #define WM8983_AUXRMIXVOL_MASK 0x01C0 /* AUXRMIXVOL - [8:6] */
  791. #define WM8983_AUXRMIXVOL_SHIFT 6 /* AUXRMIXVOL - [8:6] */
  792. #define WM8983_AUXRMIXVOL_WIDTH 3 /* AUXRMIXVOL - [8:6] */
  793. #define WM8983_AUXR2RMIX 0x0020 /* AUXR2RMIX */
  794. #define WM8983_AUXR2RMIX_MASK 0x0020 /* AUXR2RMIX */
  795. #define WM8983_AUXR2RMIX_SHIFT 5 /* AUXR2RMIX */
  796. #define WM8983_AUXR2RMIX_WIDTH 1 /* AUXR2RMIX */
  797. #define WM8983_BYPRMIXVOL_MASK 0x001C /* BYPRMIXVOL - [4:2] */
  798. #define WM8983_BYPRMIXVOL_SHIFT 2 /* BYPRMIXVOL - [4:2] */
  799. #define WM8983_BYPRMIXVOL_WIDTH 3 /* BYPRMIXVOL - [4:2] */
  800. #define WM8983_BYPR2RMIX 0x0002 /* BYPR2RMIX */
  801. #define WM8983_BYPR2RMIX_MASK 0x0002 /* BYPR2RMIX */
  802. #define WM8983_BYPR2RMIX_SHIFT 1 /* BYPR2RMIX */
  803. #define WM8983_BYPR2RMIX_WIDTH 1 /* BYPR2RMIX */
  804. #define WM8983_DACR2RMIX 0x0001 /* DACR2RMIX */
  805. #define WM8983_DACR2RMIX_MASK 0x0001 /* DACR2RMIX */
  806. #define WM8983_DACR2RMIX_SHIFT 0 /* DACR2RMIX */
  807. #define WM8983_DACR2RMIX_WIDTH 1 /* DACR2RMIX */
  808. /*
  809. * R52 (0x34) - LOUT1 (HP) volume ctrl
  810. */
  811. #define WM8983_OUT1VU 0x0100 /* OUT1VU */
  812. #define WM8983_OUT1VU_MASK 0x0100 /* OUT1VU */
  813. #define WM8983_OUT1VU_SHIFT 8 /* OUT1VU */
  814. #define WM8983_OUT1VU_WIDTH 1 /* OUT1VU */
  815. #define WM8983_LOUT1ZC 0x0080 /* LOUT1ZC */
  816. #define WM8983_LOUT1ZC_MASK 0x0080 /* LOUT1ZC */
  817. #define WM8983_LOUT1ZC_SHIFT 7 /* LOUT1ZC */
  818. #define WM8983_LOUT1ZC_WIDTH 1 /* LOUT1ZC */
  819. #define WM8983_LOUT1MUTE 0x0040 /* LOUT1MUTE */
  820. #define WM8983_LOUT1MUTE_MASK 0x0040 /* LOUT1MUTE */
  821. #define WM8983_LOUT1MUTE_SHIFT 6 /* LOUT1MUTE */
  822. #define WM8983_LOUT1MUTE_WIDTH 1 /* LOUT1MUTE */
  823. #define WM8983_LOUT1VOL_MASK 0x003F /* LOUT1VOL - [5:0] */
  824. #define WM8983_LOUT1VOL_SHIFT 0 /* LOUT1VOL - [5:0] */
  825. #define WM8983_LOUT1VOL_WIDTH 6 /* LOUT1VOL - [5:0] */
  826. /*
  827. * R53 (0x35) - ROUT1 (HP) volume ctrl
  828. */
  829. #define WM8983_OUT1VU 0x0100 /* OUT1VU */
  830. #define WM8983_OUT1VU_MASK 0x0100 /* OUT1VU */
  831. #define WM8983_OUT1VU_SHIFT 8 /* OUT1VU */
  832. #define WM8983_OUT1VU_WIDTH 1 /* OUT1VU */
  833. #define WM8983_ROUT1ZC 0x0080 /* ROUT1ZC */
  834. #define WM8983_ROUT1ZC_MASK 0x0080 /* ROUT1ZC */
  835. #define WM8983_ROUT1ZC_SHIFT 7 /* ROUT1ZC */
  836. #define WM8983_ROUT1ZC_WIDTH 1 /* ROUT1ZC */
  837. #define WM8983_ROUT1MUTE 0x0040 /* ROUT1MUTE */
  838. #define WM8983_ROUT1MUTE_MASK 0x0040 /* ROUT1MUTE */
  839. #define WM8983_ROUT1MUTE_SHIFT 6 /* ROUT1MUTE */
  840. #define WM8983_ROUT1MUTE_WIDTH 1 /* ROUT1MUTE */
  841. #define WM8983_ROUT1VOL_MASK 0x003F /* ROUT1VOL - [5:0] */
  842. #define WM8983_ROUT1VOL_SHIFT 0 /* ROUT1VOL - [5:0] */
  843. #define WM8983_ROUT1VOL_WIDTH 6 /* ROUT1VOL - [5:0] */
  844. /*
  845. * R54 (0x36) - LOUT2 (SPK) volume ctrl
  846. */
  847. #define WM8983_OUT2VU 0x0100 /* OUT2VU */
  848. #define WM8983_OUT2VU_MASK 0x0100 /* OUT2VU */
  849. #define WM8983_OUT2VU_SHIFT 8 /* OUT2VU */
  850. #define WM8983_OUT2VU_WIDTH 1 /* OUT2VU */
  851. #define WM8983_LOUT2ZC 0x0080 /* LOUT2ZC */
  852. #define WM8983_LOUT2ZC_MASK 0x0080 /* LOUT2ZC */
  853. #define WM8983_LOUT2ZC_SHIFT 7 /* LOUT2ZC */
  854. #define WM8983_LOUT2ZC_WIDTH 1 /* LOUT2ZC */
  855. #define WM8983_LOUT2MUTE 0x0040 /* LOUT2MUTE */
  856. #define WM8983_LOUT2MUTE_MASK 0x0040 /* LOUT2MUTE */
  857. #define WM8983_LOUT2MUTE_SHIFT 6 /* LOUT2MUTE */
  858. #define WM8983_LOUT2MUTE_WIDTH 1 /* LOUT2MUTE */
  859. #define WM8983_LOUT2VOL_MASK 0x003F /* LOUT2VOL - [5:0] */
  860. #define WM8983_LOUT2VOL_SHIFT 0 /* LOUT2VOL - [5:0] */
  861. #define WM8983_LOUT2VOL_WIDTH 6 /* LOUT2VOL - [5:0] */
  862. /*
  863. * R55 (0x37) - ROUT2 (SPK) volume ctrl
  864. */
  865. #define WM8983_OUT2VU 0x0100 /* OUT2VU */
  866. #define WM8983_OUT2VU_MASK 0x0100 /* OUT2VU */
  867. #define WM8983_OUT2VU_SHIFT 8 /* OUT2VU */
  868. #define WM8983_OUT2VU_WIDTH 1 /* OUT2VU */
  869. #define WM8983_ROUT2ZC 0x0080 /* ROUT2ZC */
  870. #define WM8983_ROUT2ZC_MASK 0x0080 /* ROUT2ZC */
  871. #define WM8983_ROUT2ZC_SHIFT 7 /* ROUT2ZC */
  872. #define WM8983_ROUT2ZC_WIDTH 1 /* ROUT2ZC */
  873. #define WM8983_ROUT2MUTE 0x0040 /* ROUT2MUTE */
  874. #define WM8983_ROUT2MUTE_MASK 0x0040 /* ROUT2MUTE */
  875. #define WM8983_ROUT2MUTE_SHIFT 6 /* ROUT2MUTE */
  876. #define WM8983_ROUT2MUTE_WIDTH 1 /* ROUT2MUTE */
  877. #define WM8983_ROUT2VOL_MASK 0x003F /* ROUT2VOL - [5:0] */
  878. #define WM8983_ROUT2VOL_SHIFT 0 /* ROUT2VOL - [5:0] */
  879. #define WM8983_ROUT2VOL_WIDTH 6 /* ROUT2VOL - [5:0] */
  880. /*
  881. * R56 (0x38) - OUT3 mixer ctrl
  882. */
  883. #define WM8983_OUT3MUTE 0x0040 /* OUT3MUTE */
  884. #define WM8983_OUT3MUTE_MASK 0x0040 /* OUT3MUTE */
  885. #define WM8983_OUT3MUTE_SHIFT 6 /* OUT3MUTE */
  886. #define WM8983_OUT3MUTE_WIDTH 1 /* OUT3MUTE */
  887. #define WM8983_OUT4_2OUT3 0x0008 /* OUT4_2OUT3 */
  888. #define WM8983_OUT4_2OUT3_MASK 0x0008 /* OUT4_2OUT3 */
  889. #define WM8983_OUT4_2OUT3_SHIFT 3 /* OUT4_2OUT3 */
  890. #define WM8983_OUT4_2OUT3_WIDTH 1 /* OUT4_2OUT3 */
  891. #define WM8983_BYPL2OUT3 0x0004 /* BYPL2OUT3 */
  892. #define WM8983_BYPL2OUT3_MASK 0x0004 /* BYPL2OUT3 */
  893. #define WM8983_BYPL2OUT3_SHIFT 2 /* BYPL2OUT3 */
  894. #define WM8983_BYPL2OUT3_WIDTH 1 /* BYPL2OUT3 */
  895. #define WM8983_LMIX2OUT3 0x0002 /* LMIX2OUT3 */
  896. #define WM8983_LMIX2OUT3_MASK 0x0002 /* LMIX2OUT3 */
  897. #define WM8983_LMIX2OUT3_SHIFT 1 /* LMIX2OUT3 */
  898. #define WM8983_LMIX2OUT3_WIDTH 1 /* LMIX2OUT3 */
  899. #define WM8983_LDAC2OUT3 0x0001 /* LDAC2OUT3 */
  900. #define WM8983_LDAC2OUT3_MASK 0x0001 /* LDAC2OUT3 */
  901. #define WM8983_LDAC2OUT3_SHIFT 0 /* LDAC2OUT3 */
  902. #define WM8983_LDAC2OUT3_WIDTH 1 /* LDAC2OUT3 */
  903. /*
  904. * R57 (0x39) - OUT4 (MONO) mix ctrl
  905. */
  906. #define WM8983_OUT3_2OUT4 0x0080 /* OUT3_2OUT4 */
  907. #define WM8983_OUT3_2OUT4_MASK 0x0080 /* OUT3_2OUT4 */
  908. #define WM8983_OUT3_2OUT4_SHIFT 7 /* OUT3_2OUT4 */
  909. #define WM8983_OUT3_2OUT4_WIDTH 1 /* OUT3_2OUT4 */
  910. #define WM8983_OUT4MUTE 0x0040 /* OUT4MUTE */
  911. #define WM8983_OUT4MUTE_MASK 0x0040 /* OUT4MUTE */
  912. #define WM8983_OUT4MUTE_SHIFT 6 /* OUT4MUTE */
  913. #define WM8983_OUT4MUTE_WIDTH 1 /* OUT4MUTE */
  914. #define WM8983_OUT4ATTN 0x0020 /* OUT4ATTN */
  915. #define WM8983_OUT4ATTN_MASK 0x0020 /* OUT4ATTN */
  916. #define WM8983_OUT4ATTN_SHIFT 5 /* OUT4ATTN */
  917. #define WM8983_OUT4ATTN_WIDTH 1 /* OUT4ATTN */
  918. #define WM8983_LMIX2OUT4 0x0010 /* LMIX2OUT4 */
  919. #define WM8983_LMIX2OUT4_MASK 0x0010 /* LMIX2OUT4 */
  920. #define WM8983_LMIX2OUT4_SHIFT 4 /* LMIX2OUT4 */
  921. #define WM8983_LMIX2OUT4_WIDTH 1 /* LMIX2OUT4 */
  922. #define WM8983_LDAC2OUT4 0x0008 /* LDAC2OUT4 */
  923. #define WM8983_LDAC2OUT4_MASK 0x0008 /* LDAC2OUT4 */
  924. #define WM8983_LDAC2OUT4_SHIFT 3 /* LDAC2OUT4 */
  925. #define WM8983_LDAC2OUT4_WIDTH 1 /* LDAC2OUT4 */
  926. #define WM8983_BYPR2OUT4 0x0004 /* BYPR2OUT4 */
  927. #define WM8983_BYPR2OUT4_MASK 0x0004 /* BYPR2OUT4 */
  928. #define WM8983_BYPR2OUT4_SHIFT 2 /* BYPR2OUT4 */
  929. #define WM8983_BYPR2OUT4_WIDTH 1 /* BYPR2OUT4 */
  930. #define WM8983_RMIX2OUT4 0x0002 /* RMIX2OUT4 */
  931. #define WM8983_RMIX2OUT4_MASK 0x0002 /* RMIX2OUT4 */
  932. #define WM8983_RMIX2OUT4_SHIFT 1 /* RMIX2OUT4 */
  933. #define WM8983_RMIX2OUT4_WIDTH 1 /* RMIX2OUT4 */
  934. #define WM8983_RDAC2OUT4 0x0001 /* RDAC2OUT4 */
  935. #define WM8983_RDAC2OUT4_MASK 0x0001 /* RDAC2OUT4 */
  936. #define WM8983_RDAC2OUT4_SHIFT 0 /* RDAC2OUT4 */
  937. #define WM8983_RDAC2OUT4_WIDTH 1 /* RDAC2OUT4 */
  938. /*
  939. * R61 (0x3D) - BIAS CTRL
  940. */
  941. #define WM8983_BIASCUT 0x0100 /* BIASCUT */
  942. #define WM8983_BIASCUT_MASK 0x0100 /* BIASCUT */
  943. #define WM8983_BIASCUT_SHIFT 8 /* BIASCUT */
  944. #define WM8983_BIASCUT_WIDTH 1 /* BIASCUT */
  945. #define WM8983_HALFIPBIAS 0x0080 /* HALFIPBIAS */
  946. #define WM8983_HALFIPBIAS_MASK 0x0080 /* HALFIPBIAS */
  947. #define WM8983_HALFIPBIAS_SHIFT 7 /* HALFIPBIAS */
  948. #define WM8983_HALFIPBIAS_WIDTH 1 /* HALFIPBIAS */
  949. #define WM8983_VBBIASTST_MASK 0x0060 /* VBBIASTST - [6:5] */
  950. #define WM8983_VBBIASTST_SHIFT 5 /* VBBIASTST - [6:5] */
  951. #define WM8983_VBBIASTST_WIDTH 2 /* VBBIASTST - [6:5] */
  952. #define WM8983_BUFBIAS_MASK 0x0018 /* BUFBIAS - [4:3] */
  953. #define WM8983_BUFBIAS_SHIFT 3 /* BUFBIAS - [4:3] */
  954. #define WM8983_BUFBIAS_WIDTH 2 /* BUFBIAS - [4:3] */
  955. #define WM8983_ADCBIAS_MASK 0x0006 /* ADCBIAS - [2:1] */
  956. #define WM8983_ADCBIAS_SHIFT 1 /* ADCBIAS - [2:1] */
  957. #define WM8983_ADCBIAS_WIDTH 2 /* ADCBIAS - [2:1] */
  958. #define WM8983_HALFOPBIAS 0x0001 /* HALFOPBIAS */
  959. #define WM8983_HALFOPBIAS_MASK 0x0001 /* HALFOPBIAS */
  960. #define WM8983_HALFOPBIAS_SHIFT 0 /* HALFOPBIAS */
  961. #define WM8983_HALFOPBIAS_WIDTH 1 /* HALFOPBIAS */
  962. enum clk_src {
  963. WM8983_CLKSRC_MCLK,
  964. WM8983_CLKSRC_PLL
  965. };
  966. #endif /* _WM8983_H */