wm8960.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * wm8960.c -- WM8960 ALSA SoC Audio driver
  4. *
  5. * Copyright 2007-11 Wolfson Microelectronics, plc
  6. *
  7. * Author: Liam Girdwood
  8. */
  9. #include <linux/module.h>
  10. #include <linux/moduleparam.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/pm.h>
  14. #include <linux/clk.h>
  15. #include <linux/i2c.h>
  16. #include <linux/acpi.h>
  17. #include <linux/slab.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <sound/initval.h>
  23. #include <sound/tlv.h>
  24. #include <sound/wm8960.h>
  25. #include "wm8960.h"
  26. /* R25 - Power 1 */
  27. #define WM8960_VMID_MASK 0x180
  28. #define WM8960_VREF 0x40
  29. /* R26 - Power 2 */
  30. #define WM8960_PWR2_LOUT1 0x40
  31. #define WM8960_PWR2_ROUT1 0x20
  32. #define WM8960_PWR2_OUT3 0x02
  33. /* R28 - Anti-pop 1 */
  34. #define WM8960_POBCTRL 0x80
  35. #define WM8960_BUFDCOPEN 0x10
  36. #define WM8960_BUFIOEN 0x08
  37. #define WM8960_SOFT_ST 0x04
  38. #define WM8960_HPSTBY 0x01
  39. /* R29 - Anti-pop 2 */
  40. #define WM8960_DISOP 0x40
  41. #define WM8960_DRES_MASK 0x30
  42. #define WM8960_DSCH_TOUT 600 /* discharge timeout, ms */
  43. static bool is_pll_freq_available(unsigned int source, unsigned int target);
  44. static int wm8960_set_pll(struct snd_soc_component *component,
  45. unsigned int freq_in, unsigned int freq_out);
  46. /*
  47. * wm8960 register cache
  48. * We can't read the WM8960 register space when we are
  49. * using 2 wire for device control, so we cache them instead.
  50. */
  51. static const struct reg_default wm8960_reg_defaults[] = {
  52. { 0x0, 0x00a7 },
  53. { 0x1, 0x00a7 },
  54. { 0x2, 0x0000 },
  55. { 0x3, 0x0000 },
  56. { 0x4, 0x0000 },
  57. { 0x5, 0x0008 },
  58. { 0x6, 0x0000 },
  59. { 0x7, 0x000a },
  60. { 0x8, 0x01c0 },
  61. { 0x9, 0x0000 },
  62. { 0xa, 0x00ff },
  63. { 0xb, 0x00ff },
  64. { 0x10, 0x0000 },
  65. { 0x11, 0x007b },
  66. { 0x12, 0x0100 },
  67. { 0x13, 0x0032 },
  68. { 0x14, 0x0000 },
  69. { 0x15, 0x00c3 },
  70. { 0x16, 0x00c3 },
  71. { 0x17, 0x01c0 },
  72. { 0x18, 0x0000 },
  73. { 0x19, 0x0000 },
  74. { 0x1a, 0x0000 },
  75. { 0x1b, 0x0000 },
  76. { 0x1c, 0x0000 },
  77. { 0x1d, 0x0000 },
  78. { 0x20, 0x0100 },
  79. { 0x21, 0x0100 },
  80. { 0x22, 0x0050 },
  81. { 0x25, 0x0050 },
  82. { 0x26, 0x0000 },
  83. { 0x27, 0x0000 },
  84. { 0x28, 0x0000 },
  85. { 0x29, 0x0000 },
  86. { 0x2a, 0x0040 },
  87. { 0x2b, 0x0000 },
  88. { 0x2c, 0x0000 },
  89. { 0x2d, 0x0050 },
  90. { 0x2e, 0x0050 },
  91. { 0x2f, 0x0000 },
  92. { 0x30, 0x0002 },
  93. { 0x31, 0x0037 },
  94. { 0x33, 0x0080 },
  95. { 0x34, 0x0008 },
  96. { 0x35, 0x0031 },
  97. { 0x36, 0x0026 },
  98. { 0x37, 0x00e9 },
  99. };
  100. static bool wm8960_volatile(struct device *dev, unsigned int reg)
  101. {
  102. switch (reg) {
  103. case WM8960_RESET:
  104. return true;
  105. default:
  106. return false;
  107. }
  108. }
  109. struct wm8960_priv {
  110. struct clk *mclk;
  111. struct regmap *regmap;
  112. int (*set_bias_level)(struct snd_soc_component *,
  113. enum snd_soc_bias_level level);
  114. struct snd_soc_dapm_widget *lout1;
  115. struct snd_soc_dapm_widget *rout1;
  116. struct snd_soc_dapm_widget *out3;
  117. bool deemph;
  118. int lrclk;
  119. int bclk;
  120. int sysclk;
  121. int clk_id;
  122. int freq_in;
  123. bool is_stream_in_use[2];
  124. struct wm8960_data pdata;
  125. ktime_t dsch_start;
  126. };
  127. #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
  128. /* enumerated controls */
  129. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  130. "Right Inverted", "Stereo Inversion"};
  131. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  132. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  133. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  134. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  135. static const char *wm8960_adc_data_output_sel[] = {
  136. "Left Data = Left ADC; Right Data = Right ADC",
  137. "Left Data = Left ADC; Right Data = Left ADC",
  138. "Left Data = Right ADC; Right Data = Right ADC",
  139. "Left Data = Right ADC; Right Data = Left ADC",
  140. };
  141. static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
  142. static const struct soc_enum wm8960_enum[] = {
  143. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  144. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  145. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  146. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  147. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  148. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  149. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
  150. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
  151. };
  152. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  153. static int wm8960_set_deemph(struct snd_soc_component *component)
  154. {
  155. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  156. int val, i, best;
  157. /* If we're using deemphasis select the nearest available sample
  158. * rate.
  159. */
  160. if (wm8960->deemph) {
  161. best = 1;
  162. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  163. if (abs(deemph_settings[i] - wm8960->lrclk) <
  164. abs(deemph_settings[best] - wm8960->lrclk))
  165. best = i;
  166. }
  167. val = best << 1;
  168. } else {
  169. val = 0;
  170. }
  171. dev_dbg(component->dev, "Set deemphasis %d\n", val);
  172. return snd_soc_component_update_bits(component, WM8960_DACCTL1,
  173. 0x6, val);
  174. }
  175. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  176. struct snd_ctl_elem_value *ucontrol)
  177. {
  178. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  179. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  180. ucontrol->value.integer.value[0] = wm8960->deemph;
  181. return 0;
  182. }
  183. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  184. struct snd_ctl_elem_value *ucontrol)
  185. {
  186. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  187. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  188. unsigned int deemph = ucontrol->value.integer.value[0];
  189. if (deemph > 1)
  190. return -EINVAL;
  191. wm8960->deemph = deemph;
  192. return wm8960_set_deemph(component);
  193. }
  194. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  195. static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
  196. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  197. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  198. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  199. static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
  200. static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
  201. 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
  202. 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
  203. );
  204. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  205. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  206. 0, 63, 0, inpga_tlv),
  207. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  208. 6, 1, 0),
  209. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  210. 7, 1, 1),
  211. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
  212. WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
  213. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
  214. WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
  215. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
  216. WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
  217. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
  218. WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
  219. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
  220. WM8960_RINPATH, 4, 3, 0, micboost_tlv),
  221. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
  222. WM8960_LINPATH, 4, 3, 0, micboost_tlv),
  223. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  224. 0, 255, 0, dac_tlv),
  225. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  226. 0, 127, 0, out_tlv),
  227. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  228. 7, 1, 0),
  229. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  230. 0, 127, 0, out_tlv),
  231. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  232. 7, 1, 0),
  233. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  234. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  235. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  236. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  237. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  238. SOC_ENUM("DAC Polarity", wm8960_enum[1]),
  239. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  240. wm8960_get_deemph, wm8960_put_deemph),
  241. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  242. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  243. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  244. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  245. SOC_ENUM("ALC Function", wm8960_enum[4]),
  246. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  247. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  248. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  249. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  250. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  251. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  252. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  253. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  254. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  255. SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
  256. 0, 255, 0, adc_tlv),
  257. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  258. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  259. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  260. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  261. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  262. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  263. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  264. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  265. SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
  266. SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
  267. };
  268. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  269. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  270. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  271. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  272. };
  273. static const struct snd_kcontrol_new wm8960_lin[] = {
  274. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  275. };
  276. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  277. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  278. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  279. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  280. };
  281. static const struct snd_kcontrol_new wm8960_rin[] = {
  282. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  283. };
  284. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  285. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  286. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  287. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  288. };
  289. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  290. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  291. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  292. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  293. };
  294. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  295. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  296. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  297. };
  298. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  299. SND_SOC_DAPM_INPUT("LINPUT1"),
  300. SND_SOC_DAPM_INPUT("RINPUT1"),
  301. SND_SOC_DAPM_INPUT("LINPUT2"),
  302. SND_SOC_DAPM_INPUT("RINPUT2"),
  303. SND_SOC_DAPM_INPUT("LINPUT3"),
  304. SND_SOC_DAPM_INPUT("RINPUT3"),
  305. SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
  306. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  307. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  308. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  309. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  310. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  311. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  312. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  313. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  314. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
  315. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
  316. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  317. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  318. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  319. &wm8960_loutput_mixer[0],
  320. ARRAY_SIZE(wm8960_loutput_mixer)),
  321. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  322. &wm8960_routput_mixer[0],
  323. ARRAY_SIZE(wm8960_routput_mixer)),
  324. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  325. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  326. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  327. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  328. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  329. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  330. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  331. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  332. SND_SOC_DAPM_OUTPUT("HP_L"),
  333. SND_SOC_DAPM_OUTPUT("HP_R"),
  334. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  335. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  336. SND_SOC_DAPM_OUTPUT("OUT3"),
  337. };
  338. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  339. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  340. &wm8960_mono_out[0],
  341. ARRAY_SIZE(wm8960_mono_out)),
  342. };
  343. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  344. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  345. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  346. };
  347. static const struct snd_soc_dapm_route audio_paths[] = {
  348. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  349. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  350. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  351. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
  352. { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
  353. { "Left Input Mixer", NULL, "LINPUT2" },
  354. { "Left Input Mixer", NULL, "LINPUT3" },
  355. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  356. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  357. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  358. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
  359. { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
  360. { "Right Input Mixer", NULL, "RINPUT2" },
  361. { "Right Input Mixer", NULL, "RINPUT3" },
  362. { "Left ADC", NULL, "Left Input Mixer" },
  363. { "Right ADC", NULL, "Right Input Mixer" },
  364. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  365. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
  366. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  367. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  368. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
  369. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  370. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  371. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  372. { "HP_L", NULL, "LOUT1 PGA" },
  373. { "HP_R", NULL, "ROUT1 PGA" },
  374. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  375. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  376. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  377. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  378. { "SPK_LN", NULL, "Left Speaker Output" },
  379. { "SPK_LP", NULL, "Left Speaker Output" },
  380. { "SPK_RN", NULL, "Right Speaker Output" },
  381. { "SPK_RP", NULL, "Right Speaker Output" },
  382. };
  383. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  384. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  385. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  386. { "OUT3", NULL, "Mono Output Mixer", }
  387. };
  388. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  389. { "HP_L", NULL, "OUT3 VMID" },
  390. { "HP_R", NULL, "OUT3 VMID" },
  391. { "OUT3 VMID", NULL, "Left Output Mixer" },
  392. { "OUT3 VMID", NULL, "Right Output Mixer" },
  393. };
  394. static int wm8960_add_widgets(struct snd_soc_component *component)
  395. {
  396. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  397. struct wm8960_data *pdata = &wm8960->pdata;
  398. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  399. struct snd_soc_dapm_widget *w;
  400. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
  401. ARRAY_SIZE(wm8960_dapm_widgets));
  402. snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
  403. /* In capless mode OUT3 is used to provide VMID for the
  404. * headphone outputs, otherwise it is used as a mono mixer.
  405. */
  406. if (pdata && pdata->capless) {
  407. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
  408. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  409. snd_soc_dapm_add_routes(dapm, audio_paths_capless,
  410. ARRAY_SIZE(audio_paths_capless));
  411. } else {
  412. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
  413. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  414. snd_soc_dapm_add_routes(dapm, audio_paths_out3,
  415. ARRAY_SIZE(audio_paths_out3));
  416. }
  417. /* We need to power up the headphone output stage out of
  418. * sequence for capless mode. To save scanning the widget
  419. * list each time to find the desired power state do so now
  420. * and save the result.
  421. */
  422. list_for_each_entry(w, &component->card->widgets, list) {
  423. if (w->dapm != dapm)
  424. continue;
  425. if (strcmp(w->name, "LOUT1 PGA") == 0)
  426. wm8960->lout1 = w;
  427. if (strcmp(w->name, "ROUT1 PGA") == 0)
  428. wm8960->rout1 = w;
  429. if (strcmp(w->name, "OUT3 VMID") == 0)
  430. wm8960->out3 = w;
  431. }
  432. return 0;
  433. }
  434. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  435. unsigned int fmt)
  436. {
  437. struct snd_soc_component *component = codec_dai->component;
  438. u16 iface = 0;
  439. /* set master/slave audio interface */
  440. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  441. case SND_SOC_DAIFMT_CBM_CFM:
  442. iface |= 0x0040;
  443. break;
  444. case SND_SOC_DAIFMT_CBS_CFS:
  445. break;
  446. default:
  447. return -EINVAL;
  448. }
  449. /* interface format */
  450. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  451. case SND_SOC_DAIFMT_I2S:
  452. iface |= 0x0002;
  453. break;
  454. case SND_SOC_DAIFMT_RIGHT_J:
  455. break;
  456. case SND_SOC_DAIFMT_LEFT_J:
  457. iface |= 0x0001;
  458. break;
  459. case SND_SOC_DAIFMT_DSP_A:
  460. iface |= 0x0003;
  461. break;
  462. case SND_SOC_DAIFMT_DSP_B:
  463. iface |= 0x0013;
  464. break;
  465. default:
  466. return -EINVAL;
  467. }
  468. /* clock inversion */
  469. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  470. case SND_SOC_DAIFMT_NB_NF:
  471. break;
  472. case SND_SOC_DAIFMT_IB_IF:
  473. iface |= 0x0090;
  474. break;
  475. case SND_SOC_DAIFMT_IB_NF:
  476. iface |= 0x0080;
  477. break;
  478. case SND_SOC_DAIFMT_NB_IF:
  479. iface |= 0x0010;
  480. break;
  481. default:
  482. return -EINVAL;
  483. }
  484. /* set iface */
  485. snd_soc_component_write(component, WM8960_IFACE1, iface);
  486. return 0;
  487. }
  488. static struct {
  489. int rate;
  490. unsigned int val;
  491. } alc_rates[] = {
  492. { 48000, 0 },
  493. { 44100, 0 },
  494. { 32000, 1 },
  495. { 22050, 2 },
  496. { 24000, 2 },
  497. { 16000, 3 },
  498. { 11025, 4 },
  499. { 12000, 4 },
  500. { 8000, 5 },
  501. };
  502. /* -1 for reserved value */
  503. static const int sysclk_divs[] = { 1, -1, 2, -1 };
  504. /* Multiply 256 for internal 256 div */
  505. static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
  506. /* Multiply 10 to eliminate decimials */
  507. static const int bclk_divs[] = {
  508. 10, 15, 20, 30, 40, 55, 60, 80, 110,
  509. 120, 160, 220, 240, 320, 320, 320
  510. };
  511. /**
  512. * wm8960_configure_sysclk - checks if there is a sysclk frequency available
  513. * The sysclk must be chosen such that:
  514. * - sysclk = MCLK / sysclk_divs
  515. * - lrclk = sysclk / dac_divs
  516. * - 10 * bclk = sysclk / bclk_divs
  517. *
  518. * @wm8960: codec private data
  519. * @mclk: MCLK used to derive sysclk
  520. * @sysclk_idx: sysclk_divs index for found sysclk
  521. * @dac_idx: dac_divs index for found lrclk
  522. * @bclk_idx: bclk_divs index for found bclk
  523. *
  524. * Returns:
  525. * -1, in case no sysclk frequency available found
  526. * >=0, in case we could derive bclk and lrclk from sysclk using
  527. * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
  528. */
  529. static
  530. int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
  531. int *sysclk_idx, int *dac_idx, int *bclk_idx)
  532. {
  533. int sysclk, bclk, lrclk;
  534. int i, j, k;
  535. int diff;
  536. /* marker for no match */
  537. *bclk_idx = -1;
  538. bclk = wm8960->bclk;
  539. lrclk = wm8960->lrclk;
  540. /* check if the sysclk frequency is available. */
  541. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  542. if (sysclk_divs[i] == -1)
  543. continue;
  544. sysclk = mclk / sysclk_divs[i];
  545. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  546. if (sysclk != dac_divs[j] * lrclk)
  547. continue;
  548. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
  549. diff = sysclk - bclk * bclk_divs[k] / 10;
  550. if (diff == 0) {
  551. *sysclk_idx = i;
  552. *dac_idx = j;
  553. *bclk_idx = k;
  554. break;
  555. }
  556. }
  557. if (k != ARRAY_SIZE(bclk_divs))
  558. break;
  559. }
  560. if (j != ARRAY_SIZE(dac_divs))
  561. break;
  562. }
  563. return *bclk_idx;
  564. }
  565. /**
  566. * wm8960_configure_pll - checks if there is a PLL out frequency available
  567. * The PLL out frequency must be chosen such that:
  568. * - sysclk = lrclk * dac_divs
  569. * - freq_out = sysclk * sysclk_divs
  570. * - 10 * sysclk = bclk * bclk_divs
  571. *
  572. * If we cannot find an exact match for (sysclk, lrclk, bclk)
  573. * triplet, we relax the bclk such that bclk is chosen as the
  574. * closest available frequency greater than expected bclk.
  575. *
  576. * @component: component structure
  577. * @freq_in: input frequency used to derive freq out via PLL
  578. * @sysclk_idx: sysclk_divs index for found sysclk
  579. * @dac_idx: dac_divs index for found lrclk
  580. * @bclk_idx: bclk_divs index for found bclk
  581. *
  582. * Returns:
  583. * < 0, in case no PLL frequency out available was found
  584. * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
  585. * (@sysclk_idx, @dac_idx, @bclk_idx) dividers
  586. */
  587. static
  588. int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
  589. int *sysclk_idx, int *dac_idx, int *bclk_idx)
  590. {
  591. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  592. int sysclk, bclk, lrclk, freq_out;
  593. int diff, closest, best_freq_out;
  594. int i, j, k;
  595. bclk = wm8960->bclk;
  596. lrclk = wm8960->lrclk;
  597. closest = freq_in;
  598. best_freq_out = -EINVAL;
  599. *sysclk_idx = *dac_idx = *bclk_idx = -1;
  600. /*
  601. * From Datasheet, the PLL performs best when f2 is between
  602. * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz
  603. * or 12.288MHz, then sysclkdiv = 2 is the best choice.
  604. * So search sysclk_divs from 2 to 1 other than from 1 to 2.
  605. */
  606. for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) {
  607. if (sysclk_divs[i] == -1)
  608. continue;
  609. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  610. sysclk = lrclk * dac_divs[j];
  611. freq_out = sysclk * sysclk_divs[i];
  612. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
  613. if (!is_pll_freq_available(freq_in, freq_out))
  614. continue;
  615. diff = sysclk - bclk * bclk_divs[k] / 10;
  616. if (diff == 0) {
  617. *sysclk_idx = i;
  618. *dac_idx = j;
  619. *bclk_idx = k;
  620. return freq_out;
  621. }
  622. if (diff > 0 && closest > diff) {
  623. *sysclk_idx = i;
  624. *dac_idx = j;
  625. *bclk_idx = k;
  626. closest = diff;
  627. best_freq_out = freq_out;
  628. }
  629. }
  630. }
  631. }
  632. return best_freq_out;
  633. }
  634. static int wm8960_configure_clocking(struct snd_soc_component *component)
  635. {
  636. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  637. int freq_out, freq_in;
  638. u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1);
  639. int i, j, k;
  640. int ret;
  641. /*
  642. * For Slave mode clocking should still be configured,
  643. * so this if statement should be removed, but some platform
  644. * may not work if the sysclk is not configured, to avoid such
  645. * compatible issue, just add '!wm8960->sysclk' condition in
  646. * this if statement.
  647. */
  648. if (!(iface1 & (1 << 6)) && !wm8960->sysclk) {
  649. dev_warn(component->dev,
  650. "slave mode, but proceeding with no clock configuration\n");
  651. return 0;
  652. }
  653. if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
  654. dev_err(component->dev, "No MCLK configured\n");
  655. return -EINVAL;
  656. }
  657. freq_in = wm8960->freq_in;
  658. /*
  659. * If it's sysclk auto mode, check if the MCLK can provide sysclk or
  660. * not. If MCLK can provide sysclk, using MCLK to provide sysclk
  661. * directly. Otherwise, auto select a available pll out frequency
  662. * and set PLL.
  663. */
  664. if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
  665. /* disable the PLL and using MCLK to provide sysclk */
  666. wm8960_set_pll(component, 0, 0);
  667. freq_out = freq_in;
  668. } else if (wm8960->sysclk) {
  669. freq_out = wm8960->sysclk;
  670. } else {
  671. dev_err(component->dev, "No SYSCLK configured\n");
  672. return -EINVAL;
  673. }
  674. if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
  675. ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
  676. if (ret >= 0) {
  677. goto configure_clock;
  678. } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
  679. dev_err(component->dev, "failed to configure clock\n");
  680. return -EINVAL;
  681. }
  682. }
  683. freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
  684. if (freq_out < 0) {
  685. dev_err(component->dev, "failed to configure clock via PLL\n");
  686. return freq_out;
  687. }
  688. wm8960_set_pll(component, freq_in, freq_out);
  689. configure_clock:
  690. /* configure sysclk clock */
  691. snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
  692. /* configure frame clock */
  693. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
  694. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
  695. /* configure bit clock */
  696. snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
  697. return 0;
  698. }
  699. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  700. struct snd_pcm_hw_params *params,
  701. struct snd_soc_dai *dai)
  702. {
  703. struct snd_soc_component *component = dai->component;
  704. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  705. u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3;
  706. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  707. int i;
  708. wm8960->bclk = snd_soc_params_to_bclk(params);
  709. if (params_channels(params) == 1)
  710. wm8960->bclk *= 2;
  711. /* bit size */
  712. switch (params_width(params)) {
  713. case 16:
  714. break;
  715. case 20:
  716. iface |= 0x0004;
  717. break;
  718. case 24:
  719. iface |= 0x0008;
  720. break;
  721. case 32:
  722. /* right justify mode does not support 32 word length */
  723. if ((iface & 0x3) != 0) {
  724. iface |= 0x000c;
  725. break;
  726. }
  727. fallthrough;
  728. default:
  729. dev_err(component->dev, "unsupported width %d\n",
  730. params_width(params));
  731. return -EINVAL;
  732. }
  733. wm8960->lrclk = params_rate(params);
  734. /* Update filters for the new rate */
  735. if (tx) {
  736. wm8960_set_deemph(component);
  737. } else {
  738. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  739. if (alc_rates[i].rate == params_rate(params))
  740. snd_soc_component_update_bits(component,
  741. WM8960_ADDCTL3, 0x7,
  742. alc_rates[i].val);
  743. }
  744. /* set iface */
  745. snd_soc_component_write(component, WM8960_IFACE1, iface);
  746. wm8960->is_stream_in_use[tx] = true;
  747. if (!wm8960->is_stream_in_use[!tx])
  748. return wm8960_configure_clocking(component);
  749. return 0;
  750. }
  751. static int wm8960_hw_free(struct snd_pcm_substream *substream,
  752. struct snd_soc_dai *dai)
  753. {
  754. struct snd_soc_component *component = dai->component;
  755. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  756. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  757. wm8960->is_stream_in_use[tx] = false;
  758. return 0;
  759. }
  760. static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction)
  761. {
  762. struct snd_soc_component *component = dai->component;
  763. if (mute)
  764. snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
  765. else
  766. snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
  767. return 0;
  768. }
  769. static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
  770. enum snd_soc_bias_level level)
  771. {
  772. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  773. u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
  774. int ret;
  775. ktime_t tout;
  776. switch (level) {
  777. case SND_SOC_BIAS_ON:
  778. break;
  779. case SND_SOC_BIAS_PREPARE:
  780. switch (snd_soc_component_get_bias_level(component)) {
  781. case SND_SOC_BIAS_STANDBY:
  782. if (!IS_ERR(wm8960->mclk)) {
  783. ret = clk_prepare_enable(wm8960->mclk);
  784. if (ret) {
  785. dev_err(component->dev,
  786. "Failed to enable MCLK: %d\n",
  787. ret);
  788. return ret;
  789. }
  790. }
  791. ret = wm8960_configure_clocking(component);
  792. if (ret)
  793. return ret;
  794. /* Set VMID to 2x50k */
  795. snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
  796. break;
  797. case SND_SOC_BIAS_ON:
  798. /*
  799. * If it's sysclk auto mode, and the pll is enabled,
  800. * disable the pll
  801. */
  802. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  803. wm8960_set_pll(component, 0, 0);
  804. if (!IS_ERR(wm8960->mclk))
  805. clk_disable_unprepare(wm8960->mclk);
  806. break;
  807. default:
  808. break;
  809. }
  810. break;
  811. case SND_SOC_BIAS_STANDBY:
  812. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  813. /* ensure discharge is complete */
  814. tout = WM8960_DSCH_TOUT - ktime_ms_delta(ktime_get(), wm8960->dsch_start);
  815. if (tout > 0)
  816. msleep(tout);
  817. regcache_sync(wm8960->regmap);
  818. /* Enable anti-pop features */
  819. snd_soc_component_write(component, WM8960_APOP1,
  820. WM8960_POBCTRL | WM8960_SOFT_ST |
  821. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  822. /* Enable & ramp VMID at 2x50k */
  823. snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
  824. msleep(100);
  825. /* Enable VREF */
  826. snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
  827. WM8960_VREF);
  828. /* Disable anti-pop features */
  829. snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
  830. }
  831. /* Set VMID to 2x250k */
  832. snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
  833. break;
  834. case SND_SOC_BIAS_OFF:
  835. /* Enable anti-pop features */
  836. snd_soc_component_write(component, WM8960_APOP1,
  837. WM8960_POBCTRL | WM8960_SOFT_ST |
  838. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  839. /* Disable VMID and VREF, mark discharge */
  840. snd_soc_component_write(component, WM8960_POWER1, 0);
  841. wm8960->dsch_start = ktime_get();
  842. break;
  843. }
  844. return 0;
  845. }
  846. static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
  847. enum snd_soc_bias_level level)
  848. {
  849. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  850. u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
  851. int reg, ret;
  852. switch (level) {
  853. case SND_SOC_BIAS_ON:
  854. break;
  855. case SND_SOC_BIAS_PREPARE:
  856. switch (snd_soc_component_get_bias_level(component)) {
  857. case SND_SOC_BIAS_STANDBY:
  858. /* Enable anti pop mode */
  859. snd_soc_component_update_bits(component, WM8960_APOP1,
  860. WM8960_POBCTRL | WM8960_SOFT_ST |
  861. WM8960_BUFDCOPEN,
  862. WM8960_POBCTRL | WM8960_SOFT_ST |
  863. WM8960_BUFDCOPEN);
  864. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  865. reg = 0;
  866. if (wm8960->lout1 && wm8960->lout1->power)
  867. reg |= WM8960_PWR2_LOUT1;
  868. if (wm8960->rout1 && wm8960->rout1->power)
  869. reg |= WM8960_PWR2_ROUT1;
  870. if (wm8960->out3 && wm8960->out3->power)
  871. reg |= WM8960_PWR2_OUT3;
  872. snd_soc_component_update_bits(component, WM8960_POWER2,
  873. WM8960_PWR2_LOUT1 |
  874. WM8960_PWR2_ROUT1 |
  875. WM8960_PWR2_OUT3, reg);
  876. /* Enable VMID at 2*50k */
  877. snd_soc_component_update_bits(component, WM8960_POWER1,
  878. WM8960_VMID_MASK, 0x80);
  879. /* Ramp */
  880. msleep(100);
  881. /* Enable VREF */
  882. snd_soc_component_update_bits(component, WM8960_POWER1,
  883. WM8960_VREF, WM8960_VREF);
  884. msleep(100);
  885. if (!IS_ERR(wm8960->mclk)) {
  886. ret = clk_prepare_enable(wm8960->mclk);
  887. if (ret) {
  888. dev_err(component->dev,
  889. "Failed to enable MCLK: %d\n",
  890. ret);
  891. return ret;
  892. }
  893. }
  894. ret = wm8960_configure_clocking(component);
  895. if (ret)
  896. return ret;
  897. break;
  898. case SND_SOC_BIAS_ON:
  899. /*
  900. * If it's sysclk auto mode, and the pll is enabled,
  901. * disable the pll
  902. */
  903. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  904. wm8960_set_pll(component, 0, 0);
  905. if (!IS_ERR(wm8960->mclk))
  906. clk_disable_unprepare(wm8960->mclk);
  907. /* Enable anti-pop mode */
  908. snd_soc_component_update_bits(component, WM8960_APOP1,
  909. WM8960_POBCTRL | WM8960_SOFT_ST |
  910. WM8960_BUFDCOPEN,
  911. WM8960_POBCTRL | WM8960_SOFT_ST |
  912. WM8960_BUFDCOPEN);
  913. /* Disable VMID and VREF */
  914. snd_soc_component_update_bits(component, WM8960_POWER1,
  915. WM8960_VREF | WM8960_VMID_MASK, 0);
  916. break;
  917. case SND_SOC_BIAS_OFF:
  918. regcache_sync(wm8960->regmap);
  919. break;
  920. default:
  921. break;
  922. }
  923. break;
  924. case SND_SOC_BIAS_STANDBY:
  925. switch (snd_soc_component_get_bias_level(component)) {
  926. case SND_SOC_BIAS_PREPARE:
  927. /* Disable HP discharge */
  928. snd_soc_component_update_bits(component, WM8960_APOP2,
  929. WM8960_DISOP | WM8960_DRES_MASK,
  930. 0);
  931. /* Disable anti-pop features */
  932. snd_soc_component_update_bits(component, WM8960_APOP1,
  933. WM8960_POBCTRL | WM8960_SOFT_ST |
  934. WM8960_BUFDCOPEN,
  935. WM8960_POBCTRL | WM8960_SOFT_ST |
  936. WM8960_BUFDCOPEN);
  937. break;
  938. default:
  939. break;
  940. }
  941. break;
  942. case SND_SOC_BIAS_OFF:
  943. break;
  944. }
  945. return 0;
  946. }
  947. /* PLL divisors */
  948. struct _pll_div {
  949. u32 pre_div:1;
  950. u32 n:4;
  951. u32 k:24;
  952. };
  953. static bool is_pll_freq_available(unsigned int source, unsigned int target)
  954. {
  955. unsigned int Ndiv;
  956. if (source == 0 || target == 0)
  957. return false;
  958. /* Scale up target to PLL operating frequency */
  959. target *= 4;
  960. Ndiv = target / source;
  961. if (Ndiv < 6) {
  962. source >>= 1;
  963. Ndiv = target / source;
  964. }
  965. if ((Ndiv < 6) || (Ndiv > 12))
  966. return false;
  967. return true;
  968. }
  969. /* The size in bits of the pll divide multiplied by 10
  970. * to allow rounding later */
  971. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  972. static int pll_factors(unsigned int source, unsigned int target,
  973. struct _pll_div *pll_div)
  974. {
  975. unsigned long long Kpart;
  976. unsigned int K, Ndiv, Nmod;
  977. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  978. /* Scale up target to PLL operating frequency */
  979. target *= 4;
  980. Ndiv = target / source;
  981. if (Ndiv < 6) {
  982. source >>= 1;
  983. pll_div->pre_div = 1;
  984. Ndiv = target / source;
  985. } else
  986. pll_div->pre_div = 0;
  987. if ((Ndiv < 6) || (Ndiv > 12)) {
  988. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  989. return -EINVAL;
  990. }
  991. pll_div->n = Ndiv;
  992. Nmod = target % source;
  993. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  994. do_div(Kpart, source);
  995. K = Kpart & 0xFFFFFFFF;
  996. /* Check if we need to round */
  997. if ((K % 10) >= 5)
  998. K += 5;
  999. /* Move down to proper range now rounding is done */
  1000. K /= 10;
  1001. pll_div->k = K;
  1002. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  1003. pll_div->n, pll_div->k, pll_div->pre_div);
  1004. return 0;
  1005. }
  1006. static int wm8960_set_pll(struct snd_soc_component *component,
  1007. unsigned int freq_in, unsigned int freq_out)
  1008. {
  1009. u16 reg;
  1010. static struct _pll_div pll_div;
  1011. int ret;
  1012. if (freq_in && freq_out) {
  1013. ret = pll_factors(freq_in, freq_out, &pll_div);
  1014. if (ret != 0)
  1015. return ret;
  1016. }
  1017. /* Disable the PLL: even if we are changing the frequency the
  1018. * PLL needs to be disabled while we do so. */
  1019. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
  1020. snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
  1021. if (!freq_in || !freq_out)
  1022. return 0;
  1023. reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f;
  1024. reg |= pll_div.pre_div << 4;
  1025. reg |= pll_div.n;
  1026. if (pll_div.k) {
  1027. reg |= 0x20;
  1028. snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
  1029. snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
  1030. snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
  1031. }
  1032. snd_soc_component_write(component, WM8960_PLL1, reg);
  1033. /* Turn it on */
  1034. snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
  1035. msleep(250);
  1036. snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
  1037. return 0;
  1038. }
  1039. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  1040. int source, unsigned int freq_in, unsigned int freq_out)
  1041. {
  1042. struct snd_soc_component *component = codec_dai->component;
  1043. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1044. wm8960->freq_in = freq_in;
  1045. if (pll_id == WM8960_SYSCLK_AUTO)
  1046. return 0;
  1047. return wm8960_set_pll(component, freq_in, freq_out);
  1048. }
  1049. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  1050. int div_id, int div)
  1051. {
  1052. struct snd_soc_component *component = codec_dai->component;
  1053. u16 reg;
  1054. switch (div_id) {
  1055. case WM8960_SYSCLKDIV:
  1056. reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9;
  1057. snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
  1058. break;
  1059. case WM8960_DACDIV:
  1060. reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7;
  1061. snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
  1062. break;
  1063. case WM8960_OPCLKDIV:
  1064. reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f;
  1065. snd_soc_component_write(component, WM8960_PLL1, reg | div);
  1066. break;
  1067. case WM8960_DCLKDIV:
  1068. reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f;
  1069. snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
  1070. break;
  1071. case WM8960_TOCLKSEL:
  1072. reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd;
  1073. snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
  1074. break;
  1075. default:
  1076. return -EINVAL;
  1077. }
  1078. return 0;
  1079. }
  1080. static int wm8960_set_bias_level(struct snd_soc_component *component,
  1081. enum snd_soc_bias_level level)
  1082. {
  1083. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1084. return wm8960->set_bias_level(component, level);
  1085. }
  1086. static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
  1087. unsigned int freq, int dir)
  1088. {
  1089. struct snd_soc_component *component = dai->component;
  1090. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1091. switch (clk_id) {
  1092. case WM8960_SYSCLK_MCLK:
  1093. snd_soc_component_update_bits(component, WM8960_CLOCK1,
  1094. 0x1, WM8960_SYSCLK_MCLK);
  1095. break;
  1096. case WM8960_SYSCLK_PLL:
  1097. snd_soc_component_update_bits(component, WM8960_CLOCK1,
  1098. 0x1, WM8960_SYSCLK_PLL);
  1099. break;
  1100. case WM8960_SYSCLK_AUTO:
  1101. break;
  1102. default:
  1103. return -EINVAL;
  1104. }
  1105. wm8960->sysclk = freq;
  1106. wm8960->clk_id = clk_id;
  1107. return 0;
  1108. }
  1109. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  1110. #define WM8960_FORMATS \
  1111. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1112. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1113. static const struct snd_soc_dai_ops wm8960_dai_ops = {
  1114. .hw_params = wm8960_hw_params,
  1115. .hw_free = wm8960_hw_free,
  1116. .mute_stream = wm8960_mute,
  1117. .set_fmt = wm8960_set_dai_fmt,
  1118. .set_clkdiv = wm8960_set_dai_clkdiv,
  1119. .set_pll = wm8960_set_dai_pll,
  1120. .set_sysclk = wm8960_set_dai_sysclk,
  1121. .no_capture_mute = 1,
  1122. };
  1123. static struct snd_soc_dai_driver wm8960_dai = {
  1124. .name = "wm8960-hifi",
  1125. .playback = {
  1126. .stream_name = "Playback",
  1127. .channels_min = 1,
  1128. .channels_max = 2,
  1129. .rates = WM8960_RATES,
  1130. .formats = WM8960_FORMATS,},
  1131. .capture = {
  1132. .stream_name = "Capture",
  1133. .channels_min = 1,
  1134. .channels_max = 2,
  1135. .rates = WM8960_RATES,
  1136. .formats = WM8960_FORMATS,},
  1137. .ops = &wm8960_dai_ops,
  1138. .symmetric_rate = 1,
  1139. };
  1140. static int wm8960_probe(struct snd_soc_component *component)
  1141. {
  1142. struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
  1143. struct wm8960_data *pdata = &wm8960->pdata;
  1144. if (pdata->capless)
  1145. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  1146. else
  1147. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  1148. snd_soc_add_component_controls(component, wm8960_snd_controls,
  1149. ARRAY_SIZE(wm8960_snd_controls));
  1150. wm8960_add_widgets(component);
  1151. return 0;
  1152. }
  1153. static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
  1154. .probe = wm8960_probe,
  1155. .set_bias_level = wm8960_set_bias_level,
  1156. .suspend_bias_off = 1,
  1157. .idle_bias_on = 1,
  1158. .use_pmdown_time = 1,
  1159. .endianness = 1,
  1160. };
  1161. static const struct regmap_config wm8960_regmap = {
  1162. .reg_bits = 7,
  1163. .val_bits = 9,
  1164. .max_register = WM8960_PLL4,
  1165. .reg_defaults = wm8960_reg_defaults,
  1166. .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
  1167. .cache_type = REGCACHE_RBTREE,
  1168. .volatile_reg = wm8960_volatile,
  1169. };
  1170. static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
  1171. struct wm8960_data *pdata)
  1172. {
  1173. const struct device_node *np = i2c->dev.of_node;
  1174. if (of_property_read_bool(np, "wlf,capless"))
  1175. pdata->capless = true;
  1176. if (of_property_read_bool(np, "wlf,shared-lrclk"))
  1177. pdata->shared_lrclk = true;
  1178. of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg,
  1179. ARRAY_SIZE(pdata->gpio_cfg));
  1180. of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg,
  1181. ARRAY_SIZE(pdata->hp_cfg));
  1182. }
  1183. static int wm8960_i2c_probe(struct i2c_client *i2c)
  1184. {
  1185. struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
  1186. struct wm8960_priv *wm8960;
  1187. int ret;
  1188. wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
  1189. GFP_KERNEL);
  1190. if (wm8960 == NULL)
  1191. return -ENOMEM;
  1192. wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
  1193. if (IS_ERR(wm8960->mclk)) {
  1194. if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
  1195. return -EPROBE_DEFER;
  1196. }
  1197. wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
  1198. if (IS_ERR(wm8960->regmap))
  1199. return PTR_ERR(wm8960->regmap);
  1200. if (pdata)
  1201. memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
  1202. else if (i2c->dev.of_node)
  1203. wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
  1204. ret = wm8960_reset(wm8960->regmap);
  1205. if (ret != 0) {
  1206. dev_err(&i2c->dev, "Failed to issue reset\n");
  1207. return ret;
  1208. }
  1209. if (wm8960->pdata.shared_lrclk) {
  1210. ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
  1211. 0x4, 0x4);
  1212. if (ret != 0) {
  1213. dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
  1214. ret);
  1215. return ret;
  1216. }
  1217. }
  1218. /* Latch the update bits */
  1219. regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
  1220. regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
  1221. regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
  1222. regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
  1223. regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
  1224. regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
  1225. regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
  1226. regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
  1227. regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
  1228. regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
  1229. /* ADCLRC pin configured as GPIO. */
  1230. regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6,
  1231. wm8960->pdata.gpio_cfg[0] << 6);
  1232. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4,
  1233. wm8960->pdata.gpio_cfg[1] << 4);
  1234. /* Enable headphone jack detect */
  1235. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2,
  1236. wm8960->pdata.hp_cfg[0] << 2);
  1237. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5,
  1238. wm8960->pdata.hp_cfg[1] << 5);
  1239. regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3,
  1240. wm8960->pdata.hp_cfg[2]);
  1241. i2c_set_clientdata(i2c, wm8960);
  1242. ret = devm_snd_soc_register_component(&i2c->dev,
  1243. &soc_component_dev_wm8960, &wm8960_dai, 1);
  1244. return ret;
  1245. }
  1246. static void wm8960_i2c_remove(struct i2c_client *client)
  1247. {}
  1248. static const struct i2c_device_id wm8960_i2c_id[] = {
  1249. { "wm8960", 0 },
  1250. { }
  1251. };
  1252. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  1253. #if defined(CONFIG_OF)
  1254. static const struct of_device_id wm8960_of_match[] = {
  1255. { .compatible = "wlf,wm8960", },
  1256. { }
  1257. };
  1258. MODULE_DEVICE_TABLE(of, wm8960_of_match);
  1259. #endif
  1260. #if defined(CONFIG_ACPI)
  1261. static const struct acpi_device_id wm8960_acpi_match[] = {
  1262. { "1AEC8960", 0 }, /* Wolfson PCI ID + part ID */
  1263. { "10138960", 0 }, /* Cirrus Logic PCI ID + part ID */
  1264. { },
  1265. };
  1266. MODULE_DEVICE_TABLE(acpi, wm8960_acpi_match);
  1267. #endif
  1268. static struct i2c_driver wm8960_i2c_driver = {
  1269. .driver = {
  1270. .name = "wm8960",
  1271. .of_match_table = of_match_ptr(wm8960_of_match),
  1272. .acpi_match_table = ACPI_PTR(wm8960_acpi_match),
  1273. },
  1274. .probe_new = wm8960_i2c_probe,
  1275. .remove = wm8960_i2c_remove,
  1276. .id_table = wm8960_i2c_id,
  1277. };
  1278. module_i2c_driver(wm8960_i2c_driver);
  1279. MODULE_DESCRIPTION("ASoC WM8960 driver");
  1280. MODULE_AUTHOR("Liam Girdwood");
  1281. MODULE_LICENSE("GPL");