wm8955.h 24 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * wm8955.h -- WM8904 ASoC driver
  4. *
  5. * Copyright 2009 Wolfson Microelectronics, plc
  6. *
  7. * Author: Mark Brown <[email protected]>
  8. */
  9. #ifndef _WM8955_H
  10. #define _WM8955_H
  11. #define WM8955_CLK_MCLK 1
  12. /*
  13. * Register values.
  14. */
  15. #define WM8955_LOUT1_VOLUME 0x02
  16. #define WM8955_ROUT1_VOLUME 0x03
  17. #define WM8955_DAC_CONTROL 0x05
  18. #define WM8955_AUDIO_INTERFACE 0x07
  19. #define WM8955_SAMPLE_RATE 0x08
  20. #define WM8955_LEFT_DAC_VOLUME 0x0A
  21. #define WM8955_RIGHT_DAC_VOLUME 0x0B
  22. #define WM8955_BASS_CONTROL 0x0C
  23. #define WM8955_TREBLE_CONTROL 0x0D
  24. #define WM8955_RESET 0x0F
  25. #define WM8955_ADDITIONAL_CONTROL_1 0x17
  26. #define WM8955_ADDITIONAL_CONTROL_2 0x18
  27. #define WM8955_POWER_MANAGEMENT_1 0x19
  28. #define WM8955_POWER_MANAGEMENT_2 0x1A
  29. #define WM8955_ADDITIONAL_CONTROL_3 0x1B
  30. #define WM8955_LEFT_OUT_MIX_1 0x22
  31. #define WM8955_LEFT_OUT_MIX_2 0x23
  32. #define WM8955_RIGHT_OUT_MIX_1 0x24
  33. #define WM8955_RIGHT_OUT_MIX_2 0x25
  34. #define WM8955_MONO_OUT_MIX_1 0x26
  35. #define WM8955_MONO_OUT_MIX_2 0x27
  36. #define WM8955_LOUT2_VOLUME 0x28
  37. #define WM8955_ROUT2_VOLUME 0x29
  38. #define WM8955_MONOOUT_VOLUME 0x2A
  39. #define WM8955_CLOCKING_PLL 0x2B
  40. #define WM8955_PLL_CONTROL_1 0x2C
  41. #define WM8955_PLL_CONTROL_2 0x2D
  42. #define WM8955_PLL_CONTROL_3 0x2E
  43. #define WM8955_PLL_CONTROL_4 0x3B
  44. #define WM8955_REGISTER_COUNT 29
  45. #define WM8955_MAX_REGISTER 0x3B
  46. /*
  47. * Field Definitions.
  48. */
  49. /*
  50. * R2 (0x02) - LOUT1 volume
  51. */
  52. #define WM8955_LO1VU 0x0100 /* LO1VU */
  53. #define WM8955_LO1VU_MASK 0x0100 /* LO1VU */
  54. #define WM8955_LO1VU_SHIFT 8 /* LO1VU */
  55. #define WM8955_LO1VU_WIDTH 1 /* LO1VU */
  56. #define WM8955_LO1ZC 0x0080 /* LO1ZC */
  57. #define WM8955_LO1ZC_MASK 0x0080 /* LO1ZC */
  58. #define WM8955_LO1ZC_SHIFT 7 /* LO1ZC */
  59. #define WM8955_LO1ZC_WIDTH 1 /* LO1ZC */
  60. #define WM8955_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
  61. #define WM8955_LOUTVOL_SHIFT 0 /* LOUTVOL - [6:0] */
  62. #define WM8955_LOUTVOL_WIDTH 7 /* LOUTVOL - [6:0] */
  63. /*
  64. * R3 (0x03) - ROUT1 volume
  65. */
  66. #define WM8955_RO1VU 0x0100 /* RO1VU */
  67. #define WM8955_RO1VU_MASK 0x0100 /* RO1VU */
  68. #define WM8955_RO1VU_SHIFT 8 /* RO1VU */
  69. #define WM8955_RO1VU_WIDTH 1 /* RO1VU */
  70. #define WM8955_RO1ZC 0x0080 /* RO1ZC */
  71. #define WM8955_RO1ZC_MASK 0x0080 /* RO1ZC */
  72. #define WM8955_RO1ZC_SHIFT 7 /* RO1ZC */
  73. #define WM8955_RO1ZC_WIDTH 1 /* RO1ZC */
  74. #define WM8955_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
  75. #define WM8955_ROUTVOL_SHIFT 0 /* ROUTVOL - [6:0] */
  76. #define WM8955_ROUTVOL_WIDTH 7 /* ROUTVOL - [6:0] */
  77. /*
  78. * R5 (0x05) - DAC Control
  79. */
  80. #define WM8955_DAT 0x0080 /* DAT */
  81. #define WM8955_DAT_MASK 0x0080 /* DAT */
  82. #define WM8955_DAT_SHIFT 7 /* DAT */
  83. #define WM8955_DAT_WIDTH 1 /* DAT */
  84. #define WM8955_DACMU 0x0008 /* DACMU */
  85. #define WM8955_DACMU_MASK 0x0008 /* DACMU */
  86. #define WM8955_DACMU_SHIFT 3 /* DACMU */
  87. #define WM8955_DACMU_WIDTH 1 /* DACMU */
  88. #define WM8955_DEEMPH_MASK 0x0006 /* DEEMPH - [2:1] */
  89. #define WM8955_DEEMPH_SHIFT 1 /* DEEMPH - [2:1] */
  90. #define WM8955_DEEMPH_WIDTH 2 /* DEEMPH - [2:1] */
  91. /*
  92. * R7 (0x07) - Audio Interface
  93. */
  94. #define WM8955_BCLKINV 0x0080 /* BCLKINV */
  95. #define WM8955_BCLKINV_MASK 0x0080 /* BCLKINV */
  96. #define WM8955_BCLKINV_SHIFT 7 /* BCLKINV */
  97. #define WM8955_BCLKINV_WIDTH 1 /* BCLKINV */
  98. #define WM8955_MS 0x0040 /* MS */
  99. #define WM8955_MS_MASK 0x0040 /* MS */
  100. #define WM8955_MS_SHIFT 6 /* MS */
  101. #define WM8955_MS_WIDTH 1 /* MS */
  102. #define WM8955_LRSWAP 0x0020 /* LRSWAP */
  103. #define WM8955_LRSWAP_MASK 0x0020 /* LRSWAP */
  104. #define WM8955_LRSWAP_SHIFT 5 /* LRSWAP */
  105. #define WM8955_LRSWAP_WIDTH 1 /* LRSWAP */
  106. #define WM8955_LRP 0x0010 /* LRP */
  107. #define WM8955_LRP_MASK 0x0010 /* LRP */
  108. #define WM8955_LRP_SHIFT 4 /* LRP */
  109. #define WM8955_LRP_WIDTH 1 /* LRP */
  110. #define WM8955_WL_MASK 0x000C /* WL - [3:2] */
  111. #define WM8955_WL_SHIFT 2 /* WL - [3:2] */
  112. #define WM8955_WL_WIDTH 2 /* WL - [3:2] */
  113. #define WM8955_FORMAT_MASK 0x0003 /* FORMAT - [1:0] */
  114. #define WM8955_FORMAT_SHIFT 0 /* FORMAT - [1:0] */
  115. #define WM8955_FORMAT_WIDTH 2 /* FORMAT - [1:0] */
  116. /*
  117. * R8 (0x08) - Sample Rate
  118. */
  119. #define WM8955_BCLKDIV2 0x0080 /* BCLKDIV2 */
  120. #define WM8955_BCLKDIV2_MASK 0x0080 /* BCLKDIV2 */
  121. #define WM8955_BCLKDIV2_SHIFT 7 /* BCLKDIV2 */
  122. #define WM8955_BCLKDIV2_WIDTH 1 /* BCLKDIV2 */
  123. #define WM8955_MCLKDIV2 0x0040 /* MCLKDIV2 */
  124. #define WM8955_MCLKDIV2_MASK 0x0040 /* MCLKDIV2 */
  125. #define WM8955_MCLKDIV2_SHIFT 6 /* MCLKDIV2 */
  126. #define WM8955_MCLKDIV2_WIDTH 1 /* MCLKDIV2 */
  127. #define WM8955_SR_MASK 0x003E /* SR - [5:1] */
  128. #define WM8955_SR_SHIFT 1 /* SR - [5:1] */
  129. #define WM8955_SR_WIDTH 5 /* SR - [5:1] */
  130. #define WM8955_USB 0x0001 /* USB */
  131. #define WM8955_USB_MASK 0x0001 /* USB */
  132. #define WM8955_USB_SHIFT 0 /* USB */
  133. #define WM8955_USB_WIDTH 1 /* USB */
  134. /*
  135. * R10 (0x0A) - Left DAC volume
  136. */
  137. #define WM8955_LDVU 0x0100 /* LDVU */
  138. #define WM8955_LDVU_MASK 0x0100 /* LDVU */
  139. #define WM8955_LDVU_SHIFT 8 /* LDVU */
  140. #define WM8955_LDVU_WIDTH 1 /* LDVU */
  141. #define WM8955_LDACVOL_MASK 0x00FF /* LDACVOL - [7:0] */
  142. #define WM8955_LDACVOL_SHIFT 0 /* LDACVOL - [7:0] */
  143. #define WM8955_LDACVOL_WIDTH 8 /* LDACVOL - [7:0] */
  144. /*
  145. * R11 (0x0B) - Right DAC volume
  146. */
  147. #define WM8955_RDVU 0x0100 /* RDVU */
  148. #define WM8955_RDVU_MASK 0x0100 /* RDVU */
  149. #define WM8955_RDVU_SHIFT 8 /* RDVU */
  150. #define WM8955_RDVU_WIDTH 1 /* RDVU */
  151. #define WM8955_RDACVOL_MASK 0x00FF /* RDACVOL - [7:0] */
  152. #define WM8955_RDACVOL_SHIFT 0 /* RDACVOL - [7:0] */
  153. #define WM8955_RDACVOL_WIDTH 8 /* RDACVOL - [7:0] */
  154. /*
  155. * R12 (0x0C) - Bass control
  156. */
  157. #define WM8955_BB 0x0080 /* BB */
  158. #define WM8955_BB_MASK 0x0080 /* BB */
  159. #define WM8955_BB_SHIFT 7 /* BB */
  160. #define WM8955_BB_WIDTH 1 /* BB */
  161. #define WM8955_BC 0x0040 /* BC */
  162. #define WM8955_BC_MASK 0x0040 /* BC */
  163. #define WM8955_BC_SHIFT 6 /* BC */
  164. #define WM8955_BC_WIDTH 1 /* BC */
  165. #define WM8955_BASS_MASK 0x000F /* BASS - [3:0] */
  166. #define WM8955_BASS_SHIFT 0 /* BASS - [3:0] */
  167. #define WM8955_BASS_WIDTH 4 /* BASS - [3:0] */
  168. /*
  169. * R13 (0x0D) - Treble control
  170. */
  171. #define WM8955_TC 0x0040 /* TC */
  172. #define WM8955_TC_MASK 0x0040 /* TC */
  173. #define WM8955_TC_SHIFT 6 /* TC */
  174. #define WM8955_TC_WIDTH 1 /* TC */
  175. #define WM8955_TRBL_MASK 0x000F /* TRBL - [3:0] */
  176. #define WM8955_TRBL_SHIFT 0 /* TRBL - [3:0] */
  177. #define WM8955_TRBL_WIDTH 4 /* TRBL - [3:0] */
  178. /*
  179. * R15 (0x0F) - Reset
  180. */
  181. #define WM8955_RESET_MASK 0x01FF /* RESET - [8:0] */
  182. #define WM8955_RESET_SHIFT 0 /* RESET - [8:0] */
  183. #define WM8955_RESET_WIDTH 9 /* RESET - [8:0] */
  184. /*
  185. * R23 (0x17) - Additional control (1)
  186. */
  187. #define WM8955_TSDEN 0x0100 /* TSDEN */
  188. #define WM8955_TSDEN_MASK 0x0100 /* TSDEN */
  189. #define WM8955_TSDEN_SHIFT 8 /* TSDEN */
  190. #define WM8955_TSDEN_WIDTH 1 /* TSDEN */
  191. #define WM8955_VSEL_MASK 0x00C0 /* VSEL - [7:6] */
  192. #define WM8955_VSEL_SHIFT 6 /* VSEL - [7:6] */
  193. #define WM8955_VSEL_WIDTH 2 /* VSEL - [7:6] */
  194. #define WM8955_DMONOMIX_MASK 0x0030 /* DMONOMIX - [5:4] */
  195. #define WM8955_DMONOMIX_SHIFT 4 /* DMONOMIX - [5:4] */
  196. #define WM8955_DMONOMIX_WIDTH 2 /* DMONOMIX - [5:4] */
  197. #define WM8955_DACINV 0x0002 /* DACINV */
  198. #define WM8955_DACINV_MASK 0x0002 /* DACINV */
  199. #define WM8955_DACINV_SHIFT 1 /* DACINV */
  200. #define WM8955_DACINV_WIDTH 1 /* DACINV */
  201. #define WM8955_TOEN 0x0001 /* TOEN */
  202. #define WM8955_TOEN_MASK 0x0001 /* TOEN */
  203. #define WM8955_TOEN_SHIFT 0 /* TOEN */
  204. #define WM8955_TOEN_WIDTH 1 /* TOEN */
  205. /*
  206. * R24 (0x18) - Additional control (2)
  207. */
  208. #define WM8955_OUT3SW_MASK 0x0180 /* OUT3SW - [8:7] */
  209. #define WM8955_OUT3SW_SHIFT 7 /* OUT3SW - [8:7] */
  210. #define WM8955_OUT3SW_WIDTH 2 /* OUT3SW - [8:7] */
  211. #define WM8955_ROUT2INV 0x0010 /* ROUT2INV */
  212. #define WM8955_ROUT2INV_MASK 0x0010 /* ROUT2INV */
  213. #define WM8955_ROUT2INV_SHIFT 4 /* ROUT2INV */
  214. #define WM8955_ROUT2INV_WIDTH 1 /* ROUT2INV */
  215. #define WM8955_DACOSR 0x0001 /* DACOSR */
  216. #define WM8955_DACOSR_MASK 0x0001 /* DACOSR */
  217. #define WM8955_DACOSR_SHIFT 0 /* DACOSR */
  218. #define WM8955_DACOSR_WIDTH 1 /* DACOSR */
  219. /*
  220. * R25 (0x19) - Power Management (1)
  221. */
  222. #define WM8955_VMIDSEL_MASK 0x0180 /* VMIDSEL - [8:7] */
  223. #define WM8955_VMIDSEL_SHIFT 7 /* VMIDSEL - [8:7] */
  224. #define WM8955_VMIDSEL_WIDTH 2 /* VMIDSEL - [8:7] */
  225. #define WM8955_VREF 0x0040 /* VREF */
  226. #define WM8955_VREF_MASK 0x0040 /* VREF */
  227. #define WM8955_VREF_SHIFT 6 /* VREF */
  228. #define WM8955_VREF_WIDTH 1 /* VREF */
  229. #define WM8955_DIGENB 0x0001 /* DIGENB */
  230. #define WM8955_DIGENB_MASK 0x0001 /* DIGENB */
  231. #define WM8955_DIGENB_SHIFT 0 /* DIGENB */
  232. #define WM8955_DIGENB_WIDTH 1 /* DIGENB */
  233. /*
  234. * R26 (0x1A) - Power Management (2)
  235. */
  236. #define WM8955_DACL 0x0100 /* DACL */
  237. #define WM8955_DACL_MASK 0x0100 /* DACL */
  238. #define WM8955_DACL_SHIFT 8 /* DACL */
  239. #define WM8955_DACL_WIDTH 1 /* DACL */
  240. #define WM8955_DACR 0x0080 /* DACR */
  241. #define WM8955_DACR_MASK 0x0080 /* DACR */
  242. #define WM8955_DACR_SHIFT 7 /* DACR */
  243. #define WM8955_DACR_WIDTH 1 /* DACR */
  244. #define WM8955_LOUT1 0x0040 /* LOUT1 */
  245. #define WM8955_LOUT1_MASK 0x0040 /* LOUT1 */
  246. #define WM8955_LOUT1_SHIFT 6 /* LOUT1 */
  247. #define WM8955_LOUT1_WIDTH 1 /* LOUT1 */
  248. #define WM8955_ROUT1 0x0020 /* ROUT1 */
  249. #define WM8955_ROUT1_MASK 0x0020 /* ROUT1 */
  250. #define WM8955_ROUT1_SHIFT 5 /* ROUT1 */
  251. #define WM8955_ROUT1_WIDTH 1 /* ROUT1 */
  252. #define WM8955_LOUT2 0x0010 /* LOUT2 */
  253. #define WM8955_LOUT2_MASK 0x0010 /* LOUT2 */
  254. #define WM8955_LOUT2_SHIFT 4 /* LOUT2 */
  255. #define WM8955_LOUT2_WIDTH 1 /* LOUT2 */
  256. #define WM8955_ROUT2 0x0008 /* ROUT2 */
  257. #define WM8955_ROUT2_MASK 0x0008 /* ROUT2 */
  258. #define WM8955_ROUT2_SHIFT 3 /* ROUT2 */
  259. #define WM8955_ROUT2_WIDTH 1 /* ROUT2 */
  260. #define WM8955_MONO 0x0004 /* MONO */
  261. #define WM8955_MONO_MASK 0x0004 /* MONO */
  262. #define WM8955_MONO_SHIFT 2 /* MONO */
  263. #define WM8955_MONO_WIDTH 1 /* MONO */
  264. #define WM8955_OUT3 0x0002 /* OUT3 */
  265. #define WM8955_OUT3_MASK 0x0002 /* OUT3 */
  266. #define WM8955_OUT3_SHIFT 1 /* OUT3 */
  267. #define WM8955_OUT3_WIDTH 1 /* OUT3 */
  268. /*
  269. * R27 (0x1B) - Additional Control (3)
  270. */
  271. #define WM8955_VROI 0x0040 /* VROI */
  272. #define WM8955_VROI_MASK 0x0040 /* VROI */
  273. #define WM8955_VROI_SHIFT 6 /* VROI */
  274. #define WM8955_VROI_WIDTH 1 /* VROI */
  275. /*
  276. * R34 (0x22) - Left out Mix (1)
  277. */
  278. #define WM8955_LD2LO 0x0100 /* LD2LO */
  279. #define WM8955_LD2LO_MASK 0x0100 /* LD2LO */
  280. #define WM8955_LD2LO_SHIFT 8 /* LD2LO */
  281. #define WM8955_LD2LO_WIDTH 1 /* LD2LO */
  282. #define WM8955_LI2LO 0x0080 /* LI2LO */
  283. #define WM8955_LI2LO_MASK 0x0080 /* LI2LO */
  284. #define WM8955_LI2LO_SHIFT 7 /* LI2LO */
  285. #define WM8955_LI2LO_WIDTH 1 /* LI2LO */
  286. #define WM8955_LI2LOVOL_MASK 0x0070 /* LI2LOVOL - [6:4] */
  287. #define WM8955_LI2LOVOL_SHIFT 4 /* LI2LOVOL - [6:4] */
  288. #define WM8955_LI2LOVOL_WIDTH 3 /* LI2LOVOL - [6:4] */
  289. /*
  290. * R35 (0x23) - Left out Mix (2)
  291. */
  292. #define WM8955_RD2LO 0x0100 /* RD2LO */
  293. #define WM8955_RD2LO_MASK 0x0100 /* RD2LO */
  294. #define WM8955_RD2LO_SHIFT 8 /* RD2LO */
  295. #define WM8955_RD2LO_WIDTH 1 /* RD2LO */
  296. #define WM8955_RI2LO 0x0080 /* RI2LO */
  297. #define WM8955_RI2LO_MASK 0x0080 /* RI2LO */
  298. #define WM8955_RI2LO_SHIFT 7 /* RI2LO */
  299. #define WM8955_RI2LO_WIDTH 1 /* RI2LO */
  300. #define WM8955_RI2LOVOL_MASK 0x0070 /* RI2LOVOL - [6:4] */
  301. #define WM8955_RI2LOVOL_SHIFT 4 /* RI2LOVOL - [6:4] */
  302. #define WM8955_RI2LOVOL_WIDTH 3 /* RI2LOVOL - [6:4] */
  303. /*
  304. * R36 (0x24) - Right out Mix (1)
  305. */
  306. #define WM8955_LD2RO 0x0100 /* LD2RO */
  307. #define WM8955_LD2RO_MASK 0x0100 /* LD2RO */
  308. #define WM8955_LD2RO_SHIFT 8 /* LD2RO */
  309. #define WM8955_LD2RO_WIDTH 1 /* LD2RO */
  310. #define WM8955_LI2RO 0x0080 /* LI2RO */
  311. #define WM8955_LI2RO_MASK 0x0080 /* LI2RO */
  312. #define WM8955_LI2RO_SHIFT 7 /* LI2RO */
  313. #define WM8955_LI2RO_WIDTH 1 /* LI2RO */
  314. #define WM8955_LI2ROVOL_MASK 0x0070 /* LI2ROVOL - [6:4] */
  315. #define WM8955_LI2ROVOL_SHIFT 4 /* LI2ROVOL - [6:4] */
  316. #define WM8955_LI2ROVOL_WIDTH 3 /* LI2ROVOL - [6:4] */
  317. /*
  318. * R37 (0x25) - Right Out Mix (2)
  319. */
  320. #define WM8955_RD2RO 0x0100 /* RD2RO */
  321. #define WM8955_RD2RO_MASK 0x0100 /* RD2RO */
  322. #define WM8955_RD2RO_SHIFT 8 /* RD2RO */
  323. #define WM8955_RD2RO_WIDTH 1 /* RD2RO */
  324. #define WM8955_RI2RO 0x0080 /* RI2RO */
  325. #define WM8955_RI2RO_MASK 0x0080 /* RI2RO */
  326. #define WM8955_RI2RO_SHIFT 7 /* RI2RO */
  327. #define WM8955_RI2RO_WIDTH 1 /* RI2RO */
  328. #define WM8955_RI2ROVOL_MASK 0x0070 /* RI2ROVOL - [6:4] */
  329. #define WM8955_RI2ROVOL_SHIFT 4 /* RI2ROVOL - [6:4] */
  330. #define WM8955_RI2ROVOL_WIDTH 3 /* RI2ROVOL - [6:4] */
  331. /*
  332. * R38 (0x26) - Mono out Mix (1)
  333. */
  334. #define WM8955_LD2MO 0x0100 /* LD2MO */
  335. #define WM8955_LD2MO_MASK 0x0100 /* LD2MO */
  336. #define WM8955_LD2MO_SHIFT 8 /* LD2MO */
  337. #define WM8955_LD2MO_WIDTH 1 /* LD2MO */
  338. #define WM8955_LI2MO 0x0080 /* LI2MO */
  339. #define WM8955_LI2MO_MASK 0x0080 /* LI2MO */
  340. #define WM8955_LI2MO_SHIFT 7 /* LI2MO */
  341. #define WM8955_LI2MO_WIDTH 1 /* LI2MO */
  342. #define WM8955_LI2MOVOL_MASK 0x0070 /* LI2MOVOL - [6:4] */
  343. #define WM8955_LI2MOVOL_SHIFT 4 /* LI2MOVOL - [6:4] */
  344. #define WM8955_LI2MOVOL_WIDTH 3 /* LI2MOVOL - [6:4] */
  345. #define WM8955_DMEN 0x0001 /* DMEN */
  346. #define WM8955_DMEN_MASK 0x0001 /* DMEN */
  347. #define WM8955_DMEN_SHIFT 0 /* DMEN */
  348. #define WM8955_DMEN_WIDTH 1 /* DMEN */
  349. /*
  350. * R39 (0x27) - Mono out Mix (2)
  351. */
  352. #define WM8955_RD2MO 0x0100 /* RD2MO */
  353. #define WM8955_RD2MO_MASK 0x0100 /* RD2MO */
  354. #define WM8955_RD2MO_SHIFT 8 /* RD2MO */
  355. #define WM8955_RD2MO_WIDTH 1 /* RD2MO */
  356. #define WM8955_RI2MO 0x0080 /* RI2MO */
  357. #define WM8955_RI2MO_MASK 0x0080 /* RI2MO */
  358. #define WM8955_RI2MO_SHIFT 7 /* RI2MO */
  359. #define WM8955_RI2MO_WIDTH 1 /* RI2MO */
  360. #define WM8955_RI2MOVOL_MASK 0x0070 /* RI2MOVOL - [6:4] */
  361. #define WM8955_RI2MOVOL_SHIFT 4 /* RI2MOVOL - [6:4] */
  362. #define WM8955_RI2MOVOL_WIDTH 3 /* RI2MOVOL - [6:4] */
  363. /*
  364. * R40 (0x28) - LOUT2 volume
  365. */
  366. #define WM8955_LO2VU 0x0100 /* LO2VU */
  367. #define WM8955_LO2VU_MASK 0x0100 /* LO2VU */
  368. #define WM8955_LO2VU_SHIFT 8 /* LO2VU */
  369. #define WM8955_LO2VU_WIDTH 1 /* LO2VU */
  370. #define WM8955_LO2ZC 0x0080 /* LO2ZC */
  371. #define WM8955_LO2ZC_MASK 0x0080 /* LO2ZC */
  372. #define WM8955_LO2ZC_SHIFT 7 /* LO2ZC */
  373. #define WM8955_LO2ZC_WIDTH 1 /* LO2ZC */
  374. #define WM8955_LOUT2VOL_MASK 0x007F /* LOUT2VOL - [6:0] */
  375. #define WM8955_LOUT2VOL_SHIFT 0 /* LOUT2VOL - [6:0] */
  376. #define WM8955_LOUT2VOL_WIDTH 7 /* LOUT2VOL - [6:0] */
  377. /*
  378. * R41 (0x29) - ROUT2 volume
  379. */
  380. #define WM8955_RO2VU 0x0100 /* RO2VU */
  381. #define WM8955_RO2VU_MASK 0x0100 /* RO2VU */
  382. #define WM8955_RO2VU_SHIFT 8 /* RO2VU */
  383. #define WM8955_RO2VU_WIDTH 1 /* RO2VU */
  384. #define WM8955_RO2ZC 0x0080 /* RO2ZC */
  385. #define WM8955_RO2ZC_MASK 0x0080 /* RO2ZC */
  386. #define WM8955_RO2ZC_SHIFT 7 /* RO2ZC */
  387. #define WM8955_RO2ZC_WIDTH 1 /* RO2ZC */
  388. #define WM8955_ROUT2VOL_MASK 0x007F /* ROUT2VOL - [6:0] */
  389. #define WM8955_ROUT2VOL_SHIFT 0 /* ROUT2VOL - [6:0] */
  390. #define WM8955_ROUT2VOL_WIDTH 7 /* ROUT2VOL - [6:0] */
  391. /*
  392. * R42 (0x2A) - MONOOUT volume
  393. */
  394. #define WM8955_MOZC 0x0080 /* MOZC */
  395. #define WM8955_MOZC_MASK 0x0080 /* MOZC */
  396. #define WM8955_MOZC_SHIFT 7 /* MOZC */
  397. #define WM8955_MOZC_WIDTH 1 /* MOZC */
  398. #define WM8955_MOUTVOL_MASK 0x007F /* MOUTVOL - [6:0] */
  399. #define WM8955_MOUTVOL_SHIFT 0 /* MOUTVOL - [6:0] */
  400. #define WM8955_MOUTVOL_WIDTH 7 /* MOUTVOL - [6:0] */
  401. /*
  402. * R43 (0x2B) - Clocking / PLL
  403. */
  404. #define WM8955_MCLKSEL 0x0100 /* MCLKSEL */
  405. #define WM8955_MCLKSEL_MASK 0x0100 /* MCLKSEL */
  406. #define WM8955_MCLKSEL_SHIFT 8 /* MCLKSEL */
  407. #define WM8955_MCLKSEL_WIDTH 1 /* MCLKSEL */
  408. #define WM8955_PLLOUTDIV2 0x0020 /* PLLOUTDIV2 */
  409. #define WM8955_PLLOUTDIV2_MASK 0x0020 /* PLLOUTDIV2 */
  410. #define WM8955_PLLOUTDIV2_SHIFT 5 /* PLLOUTDIV2 */
  411. #define WM8955_PLLOUTDIV2_WIDTH 1 /* PLLOUTDIV2 */
  412. #define WM8955_PLL_RB 0x0010 /* PLL_RB */
  413. #define WM8955_PLL_RB_MASK 0x0010 /* PLL_RB */
  414. #define WM8955_PLL_RB_SHIFT 4 /* PLL_RB */
  415. #define WM8955_PLL_RB_WIDTH 1 /* PLL_RB */
  416. #define WM8955_PLLEN 0x0008 /* PLLEN */
  417. #define WM8955_PLLEN_MASK 0x0008 /* PLLEN */
  418. #define WM8955_PLLEN_SHIFT 3 /* PLLEN */
  419. #define WM8955_PLLEN_WIDTH 1 /* PLLEN */
  420. /*
  421. * R44 (0x2C) - PLL Control 1
  422. */
  423. #define WM8955_N_MASK 0x01E0 /* N - [8:5] */
  424. #define WM8955_N_SHIFT 5 /* N - [8:5] */
  425. #define WM8955_N_WIDTH 4 /* N - [8:5] */
  426. #define WM8955_K_21_18_MASK 0x000F /* K(21:18) - [3:0] */
  427. #define WM8955_K_21_18_SHIFT 0 /* K(21:18) - [3:0] */
  428. #define WM8955_K_21_18_WIDTH 4 /* K(21:18) - [3:0] */
  429. /*
  430. * R45 (0x2D) - PLL Control 2
  431. */
  432. #define WM8955_K_17_9_MASK 0x01FF /* K(17:9) - [8:0] */
  433. #define WM8955_K_17_9_SHIFT 0 /* K(17:9) - [8:0] */
  434. #define WM8955_K_17_9_WIDTH 9 /* K(17:9) - [8:0] */
  435. /*
  436. * R46 (0x2E) - PLL Control 3
  437. */
  438. #define WM8955_K_8_0_MASK 0x01FF /* K(8:0) - [8:0] */
  439. #define WM8955_K_8_0_SHIFT 0 /* K(8:0) - [8:0] */
  440. #define WM8955_K_8_0_WIDTH 9 /* K(8:0) - [8:0] */
  441. /*
  442. * R59 (0x3B) - PLL Control 4
  443. */
  444. #define WM8955_KEN 0x0080 /* KEN */
  445. #define WM8955_KEN_MASK 0x0080 /* KEN */
  446. #define WM8955_KEN_SHIFT 7 /* KEN */
  447. #define WM8955_KEN_WIDTH 1 /* KEN */
  448. #endif