wm8731.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * wm8731.c -- WM8731 ALSA SoC Audio driver
  4. *
  5. * Copyright 2005 Openedhand Ltd.
  6. * Copyright 2006-12 Wolfson Microelectronics, plc
  7. *
  8. * Author: Richard Purdie <[email protected]>
  9. *
  10. * Based on wm8753.c by Liam Girdwood
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/slab.h>
  18. #include <linux/regmap.h>
  19. #include <linux/regulator/consumer.h>
  20. #include <linux/clk.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/initval.h>
  26. #include <sound/tlv.h>
  27. #include "wm8731.h"
  28. static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
  29. "AVDD",
  30. "HPVDD",
  31. "DCVDD",
  32. "DBVDD",
  33. };
  34. /*
  35. * wm8731 register cache
  36. */
  37. static const struct reg_default wm8731_reg_defaults[] = {
  38. { 0, 0x0097 },
  39. { 1, 0x0097 },
  40. { 2, 0x0079 },
  41. { 3, 0x0079 },
  42. { 4, 0x000a },
  43. { 5, 0x0008 },
  44. { 6, 0x009f },
  45. { 7, 0x000a },
  46. { 8, 0x0000 },
  47. { 9, 0x0000 },
  48. };
  49. static bool wm8731_volatile(struct device *dev, unsigned int reg)
  50. {
  51. return reg == WM8731_RESET;
  52. }
  53. #define wm8731_reset(m) regmap_write(m, WM8731_RESET, 0)
  54. static const char *wm8731_input_select[] = {"Line In", "Mic"};
  55. static SOC_ENUM_SINGLE_DECL(wm8731_insel_enum,
  56. WM8731_APANA, 2, wm8731_input_select);
  57. static int wm8731_deemph[] = { 0, 32000, 44100, 48000 };
  58. static int wm8731_set_deemph(struct snd_soc_component *component)
  59. {
  60. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
  61. int val, i, best;
  62. /* If we're using deemphasis select the nearest available sample
  63. * rate.
  64. */
  65. if (wm8731->deemph) {
  66. best = 1;
  67. for (i = 2; i < ARRAY_SIZE(wm8731_deemph); i++) {
  68. if (abs(wm8731_deemph[i] - wm8731->playback_fs) <
  69. abs(wm8731_deemph[best] - wm8731->playback_fs))
  70. best = i;
  71. }
  72. val = best << 1;
  73. } else {
  74. best = 0;
  75. val = 0;
  76. }
  77. dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
  78. best, wm8731_deemph[best]);
  79. return snd_soc_component_update_bits(component, WM8731_APDIGI, 0x6, val);
  80. }
  81. static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
  82. struct snd_ctl_elem_value *ucontrol)
  83. {
  84. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  85. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
  86. ucontrol->value.integer.value[0] = wm8731->deemph;
  87. return 0;
  88. }
  89. static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
  90. struct snd_ctl_elem_value *ucontrol)
  91. {
  92. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  93. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
  94. unsigned int deemph = ucontrol->value.integer.value[0];
  95. int ret = 0;
  96. if (deemph > 1)
  97. return -EINVAL;
  98. mutex_lock(&wm8731->lock);
  99. if (wm8731->deemph != deemph) {
  100. wm8731->deemph = deemph;
  101. wm8731_set_deemph(component);
  102. ret = 1;
  103. }
  104. mutex_unlock(&wm8731->lock);
  105. return ret;
  106. }
  107. static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
  108. static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
  109. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  110. static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 2000, 0);
  111. static const struct snd_kcontrol_new wm8731_snd_controls[] = {
  112. SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
  113. 0, 127, 0, out_tlv),
  114. SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
  115. 7, 1, 0),
  116. SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
  117. in_tlv),
  118. SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
  119. SOC_SINGLE_TLV("Mic Boost Volume", WM8731_APANA, 0, 1, 0, mic_tlv),
  120. SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
  121. SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
  122. sidetone_tlv),
  123. SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
  124. SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
  125. SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
  126. wm8731_get_deemph, wm8731_put_deemph),
  127. };
  128. /* Output Mixer */
  129. static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
  130. SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
  131. SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
  132. SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
  133. };
  134. /* Input mux */
  135. static const struct snd_kcontrol_new wm8731_input_mux_controls =
  136. SOC_DAPM_ENUM("Input Select", wm8731_insel_enum);
  137. static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
  138. SND_SOC_DAPM_SUPPLY("ACTIVE",WM8731_ACTIVE, 0, 0, NULL, 0),
  139. SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
  140. SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
  141. &wm8731_output_mixer_controls[0],
  142. ARRAY_SIZE(wm8731_output_mixer_controls)),
  143. SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
  144. SND_SOC_DAPM_OUTPUT("LOUT"),
  145. SND_SOC_DAPM_OUTPUT("LHPOUT"),
  146. SND_SOC_DAPM_OUTPUT("ROUT"),
  147. SND_SOC_DAPM_OUTPUT("RHPOUT"),
  148. SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
  149. SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
  150. SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
  151. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
  152. SND_SOC_DAPM_INPUT("MICIN"),
  153. SND_SOC_DAPM_INPUT("RLINEIN"),
  154. SND_SOC_DAPM_INPUT("LLINEIN"),
  155. };
  156. static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
  157. struct snd_soc_dapm_widget *sink)
  158. {
  159. struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
  160. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
  161. return wm8731->sysclk_type == WM8731_SYSCLK_XTAL;
  162. }
  163. static const struct snd_soc_dapm_route wm8731_intercon[] = {
  164. {"DAC", NULL, "OSC", wm8731_check_osc},
  165. {"ADC", NULL, "OSC", wm8731_check_osc},
  166. {"DAC", NULL, "ACTIVE"},
  167. {"ADC", NULL, "ACTIVE"},
  168. /* output mixer */
  169. {"Output Mixer", "Line Bypass Switch", "Line Input"},
  170. {"Output Mixer", "HiFi Playback Switch", "DAC"},
  171. {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
  172. /* outputs */
  173. {"RHPOUT", NULL, "Output Mixer"},
  174. {"ROUT", NULL, "Output Mixer"},
  175. {"LHPOUT", NULL, "Output Mixer"},
  176. {"LOUT", NULL, "Output Mixer"},
  177. /* input mux */
  178. {"Input Mux", "Line In", "Line Input"},
  179. {"Input Mux", "Mic", "Mic Bias"},
  180. {"ADC", NULL, "Input Mux"},
  181. /* inputs */
  182. {"Line Input", NULL, "LLINEIN"},
  183. {"Line Input", NULL, "RLINEIN"},
  184. {"Mic Bias", NULL, "MICIN"},
  185. };
  186. struct _coeff_div {
  187. u32 mclk;
  188. u32 rate;
  189. u16 fs;
  190. u8 sr:4;
  191. u8 bosr:1;
  192. u8 usb:1;
  193. };
  194. /* codec mclk clock divider coefficients */
  195. static const struct _coeff_div coeff_div[] = {
  196. /* 48k */
  197. {12288000, 48000, 256, 0x0, 0x0, 0x0},
  198. {18432000, 48000, 384, 0x0, 0x1, 0x0},
  199. {12000000, 48000, 250, 0x0, 0x0, 0x1},
  200. /* 32k */
  201. {12288000, 32000, 384, 0x6, 0x0, 0x0},
  202. {18432000, 32000, 576, 0x6, 0x1, 0x0},
  203. {12000000, 32000, 375, 0x6, 0x0, 0x1},
  204. /* 8k */
  205. {12288000, 8000, 1536, 0x3, 0x0, 0x0},
  206. {18432000, 8000, 2304, 0x3, 0x1, 0x0},
  207. {11289600, 8000, 1408, 0xb, 0x0, 0x0},
  208. {16934400, 8000, 2112, 0xb, 0x1, 0x0},
  209. {12000000, 8000, 1500, 0x3, 0x0, 0x1},
  210. /* 96k */
  211. {12288000, 96000, 128, 0x7, 0x0, 0x0},
  212. {18432000, 96000, 192, 0x7, 0x1, 0x0},
  213. {12000000, 96000, 125, 0x7, 0x0, 0x1},
  214. /* 44.1k */
  215. {11289600, 44100, 256, 0x8, 0x0, 0x0},
  216. {16934400, 44100, 384, 0x8, 0x1, 0x0},
  217. {12000000, 44100, 272, 0x8, 0x1, 0x1},
  218. /* 88.2k */
  219. {11289600, 88200, 128, 0xf, 0x0, 0x0},
  220. {16934400, 88200, 192, 0xf, 0x1, 0x0},
  221. {12000000, 88200, 136, 0xf, 0x1, 0x1},
  222. };
  223. /* rates constraints */
  224. static const unsigned int wm8731_rates_12000000[] = {
  225. 8000, 32000, 44100, 48000, 96000, 88200,
  226. };
  227. static const unsigned int wm8731_rates_12288000_18432000[] = {
  228. 8000, 32000, 48000, 96000,
  229. };
  230. static const unsigned int wm8731_rates_11289600_16934400[] = {
  231. 8000, 44100, 88200,
  232. };
  233. static const struct snd_pcm_hw_constraint_list wm8731_constraints_12000000 = {
  234. .list = wm8731_rates_12000000,
  235. .count = ARRAY_SIZE(wm8731_rates_12000000),
  236. };
  237. static const
  238. struct snd_pcm_hw_constraint_list wm8731_constraints_12288000_18432000 = {
  239. .list = wm8731_rates_12288000_18432000,
  240. .count = ARRAY_SIZE(wm8731_rates_12288000_18432000),
  241. };
  242. static const
  243. struct snd_pcm_hw_constraint_list wm8731_constraints_11289600_16934400 = {
  244. .list = wm8731_rates_11289600_16934400,
  245. .count = ARRAY_SIZE(wm8731_rates_11289600_16934400),
  246. };
  247. static inline int get_coeff(int mclk, int rate)
  248. {
  249. int i;
  250. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  251. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  252. return i;
  253. }
  254. return 0;
  255. }
  256. static int wm8731_hw_params(struct snd_pcm_substream *substream,
  257. struct snd_pcm_hw_params *params,
  258. struct snd_soc_dai *dai)
  259. {
  260. struct snd_soc_component *component = dai->component;
  261. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
  262. u16 iface = snd_soc_component_read(component, WM8731_IFACE) & 0xfff3;
  263. int i = get_coeff(wm8731->sysclk, params_rate(params));
  264. u16 srate = (coeff_div[i].sr << 2) |
  265. (coeff_div[i].bosr << 1) | coeff_div[i].usb;
  266. wm8731->playback_fs = params_rate(params);
  267. snd_soc_component_write(component, WM8731_SRATE, srate);
  268. /* bit size */
  269. switch (params_width(params)) {
  270. case 16:
  271. break;
  272. case 20:
  273. iface |= 0x0004;
  274. break;
  275. case 24:
  276. iface |= 0x0008;
  277. break;
  278. case 32:
  279. iface |= 0x000c;
  280. break;
  281. }
  282. wm8731_set_deemph(component);
  283. snd_soc_component_write(component, WM8731_IFACE, iface);
  284. return 0;
  285. }
  286. static int wm8731_mute(struct snd_soc_dai *dai, int mute, int direction)
  287. {
  288. struct snd_soc_component *component = dai->component;
  289. u16 mute_reg = snd_soc_component_read(component, WM8731_APDIGI) & 0xfff7;
  290. if (mute)
  291. snd_soc_component_write(component, WM8731_APDIGI, mute_reg | 0x8);
  292. else
  293. snd_soc_component_write(component, WM8731_APDIGI, mute_reg);
  294. return 0;
  295. }
  296. static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  297. int clk_id, unsigned int freq, int dir)
  298. {
  299. struct snd_soc_component *component = codec_dai->component;
  300. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  301. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
  302. switch (clk_id) {
  303. case WM8731_SYSCLK_XTAL:
  304. case WM8731_SYSCLK_MCLK:
  305. if (wm8731->mclk && clk_set_rate(wm8731->mclk, freq))
  306. return -EINVAL;
  307. wm8731->sysclk_type = clk_id;
  308. break;
  309. default:
  310. return -EINVAL;
  311. }
  312. switch (freq) {
  313. case 0:
  314. wm8731->constraints = NULL;
  315. break;
  316. case 12000000:
  317. wm8731->constraints = &wm8731_constraints_12000000;
  318. break;
  319. case 12288000:
  320. case 18432000:
  321. wm8731->constraints = &wm8731_constraints_12288000_18432000;
  322. break;
  323. case 16934400:
  324. case 11289600:
  325. wm8731->constraints = &wm8731_constraints_11289600_16934400;
  326. break;
  327. default:
  328. return -EINVAL;
  329. }
  330. wm8731->sysclk = freq;
  331. snd_soc_dapm_sync(dapm);
  332. return 0;
  333. }
  334. static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
  335. unsigned int fmt)
  336. {
  337. struct snd_soc_component *component = codec_dai->component;
  338. u16 iface = 0;
  339. switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
  340. case SND_SOC_DAIFMT_CBP_CFP:
  341. iface |= 0x0040;
  342. break;
  343. case SND_SOC_DAIFMT_CBC_CFC:
  344. break;
  345. default:
  346. return -EINVAL;
  347. }
  348. /* interface format */
  349. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  350. case SND_SOC_DAIFMT_I2S:
  351. iface |= 0x0002;
  352. break;
  353. case SND_SOC_DAIFMT_RIGHT_J:
  354. break;
  355. case SND_SOC_DAIFMT_LEFT_J:
  356. iface |= 0x0001;
  357. break;
  358. case SND_SOC_DAIFMT_DSP_A:
  359. iface |= 0x0013;
  360. break;
  361. case SND_SOC_DAIFMT_DSP_B:
  362. iface |= 0x0003;
  363. break;
  364. default:
  365. return -EINVAL;
  366. }
  367. /* clock inversion */
  368. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  369. case SND_SOC_DAIFMT_NB_NF:
  370. break;
  371. case SND_SOC_DAIFMT_IB_IF:
  372. iface |= 0x0090;
  373. break;
  374. case SND_SOC_DAIFMT_IB_NF:
  375. iface |= 0x0080;
  376. break;
  377. case SND_SOC_DAIFMT_NB_IF:
  378. iface |= 0x0010;
  379. break;
  380. default:
  381. return -EINVAL;
  382. }
  383. /* set iface */
  384. snd_soc_component_write(component, WM8731_IFACE, iface);
  385. return 0;
  386. }
  387. static int wm8731_set_bias_level(struct snd_soc_component *component,
  388. enum snd_soc_bias_level level)
  389. {
  390. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(component);
  391. int ret;
  392. u16 reg;
  393. switch (level) {
  394. case SND_SOC_BIAS_ON:
  395. if (wm8731->mclk) {
  396. ret = clk_prepare_enable(wm8731->mclk);
  397. if (ret)
  398. return ret;
  399. }
  400. break;
  401. case SND_SOC_BIAS_PREPARE:
  402. break;
  403. case SND_SOC_BIAS_STANDBY:
  404. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  405. ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
  406. wm8731->supplies);
  407. if (ret != 0)
  408. return ret;
  409. regcache_sync(wm8731->regmap);
  410. }
  411. /* Clear PWROFF, gate CLKOUT, everything else as-is */
  412. reg = snd_soc_component_read(component, WM8731_PWR) & 0xff7f;
  413. snd_soc_component_write(component, WM8731_PWR, reg | 0x0040);
  414. break;
  415. case SND_SOC_BIAS_OFF:
  416. if (wm8731->mclk)
  417. clk_disable_unprepare(wm8731->mclk);
  418. snd_soc_component_write(component, WM8731_PWR, 0xffff);
  419. regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
  420. wm8731->supplies);
  421. regcache_mark_dirty(wm8731->regmap);
  422. break;
  423. }
  424. return 0;
  425. }
  426. static int wm8731_startup(struct snd_pcm_substream *substream,
  427. struct snd_soc_dai *dai)
  428. {
  429. struct wm8731_priv *wm8731 = snd_soc_component_get_drvdata(dai->component);
  430. if (wm8731->constraints)
  431. snd_pcm_hw_constraint_list(substream->runtime, 0,
  432. SNDRV_PCM_HW_PARAM_RATE,
  433. wm8731->constraints);
  434. return 0;
  435. }
  436. #define WM8731_RATES SNDRV_PCM_RATE_8000_96000
  437. #define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  438. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  439. static const struct snd_soc_dai_ops wm8731_dai_ops = {
  440. .startup = wm8731_startup,
  441. .hw_params = wm8731_hw_params,
  442. .mute_stream = wm8731_mute,
  443. .set_sysclk = wm8731_set_dai_sysclk,
  444. .set_fmt = wm8731_set_dai_fmt,
  445. .no_capture_mute = 1,
  446. };
  447. static struct snd_soc_dai_driver wm8731_dai = {
  448. .name = "wm8731-hifi",
  449. .playback = {
  450. .stream_name = "Playback",
  451. .channels_min = 1,
  452. .channels_max = 2,
  453. .rates = WM8731_RATES,
  454. .formats = WM8731_FORMATS,},
  455. .capture = {
  456. .stream_name = "Capture",
  457. .channels_min = 1,
  458. .channels_max = 2,
  459. .rates = WM8731_RATES,
  460. .formats = WM8731_FORMATS,},
  461. .ops = &wm8731_dai_ops,
  462. .symmetric_rate = 1,
  463. };
  464. static const struct snd_soc_component_driver soc_component_dev_wm8731 = {
  465. .set_bias_level = wm8731_set_bias_level,
  466. .controls = wm8731_snd_controls,
  467. .num_controls = ARRAY_SIZE(wm8731_snd_controls),
  468. .dapm_widgets = wm8731_dapm_widgets,
  469. .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
  470. .dapm_routes = wm8731_intercon,
  471. .num_dapm_routes = ARRAY_SIZE(wm8731_intercon),
  472. .suspend_bias_off = 1,
  473. .idle_bias_on = 1,
  474. .use_pmdown_time = 1,
  475. .endianness = 1,
  476. };
  477. int wm8731_init(struct device *dev, struct wm8731_priv *wm8731)
  478. {
  479. int ret = 0, i;
  480. wm8731->mclk = devm_clk_get(dev, "mclk");
  481. if (IS_ERR(wm8731->mclk)) {
  482. ret = PTR_ERR(wm8731->mclk);
  483. if (ret == -ENOENT) {
  484. wm8731->mclk = NULL;
  485. dev_warn(dev, "Assuming static MCLK\n");
  486. } else {
  487. dev_err(dev, "Failed to get MCLK: %d\n", ret);
  488. return ret;
  489. }
  490. }
  491. mutex_init(&wm8731->lock);
  492. for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
  493. wm8731->supplies[i].supply = wm8731_supply_names[i];
  494. ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8731->supplies),
  495. wm8731->supplies);
  496. if (ret != 0) {
  497. dev_err(dev, "Failed to request supplies: %d\n", ret);
  498. return ret;
  499. }
  500. ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
  501. wm8731->supplies);
  502. if (ret != 0) {
  503. dev_err(dev, "Failed to enable supplies: %d\n", ret);
  504. return ret;
  505. }
  506. ret = wm8731_reset(wm8731->regmap);
  507. if (ret < 0) {
  508. dev_err(dev, "Failed to issue reset: %d\n", ret);
  509. goto err_regulator_enable;
  510. }
  511. /* Clear POWEROFF, keep everything else disabled */
  512. regmap_write(wm8731->regmap, WM8731_PWR, 0x7f);
  513. /* Latch the update bits */
  514. regmap_update_bits(wm8731->regmap, WM8731_LOUT1V, 0x100, 0);
  515. regmap_update_bits(wm8731->regmap, WM8731_ROUT1V, 0x100, 0);
  516. regmap_update_bits(wm8731->regmap, WM8731_LINVOL, 0x100, 0);
  517. regmap_update_bits(wm8731->regmap, WM8731_RINVOL, 0x100, 0);
  518. /* Disable bypass path by default */
  519. regmap_update_bits(wm8731->regmap, WM8731_APANA, 0x8, 0);
  520. regcache_mark_dirty(wm8731->regmap);
  521. ret = devm_snd_soc_register_component(dev,
  522. &soc_component_dev_wm8731, &wm8731_dai, 1);
  523. if (ret != 0) {
  524. dev_err(dev, "Failed to register CODEC: %d\n", ret);
  525. goto err_regulator_enable;
  526. }
  527. return 0;
  528. err_regulator_enable:
  529. /* Regulators will be enabled by bias management */
  530. regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
  531. return ret;
  532. }
  533. EXPORT_SYMBOL_GPL(wm8731_init);
  534. const struct regmap_config wm8731_regmap = {
  535. .reg_bits = 7,
  536. .val_bits = 9,
  537. .max_register = WM8731_RESET,
  538. .volatile_reg = wm8731_volatile,
  539. .cache_type = REGCACHE_RBTREE,
  540. .reg_defaults = wm8731_reg_defaults,
  541. .num_reg_defaults = ARRAY_SIZE(wm8731_reg_defaults),
  542. };
  543. EXPORT_SYMBOL_GPL(wm8731_regmap);
  544. MODULE_DESCRIPTION("ASoC WM8731 driver");
  545. MODULE_AUTHOR("Richard Purdie");
  546. MODULE_LICENSE("GPL");