rt715.c 31 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * rt715.c -- rt715 ALSA SoC audio driver
  4. *
  5. * Copyright(c) 2019 Realtek Semiconductor Corp.
  6. *
  7. * ALC715 ASoC Codec Driver based Intel Dummy SdW codec driver
  8. *
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/delay.h>
  14. #include <linux/i2c.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/pm.h>
  17. #include <linux/soundwire/sdw.h>
  18. #include <linux/gpio.h>
  19. #include <linux/regmap.h>
  20. #include <linux/slab.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/gpio/consumer.h>
  24. #include <linux/of.h>
  25. #include <linux/of_gpio.h>
  26. #include <linux/of_device.h>
  27. #include <sound/core.h>
  28. #include <sound/pcm.h>
  29. #include <sound/pcm_params.h>
  30. #include <sound/soc.h>
  31. #include <sound/soc-dapm.h>
  32. #include <sound/initval.h>
  33. #include <sound/tlv.h>
  34. #include <sound/hda_verbs.h>
  35. #include "rt715.h"
  36. static int rt715_index_write(struct regmap *regmap, unsigned int reg,
  37. unsigned int value)
  38. {
  39. int ret;
  40. unsigned int addr = ((RT715_PRIV_INDEX_W_H) << 8) | reg;
  41. ret = regmap_write(regmap, addr, value);
  42. if (ret < 0) {
  43. pr_err("Failed to set private value: %08x <= %04x %d\n", ret,
  44. addr, value);
  45. }
  46. return ret;
  47. }
  48. static void rt715_get_gain(struct rt715_priv *rt715, unsigned int addr_h,
  49. unsigned int addr_l, unsigned int val_h,
  50. unsigned int *r_val, unsigned int *l_val)
  51. {
  52. int ret;
  53. /* R Channel */
  54. *r_val = val_h << 8;
  55. ret = regmap_read(rt715->regmap, addr_l, r_val);
  56. if (ret < 0)
  57. pr_err("Failed to get R channel gain.\n");
  58. /* L Channel */
  59. val_h |= 0x20;
  60. *l_val = val_h << 8;
  61. ret = regmap_read(rt715->regmap, addr_h, l_val);
  62. if (ret < 0)
  63. pr_err("Failed to get L channel gain.\n");
  64. }
  65. /* For Verb-Set Amplifier Gain (Verb ID = 3h) */
  66. static int rt715_set_amp_gain_put(struct snd_kcontrol *kcontrol,
  67. struct snd_ctl_elem_value *ucontrol)
  68. {
  69. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  70. struct snd_soc_dapm_context *dapm =
  71. snd_soc_component_get_dapm(component);
  72. struct soc_mixer_control *mc =
  73. (struct soc_mixer_control *)kcontrol->private_value;
  74. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  75. unsigned int addr_h, addr_l, val_h, val_ll, val_lr;
  76. unsigned int read_ll, read_rl, i;
  77. unsigned int k_vol_changed = 0;
  78. for (i = 0; i < 2; i++) {
  79. if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_vol_ori[i]) {
  80. k_vol_changed = 1;
  81. break;
  82. }
  83. }
  84. /* Can't use update bit function, so read the original value first */
  85. addr_h = mc->reg;
  86. addr_l = mc->rreg;
  87. if (mc->shift == RT715_DIR_OUT_SFT) /* output */
  88. val_h = 0x80;
  89. else /* input */
  90. val_h = 0x0;
  91. rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
  92. if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
  93. regmap_write(rt715->regmap,
  94. RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
  95. /* L Channel */
  96. rt715->kctl_2ch_vol_ori[0] = ucontrol->value.integer.value[0];
  97. /* for gain */
  98. val_ll = ((ucontrol->value.integer.value[0]) & 0x7f);
  99. if (val_ll > mc->max)
  100. val_ll = mc->max;
  101. /* keep mute status */
  102. val_ll |= read_ll & 0x80;
  103. /* R Channel */
  104. rt715->kctl_2ch_vol_ori[1] = ucontrol->value.integer.value[1];
  105. /* for gain */
  106. val_lr = ((ucontrol->value.integer.value[1]) & 0x7f);
  107. if (val_lr > mc->max)
  108. val_lr = mc->max;
  109. /* keep mute status */
  110. val_lr |= read_rl & 0x80;
  111. for (i = 0; i < 3; i++) { /* retry 3 times at most */
  112. if (val_ll == val_lr) {
  113. /* Set both L/R channels at the same time */
  114. val_h = (1 << mc->shift) | (3 << 4);
  115. regmap_write(rt715->regmap, addr_h,
  116. (val_h << 8) | val_ll);
  117. regmap_write(rt715->regmap, addr_l,
  118. (val_h << 8) | val_ll);
  119. } else {
  120. /* Lch*/
  121. val_h = (1 << mc->shift) | (1 << 5);
  122. regmap_write(rt715->regmap, addr_h,
  123. (val_h << 8) | val_ll);
  124. /* Rch */
  125. val_h = (1 << mc->shift) | (1 << 4);
  126. regmap_write(rt715->regmap, addr_l,
  127. (val_h << 8) | val_lr);
  128. }
  129. /* check result */
  130. if (mc->shift == RT715_DIR_OUT_SFT) /* output */
  131. val_h = 0x80;
  132. else /* input */
  133. val_h = 0x0;
  134. rt715_get_gain(rt715, addr_h, addr_l, val_h,
  135. &read_rl, &read_ll);
  136. if (read_rl == val_lr && read_ll == val_ll)
  137. break;
  138. }
  139. /* D0:power on state, D3: power saving mode */
  140. if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
  141. regmap_write(rt715->regmap,
  142. RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
  143. return k_vol_changed;
  144. }
  145. static int rt715_set_amp_gain_get(struct snd_kcontrol *kcontrol,
  146. struct snd_ctl_elem_value *ucontrol)
  147. {
  148. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  149. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  150. struct soc_mixer_control *mc =
  151. (struct soc_mixer_control *)kcontrol->private_value;
  152. unsigned int addr_h, addr_l, val_h;
  153. unsigned int read_ll, read_rl;
  154. addr_h = mc->reg;
  155. addr_l = mc->rreg;
  156. if (mc->shift == RT715_DIR_OUT_SFT) /* output */
  157. val_h = 0x80;
  158. else /* input */
  159. val_h = 0x0;
  160. rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
  161. if (mc->invert) {
  162. /* for mute status */
  163. read_ll = !(read_ll & 0x80);
  164. read_rl = !(read_rl & 0x80);
  165. } else {
  166. /* for gain */
  167. read_ll = read_ll & 0x7f;
  168. read_rl = read_rl & 0x7f;
  169. }
  170. ucontrol->value.integer.value[0] = read_ll;
  171. ucontrol->value.integer.value[1] = read_rl;
  172. return 0;
  173. }
  174. static int rt715_set_main_switch_put(struct snd_kcontrol *kcontrol,
  175. struct snd_ctl_elem_value *ucontrol)
  176. {
  177. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  178. struct snd_soc_dapm_context *dapm =
  179. snd_soc_component_get_dapm(component);
  180. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  181. unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
  182. RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
  183. RT715_SET_GAIN_MIX_ADC2_H};
  184. unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
  185. RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
  186. RT715_SET_GAIN_MIX_ADC2_L};
  187. unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
  188. unsigned int k_shift = RT715_DIR_IN_SFT, k_changed = 0;
  189. unsigned int read_ll, read_rl, i, j, loop_cnt = 4;
  190. for (i = 0; i < 8; i++) {
  191. if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_switch_ori[i])
  192. k_changed = 1;
  193. }
  194. for (j = 0; j < loop_cnt; j++) {
  195. /* Can't use update bit function, so read the original value first */
  196. addr_h = capture_reg_H[j];
  197. addr_l = capture_reg_L[j];
  198. rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
  199. if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
  200. regmap_write(rt715->regmap,
  201. RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
  202. /* L Channel */
  203. /* for mute */
  204. rt715->kctl_8ch_switch_ori[j * 2] =
  205. ucontrol->value.integer.value[j * 2];
  206. val_ll = (!ucontrol->value.integer.value[j * 2]) << 7;
  207. /* keep gain */
  208. val_ll |= read_ll & 0x7f;
  209. /* R Channel */
  210. /* for mute */
  211. rt715->kctl_8ch_switch_ori[j * 2 + 1] =
  212. ucontrol->value.integer.value[j * 2 + 1];
  213. val_lr = (!ucontrol->value.integer.value[j * 2 + 1]) << 7;
  214. /* keep gain */
  215. val_lr |= read_rl & 0x7f;
  216. for (i = 0; i < 3; i++) { /* retry 3 times at most */
  217. if (val_ll == val_lr) {
  218. /* Set both L/R channels at the same time */
  219. val_h = (1 << k_shift) | (3 << 4);
  220. regmap_write(rt715->regmap, addr_h,
  221. (val_h << 8) | val_ll);
  222. regmap_write(rt715->regmap, addr_l,
  223. (val_h << 8) | val_ll);
  224. } else {
  225. /* Lch*/
  226. val_h = (1 << k_shift) | (1 << 5);
  227. regmap_write(rt715->regmap, addr_h,
  228. (val_h << 8) | val_ll);
  229. /* Rch */
  230. val_h = (1 << k_shift) | (1 << 4);
  231. regmap_write(rt715->regmap, addr_l,
  232. (val_h << 8) | val_lr);
  233. }
  234. val_h = 0x0;
  235. rt715_get_gain(rt715, addr_h, addr_l, val_h,
  236. &read_rl, &read_ll);
  237. if (read_rl == val_lr && read_ll == val_ll)
  238. break;
  239. }
  240. }
  241. /* D0:power on state, D3: power saving mode */
  242. if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
  243. regmap_write(rt715->regmap,
  244. RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
  245. return k_changed;
  246. }
  247. static int rt715_set_main_switch_get(struct snd_kcontrol *kcontrol,
  248. struct snd_ctl_elem_value *ucontrol)
  249. {
  250. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  251. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  252. unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
  253. RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
  254. RT715_SET_GAIN_MIX_ADC2_H};
  255. unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
  256. RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
  257. RT715_SET_GAIN_MIX_ADC2_L};
  258. unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
  259. unsigned int read_ll, read_rl;
  260. for (i = 0; i < loop_cnt; i++) {
  261. addr_h = capture_reg_H[i];
  262. addr_l = capture_reg_L[i];
  263. rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
  264. ucontrol->value.integer.value[i * 2] = !(read_ll & 0x80);
  265. ucontrol->value.integer.value[i * 2 + 1] = !(read_rl & 0x80);
  266. }
  267. return 0;
  268. }
  269. static int rt715_set_main_vol_put(struct snd_kcontrol *kcontrol,
  270. struct snd_ctl_elem_value *ucontrol)
  271. {
  272. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  273. struct snd_soc_dapm_context *dapm =
  274. snd_soc_component_get_dapm(component);
  275. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  276. unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
  277. RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
  278. RT715_SET_GAIN_MIX_ADC2_H};
  279. unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
  280. RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
  281. RT715_SET_GAIN_MIX_ADC2_L};
  282. unsigned int addr_h, addr_l, val_h = 0x0, val_ll, val_lr;
  283. unsigned int read_ll, read_rl, i, j, loop_cnt = 4, k_changed = 0;
  284. unsigned int k_shift = RT715_DIR_IN_SFT, k_max = 0x3f;
  285. for (i = 0; i < 8; i++) {
  286. if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_vol_ori[i])
  287. k_changed = 1;
  288. }
  289. for (j = 0; j < loop_cnt; j++) {
  290. addr_h = capture_reg_H[j];
  291. addr_l = capture_reg_L[j];
  292. rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
  293. if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
  294. regmap_write(rt715->regmap,
  295. RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D0);
  296. /* L Channel */
  297. /* for gain */
  298. rt715->kctl_8ch_vol_ori[j * 2] = ucontrol->value.integer.value[j * 2];
  299. val_ll = ((ucontrol->value.integer.value[j * 2]) & 0x7f);
  300. if (val_ll > k_max)
  301. val_ll = k_max;
  302. /* keep mute status */
  303. val_ll |= read_ll & 0x80;
  304. /* R Channel */
  305. /* for gain */
  306. rt715->kctl_8ch_vol_ori[j * 2 + 1] =
  307. ucontrol->value.integer.value[j * 2 + 1];
  308. val_lr = ((ucontrol->value.integer.value[j * 2 + 1]) & 0x7f);
  309. if (val_lr > k_max)
  310. val_lr = k_max;
  311. /* keep mute status */
  312. val_lr |= read_rl & 0x80;
  313. for (i = 0; i < 3; i++) { /* retry 3 times at most */
  314. if (val_ll == val_lr) {
  315. /* Set both L/R channels at the same time */
  316. val_h = (1 << k_shift) | (3 << 4);
  317. regmap_write(rt715->regmap, addr_h,
  318. (val_h << 8) | val_ll);
  319. regmap_write(rt715->regmap, addr_l,
  320. (val_h << 8) | val_ll);
  321. } else {
  322. /* Lch*/
  323. val_h = (1 << k_shift) | (1 << 5);
  324. regmap_write(rt715->regmap, addr_h,
  325. (val_h << 8) | val_ll);
  326. /* Rch */
  327. val_h = (1 << k_shift) | (1 << 4);
  328. regmap_write(rt715->regmap, addr_l,
  329. (val_h << 8) | val_lr);
  330. }
  331. val_h = 0x0;
  332. rt715_get_gain(rt715, addr_h, addr_l, val_h,
  333. &read_rl, &read_ll);
  334. if (read_rl == val_lr && read_ll == val_ll)
  335. break;
  336. }
  337. }
  338. /* D0:power on state, D3: power saving mode */
  339. if (dapm->bias_level <= SND_SOC_BIAS_STANDBY)
  340. regmap_write(rt715->regmap,
  341. RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
  342. return k_changed;
  343. }
  344. static int rt715_set_main_vol_get(struct snd_kcontrol *kcontrol,
  345. struct snd_ctl_elem_value *ucontrol)
  346. {
  347. struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
  348. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  349. unsigned int capture_reg_H[] = {RT715_SET_GAIN_MIC_ADC_H,
  350. RT715_SET_GAIN_LINE_ADC_H, RT715_SET_GAIN_MIX_ADC_H,
  351. RT715_SET_GAIN_MIX_ADC2_H};
  352. unsigned int capture_reg_L[] = {RT715_SET_GAIN_MIC_ADC_L,
  353. RT715_SET_GAIN_LINE_ADC_L, RT715_SET_GAIN_MIX_ADC_L,
  354. RT715_SET_GAIN_MIX_ADC2_L};
  355. unsigned int addr_h, addr_l, val_h = 0x0, i, loop_cnt = 4;
  356. unsigned int read_ll, read_rl;
  357. for (i = 0; i < loop_cnt; i++) {
  358. addr_h = capture_reg_H[i];
  359. addr_l = capture_reg_L[i];
  360. rt715_get_gain(rt715, addr_h, addr_l, val_h, &read_rl, &read_ll);
  361. ucontrol->value.integer.value[i * 2] = read_ll & 0x7f;
  362. ucontrol->value.integer.value[i * 2 + 1] = read_rl & 0x7f;
  363. }
  364. return 0;
  365. }
  366. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
  367. static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
  368. static int rt715_switch_info(struct snd_kcontrol *kcontrol,
  369. struct snd_ctl_elem_info *uinfo)
  370. {
  371. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  372. uinfo->count = 8;
  373. uinfo->value.integer.min = 0;
  374. uinfo->value.integer.max = 1;
  375. return 0;
  376. }
  377. static int rt715_vol_info(struct snd_kcontrol *kcontrol,
  378. struct snd_ctl_elem_info *uinfo)
  379. {
  380. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  381. uinfo->count = 8;
  382. uinfo->value.integer.min = 0;
  383. uinfo->value.integer.max = 0x3f;
  384. return 0;
  385. }
  386. #define SOC_DOUBLE_R_EXT(xname, reg_left, reg_right, xshift, xmax, xinvert,\
  387. xhandler_get, xhandler_put) \
  388. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
  389. .info = snd_soc_info_volsw, \
  390. .get = xhandler_get, .put = xhandler_put, \
  391. .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \
  392. xmax, xinvert) }
  393. #define RT715_MAIN_SWITCH_EXT(xname, xhandler_get, xhandler_put) \
  394. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
  395. .info = rt715_switch_info, \
  396. .get = xhandler_get, .put = xhandler_put, \
  397. }
  398. #define RT715_MAIN_VOL_EXT_TLV(xname, xhandler_get, xhandler_put, tlv_array) \
  399. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
  400. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
  401. SNDRV_CTL_ELEM_ACCESS_READWRITE, \
  402. .tlv.p = (tlv_array), \
  403. .info = rt715_vol_info, \
  404. .get = xhandler_get, .put = xhandler_put, \
  405. }
  406. static const struct snd_kcontrol_new rt715_snd_controls[] = {
  407. /* Capture switch */
  408. RT715_MAIN_SWITCH_EXT("Capture Switch",
  409. rt715_set_main_switch_get, rt715_set_main_switch_put),
  410. /* Volume Control */
  411. RT715_MAIN_VOL_EXT_TLV("Capture Volume",
  412. rt715_set_main_vol_get, rt715_set_main_vol_put, in_vol_tlv),
  413. /* MIC Boost Control */
  414. SOC_DOUBLE_R_EXT_TLV("DMIC1 Boost", RT715_SET_GAIN_DMIC1_H,
  415. RT715_SET_GAIN_DMIC1_L, RT715_DIR_IN_SFT, 3, 0,
  416. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  417. mic_vol_tlv),
  418. SOC_DOUBLE_R_EXT_TLV("DMIC2 Boost", RT715_SET_GAIN_DMIC2_H,
  419. RT715_SET_GAIN_DMIC2_L, RT715_DIR_IN_SFT, 3, 0,
  420. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  421. mic_vol_tlv),
  422. SOC_DOUBLE_R_EXT_TLV("DMIC3 Boost", RT715_SET_GAIN_DMIC3_H,
  423. RT715_SET_GAIN_DMIC3_L, RT715_DIR_IN_SFT, 3, 0,
  424. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  425. mic_vol_tlv),
  426. SOC_DOUBLE_R_EXT_TLV("DMIC4 Boost", RT715_SET_GAIN_DMIC4_H,
  427. RT715_SET_GAIN_DMIC4_L, RT715_DIR_IN_SFT, 3, 0,
  428. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  429. mic_vol_tlv),
  430. SOC_DOUBLE_R_EXT_TLV("MIC1 Boost", RT715_SET_GAIN_MIC1_H,
  431. RT715_SET_GAIN_MIC1_L, RT715_DIR_IN_SFT, 3, 0,
  432. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  433. mic_vol_tlv),
  434. SOC_DOUBLE_R_EXT_TLV("MIC2 Boost", RT715_SET_GAIN_MIC2_H,
  435. RT715_SET_GAIN_MIC2_L, RT715_DIR_IN_SFT, 3, 0,
  436. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  437. mic_vol_tlv),
  438. SOC_DOUBLE_R_EXT_TLV("LINE1 Boost", RT715_SET_GAIN_LINE1_H,
  439. RT715_SET_GAIN_LINE1_L, RT715_DIR_IN_SFT, 3, 0,
  440. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  441. mic_vol_tlv),
  442. SOC_DOUBLE_R_EXT_TLV("LINE2 Boost", RT715_SET_GAIN_LINE2_H,
  443. RT715_SET_GAIN_LINE2_L, RT715_DIR_IN_SFT, 3, 0,
  444. rt715_set_amp_gain_get, rt715_set_amp_gain_put,
  445. mic_vol_tlv),
  446. };
  447. static int rt715_mux_get(struct snd_kcontrol *kcontrol,
  448. struct snd_ctl_elem_value *ucontrol)
  449. {
  450. struct snd_soc_component *component =
  451. snd_soc_dapm_kcontrol_component(kcontrol);
  452. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  453. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  454. unsigned int reg, val;
  455. int ret;
  456. /* nid = e->reg, vid = 0xf01 */
  457. reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
  458. ret = regmap_read(rt715->regmap, reg, &val);
  459. if (ret < 0) {
  460. dev_err(component->dev, "%s: sdw read failed: %d\n",
  461. __func__, ret);
  462. return ret;
  463. }
  464. /*
  465. * The first two indices of ADC Mux 24/25 are routed to the same
  466. * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
  467. * To have a unique set of inputs, we skip the index1 of the muxes.
  468. */
  469. if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0))
  470. val -= 1;
  471. ucontrol->value.enumerated.item[0] = val;
  472. return 0;
  473. }
  474. static int rt715_mux_put(struct snd_kcontrol *kcontrol,
  475. struct snd_ctl_elem_value *ucontrol)
  476. {
  477. struct snd_soc_component *component =
  478. snd_soc_dapm_kcontrol_component(kcontrol);
  479. struct snd_soc_dapm_context *dapm =
  480. snd_soc_dapm_kcontrol_dapm(kcontrol);
  481. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  482. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  483. unsigned int *item = ucontrol->value.enumerated.item;
  484. unsigned int val, val2 = 0, change, reg;
  485. int ret;
  486. if (item[0] >= e->items)
  487. return -EINVAL;
  488. /* Verb ID = 0x701h, nid = e->reg */
  489. val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
  490. reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
  491. ret = regmap_read(rt715->regmap, reg, &val2);
  492. if (ret < 0) {
  493. dev_err(component->dev, "%s: sdw read failed: %d\n",
  494. __func__, ret);
  495. return ret;
  496. }
  497. if (val == val2)
  498. change = 0;
  499. else
  500. change = 1;
  501. if (change) {
  502. reg = RT715_VERB_SET_CONNECT_SEL | e->reg;
  503. regmap_write(rt715->regmap, reg, val);
  504. }
  505. snd_soc_dapm_mux_update_power(dapm, kcontrol,
  506. item[0], e, NULL);
  507. return change;
  508. }
  509. static const char * const adc_22_23_mux_text[] = {
  510. "MIC1",
  511. "MIC2",
  512. "LINE1",
  513. "LINE2",
  514. "DMIC1",
  515. "DMIC2",
  516. "DMIC3",
  517. "DMIC4",
  518. };
  519. /*
  520. * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
  521. * 1 will be connected to the same dmic source, therefore we skip index 1 to
  522. * avoid misunderstanding on usage of dapm routing.
  523. */
  524. static const unsigned int rt715_adc_24_25_values[] = {
  525. 0,
  526. 2,
  527. 3,
  528. 4,
  529. 5,
  530. };
  531. static const char * const adc_24_mux_text[] = {
  532. "MIC2",
  533. "DMIC1",
  534. "DMIC2",
  535. "DMIC3",
  536. "DMIC4",
  537. };
  538. static const char * const adc_25_mux_text[] = {
  539. "MIC1",
  540. "DMIC1",
  541. "DMIC2",
  542. "DMIC3",
  543. "DMIC4",
  544. };
  545. static SOC_ENUM_SINGLE_DECL(
  546. rt715_adc22_enum, RT715_MUX_IN1, 0, adc_22_23_mux_text);
  547. static SOC_ENUM_SINGLE_DECL(
  548. rt715_adc23_enum, RT715_MUX_IN2, 0, adc_22_23_mux_text);
  549. static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
  550. RT715_MUX_IN3, 0, 0xf,
  551. adc_24_mux_text, rt715_adc_24_25_values);
  552. static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
  553. RT715_MUX_IN4, 0, 0xf,
  554. adc_25_mux_text, rt715_adc_24_25_values);
  555. static const struct snd_kcontrol_new rt715_adc22_mux =
  556. SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
  557. rt715_mux_get, rt715_mux_put);
  558. static const struct snd_kcontrol_new rt715_adc23_mux =
  559. SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
  560. rt715_mux_get, rt715_mux_put);
  561. static const struct snd_kcontrol_new rt715_adc24_mux =
  562. SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
  563. rt715_mux_get, rt715_mux_put);
  564. static const struct snd_kcontrol_new rt715_adc25_mux =
  565. SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
  566. rt715_mux_get, rt715_mux_put);
  567. static const struct snd_soc_dapm_widget rt715_dapm_widgets[] = {
  568. SND_SOC_DAPM_INPUT("DMIC1"),
  569. SND_SOC_DAPM_INPUT("DMIC2"),
  570. SND_SOC_DAPM_INPUT("DMIC3"),
  571. SND_SOC_DAPM_INPUT("DMIC4"),
  572. SND_SOC_DAPM_INPUT("MIC1"),
  573. SND_SOC_DAPM_INPUT("MIC2"),
  574. SND_SOC_DAPM_INPUT("LINE1"),
  575. SND_SOC_DAPM_INPUT("LINE2"),
  576. SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
  577. SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
  578. SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
  579. SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
  580. SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
  581. &rt715_adc22_mux),
  582. SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
  583. &rt715_adc23_mux),
  584. SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
  585. &rt715_adc24_mux),
  586. SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
  587. &rt715_adc25_mux),
  588. SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
  589. SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
  590. };
  591. static const struct snd_soc_dapm_route rt715_audio_map[] = {
  592. {"DP6TX", NULL, "ADC 09"},
  593. {"DP6TX", NULL, "ADC 08"},
  594. {"DP4TX", NULL, "ADC 07"},
  595. {"DP4TX", NULL, "ADC 27"},
  596. {"ADC 09", NULL, "ADC 22 Mux"},
  597. {"ADC 08", NULL, "ADC 23 Mux"},
  598. {"ADC 07", NULL, "ADC 24 Mux"},
  599. {"ADC 27", NULL, "ADC 25 Mux"},
  600. {"ADC 22 Mux", "MIC1", "MIC1"},
  601. {"ADC 22 Mux", "MIC2", "MIC2"},
  602. {"ADC 22 Mux", "LINE1", "LINE1"},
  603. {"ADC 22 Mux", "LINE2", "LINE2"},
  604. {"ADC 22 Mux", "DMIC1", "DMIC1"},
  605. {"ADC 22 Mux", "DMIC2", "DMIC2"},
  606. {"ADC 22 Mux", "DMIC3", "DMIC3"},
  607. {"ADC 22 Mux", "DMIC4", "DMIC4"},
  608. {"ADC 23 Mux", "MIC1", "MIC1"},
  609. {"ADC 23 Mux", "MIC2", "MIC2"},
  610. {"ADC 23 Mux", "LINE1", "LINE1"},
  611. {"ADC 23 Mux", "LINE2", "LINE2"},
  612. {"ADC 23 Mux", "DMIC1", "DMIC1"},
  613. {"ADC 23 Mux", "DMIC2", "DMIC2"},
  614. {"ADC 23 Mux", "DMIC3", "DMIC3"},
  615. {"ADC 23 Mux", "DMIC4", "DMIC4"},
  616. {"ADC 24 Mux", "MIC2", "MIC2"},
  617. {"ADC 24 Mux", "DMIC1", "DMIC1"},
  618. {"ADC 24 Mux", "DMIC2", "DMIC2"},
  619. {"ADC 24 Mux", "DMIC3", "DMIC3"},
  620. {"ADC 24 Mux", "DMIC4", "DMIC4"},
  621. {"ADC 25 Mux", "MIC1", "MIC1"},
  622. {"ADC 25 Mux", "DMIC1", "DMIC1"},
  623. {"ADC 25 Mux", "DMIC2", "DMIC2"},
  624. {"ADC 25 Mux", "DMIC3", "DMIC3"},
  625. {"ADC 25 Mux", "DMIC4", "DMIC4"},
  626. };
  627. static int rt715_set_bias_level(struct snd_soc_component *component,
  628. enum snd_soc_bias_level level)
  629. {
  630. struct snd_soc_dapm_context *dapm =
  631. snd_soc_component_get_dapm(component);
  632. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  633. switch (level) {
  634. case SND_SOC_BIAS_PREPARE:
  635. if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
  636. regmap_write(rt715->regmap,
  637. RT715_SET_AUDIO_POWER_STATE,
  638. AC_PWRST_D0);
  639. msleep(RT715_POWER_UP_DELAY_MS);
  640. }
  641. break;
  642. case SND_SOC_BIAS_STANDBY:
  643. regmap_write(rt715->regmap,
  644. RT715_SET_AUDIO_POWER_STATE,
  645. AC_PWRST_D3);
  646. break;
  647. default:
  648. break;
  649. }
  650. dapm->bias_level = level;
  651. return 0;
  652. }
  653. static int rt715_probe(struct snd_soc_component *component)
  654. {
  655. int ret;
  656. ret = pm_runtime_resume(component->dev);
  657. if (ret < 0 && ret != -EACCES)
  658. return ret;
  659. return 0;
  660. }
  661. static const struct snd_soc_component_driver soc_codec_dev_rt715 = {
  662. .probe = rt715_probe,
  663. .set_bias_level = rt715_set_bias_level,
  664. .controls = rt715_snd_controls,
  665. .num_controls = ARRAY_SIZE(rt715_snd_controls),
  666. .dapm_widgets = rt715_dapm_widgets,
  667. .num_dapm_widgets = ARRAY_SIZE(rt715_dapm_widgets),
  668. .dapm_routes = rt715_audio_map,
  669. .num_dapm_routes = ARRAY_SIZE(rt715_audio_map),
  670. .endianness = 1,
  671. };
  672. static int rt715_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
  673. int direction)
  674. {
  675. struct sdw_stream_data *stream;
  676. if (!sdw_stream)
  677. return 0;
  678. stream = kzalloc(sizeof(*stream), GFP_KERNEL);
  679. if (!stream)
  680. return -ENOMEM;
  681. stream->sdw_stream = sdw_stream;
  682. /* Use tx_mask or rx_mask to configure stream tag and set dma_data */
  683. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  684. dai->playback_dma_data = stream;
  685. else
  686. dai->capture_dma_data = stream;
  687. return 0;
  688. }
  689. static void rt715_shutdown(struct snd_pcm_substream *substream,
  690. struct snd_soc_dai *dai)
  691. {
  692. struct sdw_stream_data *stream;
  693. stream = snd_soc_dai_get_dma_data(dai, substream);
  694. snd_soc_dai_set_dma_data(dai, substream, NULL);
  695. kfree(stream);
  696. }
  697. static int rt715_pcm_hw_params(struct snd_pcm_substream *substream,
  698. struct snd_pcm_hw_params *params,
  699. struct snd_soc_dai *dai)
  700. {
  701. struct snd_soc_component *component = dai->component;
  702. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  703. struct sdw_stream_config stream_config;
  704. struct sdw_port_config port_config;
  705. enum sdw_data_direction direction;
  706. struct sdw_stream_data *stream;
  707. int retval, port, num_channels;
  708. unsigned int val = 0;
  709. stream = snd_soc_dai_get_dma_data(dai, substream);
  710. if (!stream)
  711. return -EINVAL;
  712. if (!rt715->slave)
  713. return -EINVAL;
  714. switch (dai->id) {
  715. case RT715_AIF1:
  716. direction = SDW_DATA_DIR_TX;
  717. port = 6;
  718. rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500);
  719. break;
  720. case RT715_AIF2:
  721. direction = SDW_DATA_DIR_TX;
  722. port = 4;
  723. rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000);
  724. break;
  725. default:
  726. dev_err(component->dev, "Invalid DAI id %d\n", dai->id);
  727. return -EINVAL;
  728. }
  729. stream_config.frame_rate = params_rate(params);
  730. stream_config.ch_count = params_channels(params);
  731. stream_config.bps = snd_pcm_format_width(params_format(params));
  732. stream_config.direction = direction;
  733. num_channels = params_channels(params);
  734. port_config.ch_mask = (1 << (num_channels)) - 1;
  735. port_config.num = port;
  736. retval = sdw_stream_add_slave(rt715->slave, &stream_config,
  737. &port_config, 1, stream->sdw_stream);
  738. if (retval) {
  739. dev_err(dai->dev, "Unable to configure port\n");
  740. return retval;
  741. }
  742. switch (params_rate(params)) {
  743. /* bit 14 0:48K 1:44.1K */
  744. /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */
  745. case 44100:
  746. val |= 0x40 << 8;
  747. break;
  748. case 48000:
  749. val |= 0x0 << 8;
  750. break;
  751. default:
  752. dev_err(component->dev, "Unsupported sample rate %d\n",
  753. params_rate(params));
  754. return -EINVAL;
  755. }
  756. if (params_channels(params) <= 16) {
  757. /* bit 3:0 Number of Channel */
  758. val |= (params_channels(params) - 1);
  759. } else {
  760. dev_err(component->dev, "Unsupported channels %d\n",
  761. params_channels(params));
  762. return -EINVAL;
  763. }
  764. switch (params_width(params)) {
  765. /* bit 6:4 Bits per Sample */
  766. case 8:
  767. break;
  768. case 16:
  769. val |= (0x1 << 4);
  770. break;
  771. case 20:
  772. val |= (0x2 << 4);
  773. break;
  774. case 24:
  775. val |= (0x3 << 4);
  776. break;
  777. case 32:
  778. val |= (0x4 << 4);
  779. break;
  780. default:
  781. return -EINVAL;
  782. }
  783. regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val);
  784. regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val);
  785. regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val);
  786. regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val);
  787. return retval;
  788. }
  789. static int rt715_pcm_hw_free(struct snd_pcm_substream *substream,
  790. struct snd_soc_dai *dai)
  791. {
  792. struct snd_soc_component *component = dai->component;
  793. struct rt715_priv *rt715 = snd_soc_component_get_drvdata(component);
  794. struct sdw_stream_data *stream =
  795. snd_soc_dai_get_dma_data(dai, substream);
  796. if (!rt715->slave)
  797. return -EINVAL;
  798. sdw_stream_remove_slave(rt715->slave, stream->sdw_stream);
  799. return 0;
  800. }
  801. #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
  802. #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  803. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
  804. static const struct snd_soc_dai_ops rt715_ops = {
  805. .hw_params = rt715_pcm_hw_params,
  806. .hw_free = rt715_pcm_hw_free,
  807. .set_stream = rt715_set_sdw_stream,
  808. .shutdown = rt715_shutdown,
  809. };
  810. static struct snd_soc_dai_driver rt715_dai[] = {
  811. {
  812. .name = "rt715-aif1",
  813. .id = RT715_AIF1,
  814. .capture = {
  815. .stream_name = "DP6 Capture",
  816. .channels_min = 1,
  817. .channels_max = 2,
  818. .rates = RT715_STEREO_RATES,
  819. .formats = RT715_FORMATS,
  820. },
  821. .ops = &rt715_ops,
  822. },
  823. {
  824. .name = "rt715-aif2",
  825. .id = RT715_AIF2,
  826. .capture = {
  827. .stream_name = "DP4 Capture",
  828. .channels_min = 1,
  829. .channels_max = 2,
  830. .rates = RT715_STEREO_RATES,
  831. .formats = RT715_FORMATS,
  832. },
  833. .ops = &rt715_ops,
  834. },
  835. };
  836. /* Bus clock frequency */
  837. #define RT715_CLK_FREQ_9600000HZ 9600000
  838. #define RT715_CLK_FREQ_12000000HZ 12000000
  839. #define RT715_CLK_FREQ_6000000HZ 6000000
  840. #define RT715_CLK_FREQ_4800000HZ 4800000
  841. #define RT715_CLK_FREQ_2400000HZ 2400000
  842. #define RT715_CLK_FREQ_12288000HZ 12288000
  843. int rt715_clock_config(struct device *dev)
  844. {
  845. struct rt715_priv *rt715 = dev_get_drvdata(dev);
  846. unsigned int clk_freq, value;
  847. clk_freq = (rt715->params.curr_dr_freq >> 1);
  848. switch (clk_freq) {
  849. case RT715_CLK_FREQ_12000000HZ:
  850. value = 0x0;
  851. break;
  852. case RT715_CLK_FREQ_6000000HZ:
  853. value = 0x1;
  854. break;
  855. case RT715_CLK_FREQ_9600000HZ:
  856. value = 0x2;
  857. break;
  858. case RT715_CLK_FREQ_4800000HZ:
  859. value = 0x3;
  860. break;
  861. case RT715_CLK_FREQ_2400000HZ:
  862. value = 0x4;
  863. break;
  864. case RT715_CLK_FREQ_12288000HZ:
  865. value = 0x5;
  866. break;
  867. default:
  868. return -EINVAL;
  869. }
  870. regmap_write(rt715->regmap, 0xe0, value);
  871. regmap_write(rt715->regmap, 0xf0, value);
  872. return 0;
  873. }
  874. int rt715_init(struct device *dev, struct regmap *sdw_regmap,
  875. struct regmap *regmap, struct sdw_slave *slave)
  876. {
  877. struct rt715_priv *rt715;
  878. int ret;
  879. rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
  880. if (!rt715)
  881. return -ENOMEM;
  882. dev_set_drvdata(dev, rt715);
  883. rt715->slave = slave;
  884. rt715->regmap = regmap;
  885. rt715->sdw_regmap = sdw_regmap;
  886. /*
  887. * Mark hw_init to false
  888. * HW init will be performed when device reports present
  889. */
  890. rt715->hw_init = false;
  891. rt715->first_hw_init = false;
  892. ret = devm_snd_soc_register_component(dev,
  893. &soc_codec_dev_rt715,
  894. rt715_dai,
  895. ARRAY_SIZE(rt715_dai));
  896. return ret;
  897. }
  898. int rt715_io_init(struct device *dev, struct sdw_slave *slave)
  899. {
  900. struct rt715_priv *rt715 = dev_get_drvdata(dev);
  901. if (rt715->hw_init)
  902. return 0;
  903. /*
  904. * PM runtime is only enabled when a Slave reports as Attached
  905. */
  906. if (!rt715->first_hw_init) {
  907. /* set autosuspend parameters */
  908. pm_runtime_set_autosuspend_delay(&slave->dev, 3000);
  909. pm_runtime_use_autosuspend(&slave->dev);
  910. /* update count of parent 'active' children */
  911. pm_runtime_set_active(&slave->dev);
  912. /* make sure the device does not suspend immediately */
  913. pm_runtime_mark_last_busy(&slave->dev);
  914. pm_runtime_enable(&slave->dev);
  915. }
  916. pm_runtime_get_noresume(&slave->dev);
  917. /* Mute nid=08h/09h */
  918. regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080);
  919. regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080);
  920. /* Mute nid=07h/27h */
  921. regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080);
  922. regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080);
  923. /* Set Pin Widget */
  924. regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20);
  925. regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20);
  926. regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20);
  927. regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20);
  928. /* Set Converter Stream */
  929. regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10);
  930. regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10);
  931. regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10);
  932. regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10);
  933. /* Set Configuration Default */
  934. regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0);
  935. regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11);
  936. regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1);
  937. regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81);
  938. regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1);
  939. regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11);
  940. regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1);
  941. regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81);
  942. regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0);
  943. regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11);
  944. regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1);
  945. regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81);
  946. regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1);
  947. regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11);
  948. regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1);
  949. regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81);
  950. /* Finish Initial Settings, set power to D3 */
  951. regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3);
  952. if (rt715->first_hw_init)
  953. regcache_mark_dirty(rt715->regmap);
  954. else
  955. rt715->first_hw_init = true;
  956. /* Mark Slave initialization complete */
  957. rt715->hw_init = true;
  958. pm_runtime_mark_last_busy(&slave->dev);
  959. pm_runtime_put_autosuspend(&slave->dev);
  960. return 0;
  961. }
  962. MODULE_DESCRIPTION("ASoC rt715 driver");
  963. MODULE_DESCRIPTION("ASoC rt715 driver SDW");
  964. MODULE_AUTHOR("Jack Yu <[email protected]>");
  965. MODULE_LICENSE("GPL v2");