rt5670.c 101 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * rt5670.c -- RT5670 ALSA SoC audio codec driver
  4. *
  5. * Copyright 2014 Realtek Semiconductor Corp.
  6. * Author: Bard Liao <[email protected]>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/moduleparam.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/pm.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/i2c.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/acpi.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/dmi.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/jack.h>
  23. #include <sound/soc.h>
  24. #include <sound/soc-dapm.h>
  25. #include <sound/initval.h>
  26. #include <sound/tlv.h>
  27. #include "rl6231.h"
  28. #include "rt5670.h"
  29. #include "rt5670-dsp.h"
  30. #define RT5670_GPIO1_IS_IRQ BIT(0)
  31. #define RT5670_IN2_DIFF BIT(1)
  32. #define RT5670_DMIC_EN BIT(2)
  33. #define RT5670_DMIC1_IN2P BIT(3)
  34. #define RT5670_DMIC1_GPIO6 BIT(4)
  35. #define RT5670_DMIC1_GPIO7 BIT(5)
  36. #define RT5670_DMIC2_INR BIT(6)
  37. #define RT5670_DMIC2_GPIO8 BIT(7)
  38. #define RT5670_DMIC3_GPIO5 BIT(8)
  39. #define RT5670_JD_MODE1 BIT(9)
  40. #define RT5670_JD_MODE2 BIT(10)
  41. #define RT5670_JD_MODE3 BIT(11)
  42. #define RT5670_GPIO1_IS_EXT_SPK_EN BIT(12)
  43. static unsigned long rt5670_quirk;
  44. static unsigned int quirk_override;
  45. module_param_named(quirk, quirk_override, uint, 0444);
  46. MODULE_PARM_DESC(quirk, "Board-specific quirk override");
  47. #define RT5670_DEVICE_ID 0x6271
  48. #define RT5670_PR_RANGE_BASE (0xff + 1)
  49. #define RT5670_PR_SPACING 0x100
  50. #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
  51. static const struct regmap_range_cfg rt5670_ranges[] = {
  52. { .name = "PR", .range_min = RT5670_PR_BASE,
  53. .range_max = RT5670_PR_BASE + 0xf8,
  54. .selector_reg = RT5670_PRIV_INDEX,
  55. .selector_mask = 0xff,
  56. .selector_shift = 0x0,
  57. .window_start = RT5670_PRIV_DATA,
  58. .window_len = 0x1, },
  59. };
  60. static const struct reg_sequence init_list[] = {
  61. { RT5670_PR_BASE + 0x14, 0x9a8a },
  62. { RT5670_PR_BASE + 0x38, 0x1fe1 },
  63. { RT5670_PR_BASE + 0x3d, 0x3640 },
  64. { 0x8a, 0x0123 },
  65. };
  66. static const struct reg_default rt5670_reg[] = {
  67. { 0x00, 0x0000 },
  68. { 0x02, 0x8888 },
  69. { 0x03, 0x8888 },
  70. { 0x0a, 0x0001 },
  71. { 0x0b, 0x0827 },
  72. { 0x0c, 0x0000 },
  73. { 0x0d, 0x0008 },
  74. { 0x0e, 0x0000 },
  75. { 0x0f, 0x0808 },
  76. { 0x19, 0xafaf },
  77. { 0x1a, 0xafaf },
  78. { 0x1b, 0x0011 },
  79. { 0x1c, 0x2f2f },
  80. { 0x1d, 0x2f2f },
  81. { 0x1e, 0x0000 },
  82. { 0x1f, 0x2f2f },
  83. { 0x20, 0x0000 },
  84. { 0x26, 0x7860 },
  85. { 0x27, 0x7860 },
  86. { 0x28, 0x7871 },
  87. { 0x29, 0x8080 },
  88. { 0x2a, 0x5656 },
  89. { 0x2b, 0x5454 },
  90. { 0x2c, 0xaaa0 },
  91. { 0x2d, 0x0000 },
  92. { 0x2e, 0x2f2f },
  93. { 0x2f, 0x1002 },
  94. { 0x30, 0x0000 },
  95. { 0x31, 0x5f00 },
  96. { 0x32, 0x0000 },
  97. { 0x33, 0x0000 },
  98. { 0x34, 0x0000 },
  99. { 0x35, 0x0000 },
  100. { 0x36, 0x0000 },
  101. { 0x37, 0x0000 },
  102. { 0x38, 0x0000 },
  103. { 0x3b, 0x0000 },
  104. { 0x3c, 0x007f },
  105. { 0x3d, 0x0000 },
  106. { 0x3e, 0x007f },
  107. { 0x45, 0xe00f },
  108. { 0x4c, 0x5380 },
  109. { 0x4f, 0x0073 },
  110. { 0x52, 0x00d3 },
  111. { 0x53, 0xf000 },
  112. { 0x61, 0x0000 },
  113. { 0x62, 0x0001 },
  114. { 0x63, 0x00c3 },
  115. { 0x64, 0x0000 },
  116. { 0x65, 0x0001 },
  117. { 0x66, 0x0000 },
  118. { 0x6f, 0x8000 },
  119. { 0x70, 0x8000 },
  120. { 0x71, 0x8000 },
  121. { 0x72, 0x8000 },
  122. { 0x73, 0x7770 },
  123. { 0x74, 0x0e00 },
  124. { 0x75, 0x1505 },
  125. { 0x76, 0x0015 },
  126. { 0x77, 0x0c00 },
  127. { 0x78, 0x4000 },
  128. { 0x79, 0x0123 },
  129. { 0x7f, 0x1100 },
  130. { 0x80, 0x0000 },
  131. { 0x81, 0x0000 },
  132. { 0x82, 0x0000 },
  133. { 0x83, 0x0000 },
  134. { 0x84, 0x0000 },
  135. { 0x85, 0x0000 },
  136. { 0x86, 0x0004 },
  137. { 0x87, 0x0000 },
  138. { 0x88, 0x0000 },
  139. { 0x89, 0x0000 },
  140. { 0x8a, 0x0123 },
  141. { 0x8b, 0x0000 },
  142. { 0x8c, 0x0003 },
  143. { 0x8d, 0x0000 },
  144. { 0x8e, 0x0004 },
  145. { 0x8f, 0x1100 },
  146. { 0x90, 0x0646 },
  147. { 0x91, 0x0c06 },
  148. { 0x93, 0x0000 },
  149. { 0x94, 0x1270 },
  150. { 0x95, 0x1000 },
  151. { 0x97, 0x0000 },
  152. { 0x98, 0x0000 },
  153. { 0x99, 0x0000 },
  154. { 0x9a, 0x2184 },
  155. { 0x9b, 0x010a },
  156. { 0x9c, 0x0aea },
  157. { 0x9d, 0x000c },
  158. { 0x9e, 0x0400 },
  159. { 0xae, 0x7000 },
  160. { 0xaf, 0x0000 },
  161. { 0xb0, 0x7000 },
  162. { 0xb1, 0x0000 },
  163. { 0xb2, 0x0000 },
  164. { 0xb3, 0x001f },
  165. { 0xb4, 0x220c },
  166. { 0xb5, 0x1f00 },
  167. { 0xb6, 0x0000 },
  168. { 0xb7, 0x0000 },
  169. { 0xbb, 0x0000 },
  170. { 0xbc, 0x0000 },
  171. { 0xbd, 0x0000 },
  172. { 0xbe, 0x0000 },
  173. { 0xbf, 0x0000 },
  174. { 0xc0, 0x0000 },
  175. { 0xc1, 0x0000 },
  176. { 0xc2, 0x0000 },
  177. { 0xcd, 0x0000 },
  178. { 0xce, 0x0000 },
  179. { 0xcf, 0x1813 },
  180. { 0xd0, 0x0690 },
  181. { 0xd1, 0x1c17 },
  182. { 0xd3, 0xa220 },
  183. { 0xd4, 0x0000 },
  184. { 0xd6, 0x0400 },
  185. { 0xd9, 0x0809 },
  186. { 0xda, 0x0000 },
  187. { 0xdb, 0x0001 },
  188. { 0xdc, 0x0049 },
  189. { 0xdd, 0x0024 },
  190. { 0xe6, 0x8000 },
  191. { 0xe7, 0x0000 },
  192. { 0xec, 0xa200 },
  193. { 0xed, 0x0000 },
  194. { 0xee, 0xa200 },
  195. { 0xef, 0x0000 },
  196. { 0xf8, 0x0000 },
  197. { 0xf9, 0x0000 },
  198. { 0xfa, 0x8010 },
  199. { 0xfb, 0x0033 },
  200. { 0xfc, 0x0100 },
  201. };
  202. static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
  203. {
  204. int i;
  205. for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
  206. if ((reg >= rt5670_ranges[i].window_start &&
  207. reg <= rt5670_ranges[i].window_start +
  208. rt5670_ranges[i].window_len) ||
  209. (reg >= rt5670_ranges[i].range_min &&
  210. reg <= rt5670_ranges[i].range_max)) {
  211. return true;
  212. }
  213. }
  214. switch (reg) {
  215. case RT5670_RESET:
  216. case RT5670_PDM_DATA_CTRL1:
  217. case RT5670_PDM1_DATA_CTRL4:
  218. case RT5670_PDM2_DATA_CTRL4:
  219. case RT5670_PRIV_DATA:
  220. case RT5670_ASRC_5:
  221. case RT5670_CJ_CTRL1:
  222. case RT5670_CJ_CTRL2:
  223. case RT5670_CJ_CTRL3:
  224. case RT5670_A_JD_CTRL1:
  225. case RT5670_A_JD_CTRL2:
  226. case RT5670_VAD_CTRL5:
  227. case RT5670_ADC_EQ_CTRL1:
  228. case RT5670_EQ_CTRL1:
  229. case RT5670_ALC_CTRL_1:
  230. case RT5670_IRQ_CTRL2:
  231. case RT5670_INT_IRQ_ST:
  232. case RT5670_IL_CMD:
  233. case RT5670_DSP_CTRL1:
  234. case RT5670_DSP_CTRL2:
  235. case RT5670_DSP_CTRL3:
  236. case RT5670_DSP_CTRL4:
  237. case RT5670_DSP_CTRL5:
  238. case RT5670_VENDOR_ID:
  239. case RT5670_VENDOR_ID1:
  240. case RT5670_VENDOR_ID2:
  241. return true;
  242. default:
  243. return false;
  244. }
  245. }
  246. static bool rt5670_readable_register(struct device *dev, unsigned int reg)
  247. {
  248. int i;
  249. for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
  250. if ((reg >= rt5670_ranges[i].window_start &&
  251. reg <= rt5670_ranges[i].window_start +
  252. rt5670_ranges[i].window_len) ||
  253. (reg >= rt5670_ranges[i].range_min &&
  254. reg <= rt5670_ranges[i].range_max)) {
  255. return true;
  256. }
  257. }
  258. switch (reg) {
  259. case RT5670_RESET:
  260. case RT5670_HP_VOL:
  261. case RT5670_LOUT1:
  262. case RT5670_CJ_CTRL1:
  263. case RT5670_CJ_CTRL2:
  264. case RT5670_CJ_CTRL3:
  265. case RT5670_IN2:
  266. case RT5670_INL1_INR1_VOL:
  267. case RT5670_DAC1_DIG_VOL:
  268. case RT5670_DAC2_DIG_VOL:
  269. case RT5670_DAC_CTRL:
  270. case RT5670_STO1_ADC_DIG_VOL:
  271. case RT5670_MONO_ADC_DIG_VOL:
  272. case RT5670_STO2_ADC_DIG_VOL:
  273. case RT5670_ADC_BST_VOL1:
  274. case RT5670_ADC_BST_VOL2:
  275. case RT5670_STO2_ADC_MIXER:
  276. case RT5670_STO1_ADC_MIXER:
  277. case RT5670_MONO_ADC_MIXER:
  278. case RT5670_AD_DA_MIXER:
  279. case RT5670_STO_DAC_MIXER:
  280. case RT5670_DD_MIXER:
  281. case RT5670_DIG_MIXER:
  282. case RT5670_DSP_PATH1:
  283. case RT5670_DSP_PATH2:
  284. case RT5670_DIG_INF1_DATA:
  285. case RT5670_DIG_INF2_DATA:
  286. case RT5670_PDM_OUT_CTRL:
  287. case RT5670_PDM_DATA_CTRL1:
  288. case RT5670_PDM1_DATA_CTRL2:
  289. case RT5670_PDM1_DATA_CTRL3:
  290. case RT5670_PDM1_DATA_CTRL4:
  291. case RT5670_PDM2_DATA_CTRL2:
  292. case RT5670_PDM2_DATA_CTRL3:
  293. case RT5670_PDM2_DATA_CTRL4:
  294. case RT5670_REC_L1_MIXER:
  295. case RT5670_REC_L2_MIXER:
  296. case RT5670_REC_R1_MIXER:
  297. case RT5670_REC_R2_MIXER:
  298. case RT5670_HPO_MIXER:
  299. case RT5670_MONO_MIXER:
  300. case RT5670_OUT_L1_MIXER:
  301. case RT5670_OUT_R1_MIXER:
  302. case RT5670_LOUT_MIXER:
  303. case RT5670_PWR_DIG1:
  304. case RT5670_PWR_DIG2:
  305. case RT5670_PWR_ANLG1:
  306. case RT5670_PWR_ANLG2:
  307. case RT5670_PWR_MIXER:
  308. case RT5670_PWR_VOL:
  309. case RT5670_PRIV_INDEX:
  310. case RT5670_PRIV_DATA:
  311. case RT5670_I2S4_SDP:
  312. case RT5670_I2S1_SDP:
  313. case RT5670_I2S2_SDP:
  314. case RT5670_I2S3_SDP:
  315. case RT5670_ADDA_CLK1:
  316. case RT5670_ADDA_CLK2:
  317. case RT5670_DMIC_CTRL1:
  318. case RT5670_DMIC_CTRL2:
  319. case RT5670_TDM_CTRL_1:
  320. case RT5670_TDM_CTRL_2:
  321. case RT5670_TDM_CTRL_3:
  322. case RT5670_DSP_CLK:
  323. case RT5670_GLB_CLK:
  324. case RT5670_PLL_CTRL1:
  325. case RT5670_PLL_CTRL2:
  326. case RT5670_ASRC_1:
  327. case RT5670_ASRC_2:
  328. case RT5670_ASRC_3:
  329. case RT5670_ASRC_4:
  330. case RT5670_ASRC_5:
  331. case RT5670_ASRC_7:
  332. case RT5670_ASRC_8:
  333. case RT5670_ASRC_9:
  334. case RT5670_ASRC_10:
  335. case RT5670_ASRC_11:
  336. case RT5670_ASRC_12:
  337. case RT5670_ASRC_13:
  338. case RT5670_ASRC_14:
  339. case RT5670_DEPOP_M1:
  340. case RT5670_DEPOP_M2:
  341. case RT5670_DEPOP_M3:
  342. case RT5670_CHARGE_PUMP:
  343. case RT5670_MICBIAS:
  344. case RT5670_A_JD_CTRL1:
  345. case RT5670_A_JD_CTRL2:
  346. case RT5670_VAD_CTRL1:
  347. case RT5670_VAD_CTRL2:
  348. case RT5670_VAD_CTRL3:
  349. case RT5670_VAD_CTRL4:
  350. case RT5670_VAD_CTRL5:
  351. case RT5670_ADC_EQ_CTRL1:
  352. case RT5670_ADC_EQ_CTRL2:
  353. case RT5670_EQ_CTRL1:
  354. case RT5670_EQ_CTRL2:
  355. case RT5670_ALC_DRC_CTRL1:
  356. case RT5670_ALC_DRC_CTRL2:
  357. case RT5670_ALC_CTRL_1:
  358. case RT5670_ALC_CTRL_2:
  359. case RT5670_ALC_CTRL_3:
  360. case RT5670_JD_CTRL:
  361. case RT5670_IRQ_CTRL1:
  362. case RT5670_IRQ_CTRL2:
  363. case RT5670_INT_IRQ_ST:
  364. case RT5670_GPIO_CTRL1:
  365. case RT5670_GPIO_CTRL2:
  366. case RT5670_GPIO_CTRL3:
  367. case RT5670_SCRABBLE_FUN:
  368. case RT5670_SCRABBLE_CTRL:
  369. case RT5670_BASE_BACK:
  370. case RT5670_MP3_PLUS1:
  371. case RT5670_MP3_PLUS2:
  372. case RT5670_ADJ_HPF1:
  373. case RT5670_ADJ_HPF2:
  374. case RT5670_HP_CALIB_AMP_DET:
  375. case RT5670_SV_ZCD1:
  376. case RT5670_SV_ZCD2:
  377. case RT5670_IL_CMD:
  378. case RT5670_IL_CMD2:
  379. case RT5670_IL_CMD3:
  380. case RT5670_DRC_HL_CTRL1:
  381. case RT5670_DRC_HL_CTRL2:
  382. case RT5670_ADC_MONO_HP_CTRL1:
  383. case RT5670_ADC_MONO_HP_CTRL2:
  384. case RT5670_ADC_STO2_HP_CTRL1:
  385. case RT5670_ADC_STO2_HP_CTRL2:
  386. case RT5670_JD_CTRL3:
  387. case RT5670_JD_CTRL4:
  388. case RT5670_DIG_MISC:
  389. case RT5670_DSP_CTRL1:
  390. case RT5670_DSP_CTRL2:
  391. case RT5670_DSP_CTRL3:
  392. case RT5670_DSP_CTRL4:
  393. case RT5670_DSP_CTRL5:
  394. case RT5670_GEN_CTRL2:
  395. case RT5670_GEN_CTRL3:
  396. case RT5670_VENDOR_ID:
  397. case RT5670_VENDOR_ID1:
  398. case RT5670_VENDOR_ID2:
  399. return true;
  400. default:
  401. return false;
  402. }
  403. }
  404. /**
  405. * rt5670_headset_detect - Detect headset.
  406. * @component: SoC audio component device.
  407. * @jack_insert: Jack insert or not.
  408. *
  409. * Detect whether is headset or not when jack inserted.
  410. *
  411. * Returns detect status.
  412. */
  413. static int rt5670_headset_detect(struct snd_soc_component *component, int jack_insert)
  414. {
  415. int val;
  416. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  417. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  418. if (jack_insert) {
  419. snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
  420. snd_soc_dapm_sync(dapm);
  421. snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x0);
  422. snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
  423. RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD,
  424. RT5670_CBJ_MN_JD);
  425. snd_soc_component_write(component, RT5670_GPIO_CTRL2, 0x0004);
  426. snd_soc_component_update_bits(component, RT5670_GPIO_CTRL1,
  427. RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
  428. snd_soc_component_update_bits(component, RT5670_CJ_CTRL1,
  429. RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN);
  430. snd_soc_component_write(component, RT5670_JD_CTRL3, 0x00f0);
  431. snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
  432. RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD);
  433. snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
  434. RT5670_CBJ_MN_JD, 0);
  435. msleep(300);
  436. val = snd_soc_component_read(component, RT5670_CJ_CTRL3) & 0x7;
  437. if (val == 0x1 || val == 0x2) {
  438. rt5670->jack_type = SND_JACK_HEADSET;
  439. /* for push button */
  440. snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x8);
  441. snd_soc_component_update_bits(component, RT5670_IL_CMD, 0x40, 0x40);
  442. snd_soc_component_read(component, RT5670_IL_CMD);
  443. } else {
  444. snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
  445. rt5670->jack_type = SND_JACK_HEADPHONE;
  446. snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
  447. snd_soc_dapm_sync(dapm);
  448. }
  449. } else {
  450. snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x0);
  451. snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
  452. rt5670->jack_type = 0;
  453. snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
  454. snd_soc_dapm_sync(dapm);
  455. }
  456. return rt5670->jack_type;
  457. }
  458. void rt5670_jack_suspend(struct snd_soc_component *component)
  459. {
  460. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  461. rt5670->jack_type_saved = rt5670->jack_type;
  462. rt5670_headset_detect(component, 0);
  463. }
  464. EXPORT_SYMBOL_GPL(rt5670_jack_suspend);
  465. void rt5670_jack_resume(struct snd_soc_component *component)
  466. {
  467. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  468. if (rt5670->jack_type_saved)
  469. rt5670_headset_detect(component, 1);
  470. }
  471. EXPORT_SYMBOL_GPL(rt5670_jack_resume);
  472. static int rt5670_button_detect(struct snd_soc_component *component)
  473. {
  474. int btn_type, val;
  475. val = snd_soc_component_read(component, RT5670_IL_CMD);
  476. btn_type = val & 0xff80;
  477. snd_soc_component_write(component, RT5670_IL_CMD, val);
  478. if (btn_type != 0) {
  479. msleep(20);
  480. val = snd_soc_component_read(component, RT5670_IL_CMD);
  481. snd_soc_component_write(component, RT5670_IL_CMD, val);
  482. }
  483. return btn_type;
  484. }
  485. static int rt5670_irq_detection(void *data)
  486. {
  487. struct rt5670_priv *rt5670 = (struct rt5670_priv *)data;
  488. struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio;
  489. struct snd_soc_jack *jack = rt5670->jack;
  490. int val, btn_type, report = jack->status;
  491. if (rt5670->jd_mode == 1) /* 2 port */
  492. val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0070;
  493. else
  494. val = snd_soc_component_read(rt5670->component, RT5670_A_JD_CTRL1) & 0x0020;
  495. switch (val) {
  496. /* jack in */
  497. case 0x30: /* 2 port */
  498. case 0x0: /* 1 port or 2 port */
  499. if (rt5670->jack_type == 0) {
  500. report = rt5670_headset_detect(rt5670->component, 1);
  501. /* for push button and jack out */
  502. gpio->debounce_time = 25;
  503. break;
  504. }
  505. btn_type = 0;
  506. if (snd_soc_component_read(rt5670->component, RT5670_INT_IRQ_ST) & 0x4) {
  507. /* button pressed */
  508. report = SND_JACK_HEADSET;
  509. btn_type = rt5670_button_detect(rt5670->component);
  510. switch (btn_type) {
  511. case 0x2000: /* up */
  512. report |= SND_JACK_BTN_1;
  513. break;
  514. case 0x0400: /* center */
  515. report |= SND_JACK_BTN_0;
  516. break;
  517. case 0x0080: /* down */
  518. report |= SND_JACK_BTN_2;
  519. break;
  520. default:
  521. dev_err(rt5670->component->dev,
  522. "Unexpected button code 0x%04x\n",
  523. btn_type);
  524. break;
  525. }
  526. }
  527. if (btn_type == 0)/* button release */
  528. report = rt5670->jack_type;
  529. break;
  530. /* jack out */
  531. case 0x70: /* 2 port */
  532. case 0x10: /* 2 port */
  533. case 0x20: /* 1 port */
  534. report = 0;
  535. snd_soc_component_update_bits(rt5670->component, RT5670_INT_IRQ_ST, 0x1, 0x0);
  536. rt5670_headset_detect(rt5670->component, 0);
  537. gpio->debounce_time = 150; /* for jack in */
  538. break;
  539. default:
  540. break;
  541. }
  542. return report;
  543. }
  544. int rt5670_set_jack_detect(struct snd_soc_component *component,
  545. struct snd_soc_jack *jack)
  546. {
  547. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  548. int ret;
  549. rt5670->jack = jack;
  550. rt5670->hp_gpio.gpiod_dev = component->dev;
  551. rt5670->hp_gpio.name = "headset";
  552. rt5670->hp_gpio.report = SND_JACK_HEADSET |
  553. SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2;
  554. rt5670->hp_gpio.debounce_time = 150;
  555. rt5670->hp_gpio.wake = true;
  556. rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670;
  557. rt5670->hp_gpio.jack_status_check = rt5670_irq_detection;
  558. ret = snd_soc_jack_add_gpios(rt5670->jack, 1,
  559. &rt5670->hp_gpio);
  560. if (ret) {
  561. dev_err(component->dev, "Adding jack GPIO failed\n");
  562. return ret;
  563. }
  564. return 0;
  565. }
  566. EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
  567. static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
  568. static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
  569. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
  570. static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
  571. static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
  572. /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
  573. static const DECLARE_TLV_DB_RANGE(bst_tlv,
  574. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  575. 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
  576. 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
  577. 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
  578. 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
  579. 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
  580. 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
  581. );
  582. /* Interface data select */
  583. static const char * const rt5670_data_select[] = {
  584. "Normal", "Swap", "left copy to right", "right copy to left"
  585. };
  586. static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
  587. RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
  588. static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
  589. RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
  590. /*
  591. * For reliable output-mute LED control we need a "DAC1 Playback Switch" control.
  592. * We emulate this by only clearing the RT5670_M_DAC1_L/_R AD_DA_MIXER register
  593. * bits when both our emulated DAC1 Playback Switch control and the DAC1 MIXL/R
  594. * DAPM-mixer DAC1 input are enabled.
  595. */
  596. static void rt5670_update_ad_da_mixer_dac1_m_bits(struct rt5670_priv *rt5670)
  597. {
  598. int val = RT5670_M_DAC1_L | RT5670_M_DAC1_R;
  599. if (rt5670->dac1_mixl_dac1_switch && rt5670->dac1_playback_switch_l)
  600. val &= ~RT5670_M_DAC1_L;
  601. if (rt5670->dac1_mixr_dac1_switch && rt5670->dac1_playback_switch_r)
  602. val &= ~RT5670_M_DAC1_R;
  603. regmap_update_bits(rt5670->regmap, RT5670_AD_DA_MIXER,
  604. RT5670_M_DAC1_L | RT5670_M_DAC1_R, val);
  605. }
  606. static int rt5670_dac1_playback_switch_get(struct snd_kcontrol *kcontrol,
  607. struct snd_ctl_elem_value *ucontrol)
  608. {
  609. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  610. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  611. ucontrol->value.integer.value[0] = rt5670->dac1_playback_switch_l;
  612. ucontrol->value.integer.value[1] = rt5670->dac1_playback_switch_r;
  613. return 0;
  614. }
  615. static int rt5670_dac1_playback_switch_put(struct snd_kcontrol *kcontrol,
  616. struct snd_ctl_elem_value *ucontrol)
  617. {
  618. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  619. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  620. if (rt5670->dac1_playback_switch_l == ucontrol->value.integer.value[0] &&
  621. rt5670->dac1_playback_switch_r == ucontrol->value.integer.value[1])
  622. return 0;
  623. rt5670->dac1_playback_switch_l = ucontrol->value.integer.value[0];
  624. rt5670->dac1_playback_switch_r = ucontrol->value.integer.value[1];
  625. rt5670_update_ad_da_mixer_dac1_m_bits(rt5670);
  626. return 1;
  627. }
  628. static const struct snd_kcontrol_new rt5670_snd_controls[] = {
  629. /* Headphone Output Volume */
  630. SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
  631. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  632. 39, 1, out_vol_tlv),
  633. /* OUTPUT Control */
  634. SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
  635. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
  636. /* DAC Digital Volume */
  637. SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
  638. RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
  639. SOC_DOUBLE_EXT("DAC1 Playback Switch", SND_SOC_NOPM, 0, 1, 1, 0,
  640. rt5670_dac1_playback_switch_get, rt5670_dac1_playback_switch_put),
  641. SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
  642. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  643. 175, 0, dac_vol_tlv),
  644. SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
  645. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  646. 175, 0, dac_vol_tlv),
  647. /* IN1/IN2 Control */
  648. SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
  649. RT5670_BST_SFT1, 8, 0, bst_tlv),
  650. SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
  651. RT5670_BST_SFT1, 8, 0, bst_tlv),
  652. /* INL/INR Volume Control */
  653. SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
  654. RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
  655. 31, 1, in_vol_tlv),
  656. /* ADC Digital Volume Control */
  657. SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
  658. RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
  659. SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
  660. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  661. 127, 0, adc_vol_tlv),
  662. SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
  663. RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
  664. 127, 0, adc_vol_tlv),
  665. /* ADC Boost Volume Control */
  666. SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
  667. RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
  668. 3, 0, adc_bst_tlv),
  669. SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
  670. RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
  671. 3, 0, adc_bst_tlv),
  672. SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
  673. SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
  674. };
  675. /**
  676. * set_dmic_clk - Set parameter of dmic.
  677. *
  678. * @w: DAPM widget.
  679. * @kcontrol: The kcontrol of this widget.
  680. * @event: Event id.
  681. *
  682. * Choose dmic clock between 1MHz and 3MHz.
  683. * It is better for clock to approximate 3MHz.
  684. */
  685. static int set_dmic_clk(struct snd_soc_dapm_widget *w,
  686. struct snd_kcontrol *kcontrol, int event)
  687. {
  688. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  689. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  690. int idx, rate;
  691. rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap,
  692. RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT);
  693. idx = rl6231_calc_dmic_clk(rate);
  694. if (idx < 0)
  695. dev_err(component->dev, "Failed to set DMIC clock\n");
  696. else
  697. snd_soc_component_update_bits(component, RT5670_DMIC_CTRL1,
  698. RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
  699. return idx;
  700. }
  701. static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
  702. struct snd_soc_dapm_widget *sink)
  703. {
  704. struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
  705. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  706. if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1)
  707. return 1;
  708. else
  709. return 0;
  710. }
  711. static int is_using_asrc(struct snd_soc_dapm_widget *source,
  712. struct snd_soc_dapm_widget *sink)
  713. {
  714. struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
  715. unsigned int reg, shift, val;
  716. switch (source->shift) {
  717. case 0:
  718. reg = RT5670_ASRC_3;
  719. shift = 0;
  720. break;
  721. case 1:
  722. reg = RT5670_ASRC_3;
  723. shift = 4;
  724. break;
  725. case 2:
  726. reg = RT5670_ASRC_5;
  727. shift = 12;
  728. break;
  729. case 3:
  730. reg = RT5670_ASRC_2;
  731. shift = 0;
  732. break;
  733. case 8:
  734. reg = RT5670_ASRC_2;
  735. shift = 4;
  736. break;
  737. case 9:
  738. reg = RT5670_ASRC_2;
  739. shift = 8;
  740. break;
  741. case 10:
  742. reg = RT5670_ASRC_2;
  743. shift = 12;
  744. break;
  745. default:
  746. return 0;
  747. }
  748. val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
  749. switch (val) {
  750. case 1:
  751. case 2:
  752. case 3:
  753. case 4:
  754. return 1;
  755. default:
  756. return 0;
  757. }
  758. }
  759. static int can_use_asrc(struct snd_soc_dapm_widget *source,
  760. struct snd_soc_dapm_widget *sink)
  761. {
  762. struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
  763. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  764. if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
  765. return 1;
  766. return 0;
  767. }
  768. /**
  769. * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
  770. * @component: SoC audio component device.
  771. * @filter_mask: mask of filters.
  772. * @clk_src: clock source
  773. *
  774. * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
  775. * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
  776. * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
  777. * ASRC function will track i2s clock and generate a corresponding system clock
  778. * for codec. This function provides an API to select the clock source for a
  779. * set of filters specified by the mask. And the codec driver will turn on ASRC
  780. * for these filters if ASRC is selected as their clock source.
  781. */
  782. int rt5670_sel_asrc_clk_src(struct snd_soc_component *component,
  783. unsigned int filter_mask, unsigned int clk_src)
  784. {
  785. unsigned int asrc2_mask = 0, asrc2_value = 0;
  786. unsigned int asrc3_mask = 0, asrc3_value = 0;
  787. if (clk_src > RT5670_CLK_SEL_SYS3)
  788. return -EINVAL;
  789. if (filter_mask & RT5670_DA_STEREO_FILTER) {
  790. asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
  791. asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
  792. | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
  793. }
  794. if (filter_mask & RT5670_DA_MONO_L_FILTER) {
  795. asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
  796. asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
  797. | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
  798. }
  799. if (filter_mask & RT5670_DA_MONO_R_FILTER) {
  800. asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
  801. asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
  802. | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
  803. }
  804. if (filter_mask & RT5670_AD_STEREO_FILTER) {
  805. asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
  806. asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
  807. | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
  808. }
  809. if (filter_mask & RT5670_AD_MONO_L_FILTER) {
  810. asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
  811. asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
  812. | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
  813. }
  814. if (filter_mask & RT5670_AD_MONO_R_FILTER) {
  815. asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
  816. asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
  817. | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
  818. }
  819. if (filter_mask & RT5670_UP_RATE_FILTER) {
  820. asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
  821. asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
  822. | (clk_src << RT5670_UP_CLK_SEL_SFT);
  823. }
  824. if (filter_mask & RT5670_DOWN_RATE_FILTER) {
  825. asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
  826. asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
  827. | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
  828. }
  829. if (asrc2_mask)
  830. snd_soc_component_update_bits(component, RT5670_ASRC_2,
  831. asrc2_mask, asrc2_value);
  832. if (asrc3_mask)
  833. snd_soc_component_update_bits(component, RT5670_ASRC_3,
  834. asrc3_mask, asrc3_value);
  835. return 0;
  836. }
  837. EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
  838. /* Digital Mixer */
  839. static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
  840. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
  841. RT5670_M_ADC_L1_SFT, 1, 1),
  842. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
  843. RT5670_M_ADC_L2_SFT, 1, 1),
  844. };
  845. static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
  846. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
  847. RT5670_M_ADC_R1_SFT, 1, 1),
  848. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
  849. RT5670_M_ADC_R2_SFT, 1, 1),
  850. };
  851. static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
  852. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
  853. RT5670_M_ADC_L1_SFT, 1, 1),
  854. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
  855. RT5670_M_ADC_L2_SFT, 1, 1),
  856. };
  857. static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
  858. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
  859. RT5670_M_ADC_R1_SFT, 1, 1),
  860. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
  861. RT5670_M_ADC_R2_SFT, 1, 1),
  862. };
  863. static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
  864. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
  865. RT5670_M_MONO_ADC_L1_SFT, 1, 1),
  866. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
  867. RT5670_M_MONO_ADC_L2_SFT, 1, 1),
  868. };
  869. static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
  870. SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
  871. RT5670_M_MONO_ADC_R1_SFT, 1, 1),
  872. SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
  873. RT5670_M_MONO_ADC_R2_SFT, 1, 1),
  874. };
  875. /* See comment above rt5670_update_ad_da_mixer_dac1_m_bits() */
  876. static int rt5670_put_dac1_mix_dac1_switch(struct snd_kcontrol *kcontrol,
  877. struct snd_ctl_elem_value *ucontrol)
  878. {
  879. struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
  880. struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
  881. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  882. int ret;
  883. if (mc->shift == 0)
  884. rt5670->dac1_mixl_dac1_switch = ucontrol->value.integer.value[0];
  885. else
  886. rt5670->dac1_mixr_dac1_switch = ucontrol->value.integer.value[0];
  887. /* Apply the update (if any) */
  888. ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
  889. if (ret == 0)
  890. return 0;
  891. rt5670_update_ad_da_mixer_dac1_m_bits(rt5670);
  892. return 1;
  893. }
  894. #define SOC_DAPM_SINGLE_RT5670_DAC1_SW(name, shift) \
  895. SOC_SINGLE_EXT(name, SND_SOC_NOPM, shift, 1, 0, \
  896. snd_soc_dapm_get_volsw, rt5670_put_dac1_mix_dac1_switch)
  897. static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
  898. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
  899. RT5670_M_ADCMIX_L_SFT, 1, 1),
  900. SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 0),
  901. };
  902. static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
  903. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
  904. RT5670_M_ADCMIX_R_SFT, 1, 1),
  905. SOC_DAPM_SINGLE_RT5670_DAC1_SW("DAC1 Switch", 1),
  906. };
  907. static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
  908. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
  909. RT5670_M_DAC_L1_SFT, 1, 1),
  910. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
  911. RT5670_M_DAC_L2_SFT, 1, 1),
  912. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
  913. RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
  914. };
  915. static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
  916. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
  917. RT5670_M_DAC_R1_SFT, 1, 1),
  918. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
  919. RT5670_M_DAC_R2_SFT, 1, 1),
  920. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
  921. RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
  922. };
  923. static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
  924. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
  925. RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
  926. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
  927. RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
  928. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
  929. RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
  930. };
  931. static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
  932. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
  933. RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
  934. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
  935. RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
  936. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
  937. RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
  938. };
  939. static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
  940. SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
  941. RT5670_M_STO_L_DAC_L_SFT, 1, 1),
  942. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
  943. RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
  944. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
  945. RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
  946. };
  947. static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
  948. SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
  949. RT5670_M_STO_R_DAC_R_SFT, 1, 1),
  950. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
  951. RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
  952. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
  953. RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
  954. };
  955. /* Analog Input Mixer */
  956. static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
  957. SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
  958. RT5670_M_IN_L_RM_L_SFT, 1, 1),
  959. SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
  960. RT5670_M_BST2_RM_L_SFT, 1, 1),
  961. SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
  962. RT5670_M_BST1_RM_L_SFT, 1, 1),
  963. };
  964. static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
  965. SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
  966. RT5670_M_IN_R_RM_R_SFT, 1, 1),
  967. SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
  968. RT5670_M_BST2_RM_R_SFT, 1, 1),
  969. SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
  970. RT5670_M_BST1_RM_R_SFT, 1, 1),
  971. };
  972. static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
  973. SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
  974. RT5670_M_BST1_OM_L_SFT, 1, 1),
  975. SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
  976. RT5670_M_IN_L_OM_L_SFT, 1, 1),
  977. SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
  978. RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
  979. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
  980. RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
  981. };
  982. static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
  983. SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
  984. RT5670_M_BST2_OM_R_SFT, 1, 1),
  985. SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
  986. RT5670_M_IN_R_OM_R_SFT, 1, 1),
  987. SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
  988. RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
  989. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
  990. RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
  991. };
  992. static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
  993. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  994. RT5670_M_DAC1_HM_SFT, 1, 1),
  995. SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
  996. RT5670_M_HPVOL_HM_SFT, 1, 1),
  997. };
  998. static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
  999. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  1000. RT5670_M_DACL1_HML_SFT, 1, 1),
  1001. SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
  1002. RT5670_M_INL1_HML_SFT, 1, 1),
  1003. };
  1004. static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
  1005. SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
  1006. RT5670_M_DACR1_HMR_SFT, 1, 1),
  1007. SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
  1008. RT5670_M_INR1_HMR_SFT, 1, 1),
  1009. };
  1010. static const struct snd_kcontrol_new rt5670_lout_mix[] = {
  1011. SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
  1012. RT5670_M_DAC_L1_LM_SFT, 1, 1),
  1013. SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
  1014. RT5670_M_DAC_R1_LM_SFT, 1, 1),
  1015. SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
  1016. RT5670_M_OV_L_LM_SFT, 1, 1),
  1017. SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
  1018. RT5670_M_OV_R_LM_SFT, 1, 1),
  1019. };
  1020. static const struct snd_kcontrol_new lout_l_enable_control =
  1021. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
  1022. RT5670_L_MUTE_SFT, 1, 1);
  1023. static const struct snd_kcontrol_new lout_r_enable_control =
  1024. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
  1025. RT5670_R_MUTE_SFT, 1, 1);
  1026. /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
  1027. static const char * const rt5670_dac1_src[] = {
  1028. "IF1 DAC", "IF2 DAC"
  1029. };
  1030. static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
  1031. RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
  1032. static const struct snd_kcontrol_new rt5670_dac1l_mux =
  1033. SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
  1034. static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
  1035. RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
  1036. static const struct snd_kcontrol_new rt5670_dac1r_mux =
  1037. SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
  1038. /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
  1039. /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
  1040. static const char * const rt5670_dac12_src[] = {
  1041. "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
  1042. "Bass", "VAD_ADC", "IF4 DAC"
  1043. };
  1044. static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
  1045. RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
  1046. static const struct snd_kcontrol_new rt5670_dac_l2_mux =
  1047. SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
  1048. static const char * const rt5670_dacr2_src[] = {
  1049. "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
  1050. };
  1051. static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
  1052. RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
  1053. static const struct snd_kcontrol_new rt5670_dac_r2_mux =
  1054. SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
  1055. /*RxDP source*/ /* MX-2D [15:13] */
  1056. static const char * const rt5670_rxdp_src[] = {
  1057. "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
  1058. "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
  1059. };
  1060. static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
  1061. RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
  1062. static const struct snd_kcontrol_new rt5670_rxdp_mux =
  1063. SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
  1064. /* MX-2D [1] [0] */
  1065. static const char * const rt5670_dsp_bypass_src[] = {
  1066. "DSP", "Bypass"
  1067. };
  1068. static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
  1069. RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
  1070. static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
  1071. SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
  1072. static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
  1073. RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
  1074. static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
  1075. SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
  1076. /* Stereo2 ADC source */
  1077. /* MX-26 [15] */
  1078. static const char * const rt5670_stereo2_adc_lr_src[] = {
  1079. "L", "LR"
  1080. };
  1081. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
  1082. RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
  1083. static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
  1084. SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
  1085. /* Stereo1 ADC source */
  1086. /* MX-27 MX-26 [12] */
  1087. static const char * const rt5670_stereo_adc1_src[] = {
  1088. "DAC MIX", "ADC"
  1089. };
  1090. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
  1091. RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
  1092. static const struct snd_kcontrol_new rt5670_sto_adc_1_mux =
  1093. SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum);
  1094. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
  1095. RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
  1096. static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux =
  1097. SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum);
  1098. /* MX-27 MX-26 [11] */
  1099. static const char * const rt5670_stereo_adc2_src[] = {
  1100. "DAC MIX", "DMIC"
  1101. };
  1102. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
  1103. RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
  1104. static const struct snd_kcontrol_new rt5670_sto_adc_2_mux =
  1105. SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum);
  1106. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
  1107. RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
  1108. static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux =
  1109. SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum);
  1110. /* MX-27 MX-26 [9:8] */
  1111. static const char * const rt5670_stereo_dmic_src[] = {
  1112. "DMIC1", "DMIC2", "DMIC3"
  1113. };
  1114. static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
  1115. RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
  1116. static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
  1117. SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
  1118. static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
  1119. RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
  1120. static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
  1121. SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
  1122. /* Mono ADC source */
  1123. /* MX-28 [12] */
  1124. static const char * const rt5670_mono_adc_l1_src[] = {
  1125. "Mono DAC MIXL", "ADC1"
  1126. };
  1127. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
  1128. RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
  1129. static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
  1130. SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
  1131. /* MX-28 [11] */
  1132. static const char * const rt5670_mono_adc_l2_src[] = {
  1133. "Mono DAC MIXL", "DMIC"
  1134. };
  1135. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
  1136. RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
  1137. static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
  1138. SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
  1139. /* MX-28 [9:8] */
  1140. static const char * const rt5670_mono_dmic_src[] = {
  1141. "DMIC1", "DMIC2", "DMIC3"
  1142. };
  1143. static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
  1144. RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
  1145. static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
  1146. SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
  1147. /* MX-28 [1:0] */
  1148. static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
  1149. RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
  1150. static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
  1151. SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
  1152. /* MX-28 [4] */
  1153. static const char * const rt5670_mono_adc_r1_src[] = {
  1154. "Mono DAC MIXR", "ADC2"
  1155. };
  1156. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
  1157. RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
  1158. static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
  1159. SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
  1160. /* MX-28 [3] */
  1161. static const char * const rt5670_mono_adc_r2_src[] = {
  1162. "Mono DAC MIXR", "DMIC"
  1163. };
  1164. static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
  1165. RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
  1166. static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
  1167. SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
  1168. /* MX-2D [3:2] */
  1169. static const char * const rt5670_txdp_slot_src[] = {
  1170. "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
  1171. };
  1172. static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
  1173. RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
  1174. static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
  1175. SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
  1176. /* MX-2F [15] */
  1177. static const char * const rt5670_if1_adc2_in_src[] = {
  1178. "IF_ADC2", "VAD_ADC"
  1179. };
  1180. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
  1181. RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
  1182. static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
  1183. SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
  1184. /* MX-2F [14:12] */
  1185. static const char * const rt5670_if2_adc_in_src[] = {
  1186. "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
  1187. };
  1188. static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
  1189. RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
  1190. static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
  1191. SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
  1192. /* MX-31 [15] [13] [11] [9] */
  1193. static const char * const rt5670_pdm_src[] = {
  1194. "Mono DAC", "Stereo DAC"
  1195. };
  1196. static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
  1197. RT5670_PDM1_L_SFT, rt5670_pdm_src);
  1198. static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
  1199. SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
  1200. static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
  1201. RT5670_PDM1_R_SFT, rt5670_pdm_src);
  1202. static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
  1203. SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
  1204. static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
  1205. RT5670_PDM2_L_SFT, rt5670_pdm_src);
  1206. static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
  1207. SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
  1208. static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
  1209. RT5670_PDM2_R_SFT, rt5670_pdm_src);
  1210. static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
  1211. SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
  1212. /* MX-FA [12] */
  1213. static const char * const rt5670_if1_adc1_in1_src[] = {
  1214. "IF_ADC1", "IF1_ADC3"
  1215. };
  1216. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
  1217. RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
  1218. static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
  1219. SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
  1220. /* MX-FA [11] */
  1221. static const char * const rt5670_if1_adc1_in2_src[] = {
  1222. "IF1_ADC1_IN1", "IF1_ADC4"
  1223. };
  1224. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
  1225. RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
  1226. static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
  1227. SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
  1228. /* MX-FA [10] */
  1229. static const char * const rt5670_if1_adc2_in1_src[] = {
  1230. "IF1_ADC2_IN", "IF1_ADC4"
  1231. };
  1232. static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
  1233. RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
  1234. static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
  1235. SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
  1236. /* MX-9D [9:8] */
  1237. static const char * const rt5670_vad_adc_src[] = {
  1238. "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
  1239. };
  1240. static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
  1241. RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
  1242. static const struct snd_kcontrol_new rt5670_vad_adc_mux =
  1243. SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
  1244. static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
  1245. struct snd_kcontrol *kcontrol, int event)
  1246. {
  1247. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1248. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  1249. switch (event) {
  1250. case SND_SOC_DAPM_POST_PMU:
  1251. regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
  1252. RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
  1253. regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
  1254. 0x0400, 0x0400);
  1255. /* headphone amp power on */
  1256. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  1257. RT5670_PWR_HA | RT5670_PWR_FV1 |
  1258. RT5670_PWR_FV2, RT5670_PWR_HA |
  1259. RT5670_PWR_FV1 | RT5670_PWR_FV2);
  1260. /* depop parameters */
  1261. regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
  1262. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
  1263. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1264. RT5670_HP_DCC_INT1, 0x9f00);
  1265. mdelay(20);
  1266. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1267. break;
  1268. case SND_SOC_DAPM_PRE_PMD:
  1269. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
  1270. msleep(30);
  1271. break;
  1272. default:
  1273. return 0;
  1274. }
  1275. return 0;
  1276. }
  1277. static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
  1278. struct snd_kcontrol *kcontrol, int event)
  1279. {
  1280. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1281. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  1282. switch (event) {
  1283. case SND_SOC_DAPM_POST_PMU:
  1284. /* headphone unmute sequence */
  1285. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1286. RT5670_MAMP_INT_REG2, 0xb400);
  1287. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
  1288. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
  1289. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
  1290. regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
  1291. 0x0300, 0x0300);
  1292. regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
  1293. RT5670_L_MUTE | RT5670_R_MUTE, 0);
  1294. msleep(80);
  1295. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1296. break;
  1297. case SND_SOC_DAPM_PRE_PMD:
  1298. /* headphone mute sequence */
  1299. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1300. RT5670_MAMP_INT_REG2, 0xb400);
  1301. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
  1302. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
  1303. mdelay(10);
  1304. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
  1305. mdelay(10);
  1306. regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
  1307. RT5670_L_MUTE | RT5670_R_MUTE,
  1308. RT5670_L_MUTE | RT5670_R_MUTE);
  1309. msleep(20);
  1310. regmap_update_bits(rt5670->regmap,
  1311. RT5670_GEN_CTRL2, 0x0300, 0x0);
  1312. regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
  1313. regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
  1314. regmap_write(rt5670->regmap, RT5670_PR_BASE +
  1315. RT5670_MAMP_INT_REG2, 0xfc00);
  1316. break;
  1317. default:
  1318. return 0;
  1319. }
  1320. return 0;
  1321. }
  1322. static int rt5670_spk_event(struct snd_soc_dapm_widget *w,
  1323. struct snd_kcontrol *kcontrol, int event)
  1324. {
  1325. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1326. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  1327. if (!rt5670->gpio1_is_ext_spk_en)
  1328. return 0;
  1329. switch (event) {
  1330. case SND_SOC_DAPM_POST_PMU:
  1331. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
  1332. RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_HI);
  1333. break;
  1334. case SND_SOC_DAPM_PRE_PMD:
  1335. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
  1336. RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_LO);
  1337. break;
  1338. default:
  1339. return 0;
  1340. }
  1341. return 0;
  1342. }
  1343. static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
  1344. struct snd_kcontrol *kcontrol, int event)
  1345. {
  1346. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1347. switch (event) {
  1348. case SND_SOC_DAPM_POST_PMU:
  1349. snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
  1350. RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
  1351. break;
  1352. case SND_SOC_DAPM_PRE_PMD:
  1353. snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
  1354. RT5670_PWR_BST1_P, 0);
  1355. break;
  1356. default:
  1357. return 0;
  1358. }
  1359. return 0;
  1360. }
  1361. static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
  1362. struct snd_kcontrol *kcontrol, int event)
  1363. {
  1364. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  1365. switch (event) {
  1366. case SND_SOC_DAPM_POST_PMU:
  1367. snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
  1368. RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
  1369. break;
  1370. case SND_SOC_DAPM_PRE_PMD:
  1371. snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
  1372. RT5670_PWR_BST2_P, 0);
  1373. break;
  1374. default:
  1375. return 0;
  1376. }
  1377. return 0;
  1378. }
  1379. static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
  1380. SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
  1381. RT5670_PWR_PLL_BIT, 0, NULL, 0),
  1382. SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
  1383. RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
  1384. SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
  1385. RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
  1386. /* ASRC */
  1387. SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
  1388. 11, 0, NULL, 0),
  1389. SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
  1390. 12, 0, NULL, 0),
  1391. SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
  1392. 10, 0, NULL, 0),
  1393. SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
  1394. 9, 0, NULL, 0),
  1395. SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
  1396. 8, 0, NULL, 0),
  1397. SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
  1398. 7, 0, NULL, 0),
  1399. SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
  1400. 6, 0, NULL, 0),
  1401. SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
  1402. 5, 0, NULL, 0),
  1403. SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
  1404. 4, 0, NULL, 0),
  1405. SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
  1406. 3, 0, NULL, 0),
  1407. SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
  1408. 2, 0, NULL, 0),
  1409. SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
  1410. 1, 0, NULL, 0),
  1411. SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
  1412. 0, 0, NULL, 0),
  1413. /* Input Side */
  1414. /* micbias */
  1415. SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
  1416. RT5670_PWR_MB1_BIT, 0, NULL, 0),
  1417. /* Input Lines */
  1418. SND_SOC_DAPM_INPUT("DMIC L1"),
  1419. SND_SOC_DAPM_INPUT("DMIC R1"),
  1420. SND_SOC_DAPM_INPUT("DMIC L2"),
  1421. SND_SOC_DAPM_INPUT("DMIC R2"),
  1422. SND_SOC_DAPM_INPUT("DMIC L3"),
  1423. SND_SOC_DAPM_INPUT("DMIC R3"),
  1424. SND_SOC_DAPM_INPUT("IN1P"),
  1425. SND_SOC_DAPM_INPUT("IN1N"),
  1426. SND_SOC_DAPM_INPUT("IN2P"),
  1427. SND_SOC_DAPM_INPUT("IN2N"),
  1428. SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1429. SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1430. SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1431. SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
  1432. set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
  1433. SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
  1434. RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
  1435. SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
  1436. RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
  1437. SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
  1438. RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
  1439. /* Boost */
  1440. SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
  1441. 0, NULL, 0, rt5670_bst1_event,
  1442. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1443. SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
  1444. 0, NULL, 0, rt5670_bst2_event,
  1445. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1446. /* Input Volume */
  1447. SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
  1448. RT5670_PWR_IN_L_BIT, 0, NULL, 0),
  1449. SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
  1450. RT5670_PWR_IN_R_BIT, 0, NULL, 0),
  1451. /* REC Mixer */
  1452. SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
  1453. rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
  1454. SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
  1455. rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
  1456. /* ADCs */
  1457. SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
  1458. SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
  1459. SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1460. SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
  1461. RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
  1462. SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
  1463. RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
  1464. SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
  1465. RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
  1466. /* ADC Mux */
  1467. SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
  1468. &rt5670_sto1_dmic_mux),
  1469. SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1470. &rt5670_sto_adc_2_mux),
  1471. SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1472. &rt5670_sto_adc_2_mux),
  1473. SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1474. &rt5670_sto_adc_1_mux),
  1475. SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1476. &rt5670_sto_adc_1_mux),
  1477. SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
  1478. &rt5670_sto2_dmic_mux),
  1479. SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1480. &rt5670_sto2_adc_2_mux),
  1481. SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1482. &rt5670_sto2_adc_2_mux),
  1483. SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1484. &rt5670_sto2_adc_1_mux),
  1485. SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1486. &rt5670_sto2_adc_1_mux),
  1487. SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
  1488. &rt5670_sto2_adc_lr_mux),
  1489. SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
  1490. &rt5670_mono_dmic_l_mux),
  1491. SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
  1492. &rt5670_mono_dmic_r_mux),
  1493. SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1494. &rt5670_mono_adc_l2_mux),
  1495. SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1496. &rt5670_mono_adc_l1_mux),
  1497. SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1498. &rt5670_mono_adc_r1_mux),
  1499. SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1500. &rt5670_mono_adc_r2_mux),
  1501. /* ADC Mixer */
  1502. SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
  1503. RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
  1504. SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
  1505. RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
  1506. SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
  1507. rt5670_sto1_adc_l_mix, ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
  1508. SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
  1509. rt5670_sto1_adc_r_mix, ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
  1510. SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
  1511. rt5670_sto2_adc_l_mix,
  1512. ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
  1513. SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
  1514. rt5670_sto2_adc_r_mix,
  1515. ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
  1516. SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
  1517. RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
  1518. SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
  1519. RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
  1520. ARRAY_SIZE(rt5670_mono_adc_l_mix)),
  1521. SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
  1522. RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
  1523. SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
  1524. RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
  1525. ARRAY_SIZE(rt5670_mono_adc_r_mix)),
  1526. /* ADC PGA */
  1527. SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1528. SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
  1529. SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1530. SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
  1531. SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1532. SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1533. SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1534. SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1535. SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1536. SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1537. SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1538. SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1539. SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1540. SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1541. SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1542. /* DSP */
  1543. SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1544. SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1545. SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1546. SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1547. SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
  1548. &rt5670_txdp_slot_mux),
  1549. SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
  1550. &rt5670_dsp_ul_mux),
  1551. SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
  1552. &rt5670_dsp_dl_mux),
  1553. SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
  1554. &rt5670_rxdp_mux),
  1555. /* IF2 Mux */
  1556. SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
  1557. &rt5670_if2_adc_in_mux),
  1558. /* Digital Interface */
  1559. SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
  1560. RT5670_PWR_I2S1_BIT, 0, NULL, 0),
  1561. SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1562. SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1563. SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1564. SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1565. SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1566. SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1567. SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1568. SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1569. SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1570. SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
  1571. RT5670_PWR_I2S2_BIT, 0, NULL, 0),
  1572. SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1573. SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1574. SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1575. SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1576. SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1577. SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1578. /* Digital Interface Select */
  1579. SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
  1580. &rt5670_if1_adc1_in1_mux),
  1581. SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
  1582. &rt5670_if1_adc1_in2_mux),
  1583. SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
  1584. &rt5670_if1_adc2_in_mux),
  1585. SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
  1586. &rt5670_if1_adc2_in1_mux),
  1587. SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
  1588. &rt5670_vad_adc_mux),
  1589. /* Audio Interface */
  1590. SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
  1591. SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
  1592. SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
  1593. SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
  1594. RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
  1595. /* Audio DSP */
  1596. SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
  1597. /* Output Side */
  1598. /* DAC mixer before sound effect */
  1599. SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
  1600. rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
  1601. SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
  1602. rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
  1603. SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1604. /* DAC2 channel Mux */
  1605. SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
  1606. &rt5670_dac_l2_mux),
  1607. SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
  1608. &rt5670_dac_r2_mux),
  1609. SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
  1610. RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
  1611. SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
  1612. RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
  1613. SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
  1614. SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
  1615. /* DAC Mixer */
  1616. SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
  1617. RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
  1618. SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
  1619. RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
  1620. SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
  1621. RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
  1622. SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
  1623. rt5670_sto_dac_l_mix,
  1624. ARRAY_SIZE(rt5670_sto_dac_l_mix)),
  1625. SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
  1626. rt5670_sto_dac_r_mix,
  1627. ARRAY_SIZE(rt5670_sto_dac_r_mix)),
  1628. SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
  1629. rt5670_mono_dac_l_mix,
  1630. ARRAY_SIZE(rt5670_mono_dac_l_mix)),
  1631. SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
  1632. rt5670_mono_dac_r_mix,
  1633. ARRAY_SIZE(rt5670_mono_dac_r_mix)),
  1634. SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
  1635. rt5670_dig_l_mix,
  1636. ARRAY_SIZE(rt5670_dig_l_mix)),
  1637. SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
  1638. rt5670_dig_r_mix,
  1639. ARRAY_SIZE(rt5670_dig_r_mix)),
  1640. /* DACs */
  1641. SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
  1642. RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
  1643. SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
  1644. RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
  1645. SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
  1646. SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
  1647. SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
  1648. RT5670_PWR_DAC_L2_BIT, 0),
  1649. SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
  1650. RT5670_PWR_DAC_R2_BIT, 0),
  1651. /* OUT Mixer */
  1652. SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
  1653. 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
  1654. SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
  1655. 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
  1656. /* Ouput Volume */
  1657. SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
  1658. RT5670_PWR_HV_L_BIT, 0,
  1659. rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
  1660. SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
  1661. RT5670_PWR_HV_R_BIT, 0,
  1662. rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
  1663. SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1664. SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1665. SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1666. /* HPO/LOUT/Mono Mixer */
  1667. SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
  1668. rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
  1669. SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
  1670. 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
  1671. SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
  1672. rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
  1673. SND_SOC_DAPM_PRE_PMD),
  1674. SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
  1675. RT5670_PWR_HP_L_BIT, 0, NULL, 0),
  1676. SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
  1677. RT5670_PWR_HP_R_BIT, 0, NULL, 0),
  1678. SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
  1679. rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
  1680. SND_SOC_DAPM_POST_PMU),
  1681. SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
  1682. &lout_l_enable_control),
  1683. SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
  1684. &lout_r_enable_control),
  1685. SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
  1686. /* PDM */
  1687. SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
  1688. RT5670_PWR_PDM1_BIT, 0, NULL, 0),
  1689. SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
  1690. RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
  1691. SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
  1692. RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
  1693. /* Output Lines */
  1694. SND_SOC_DAPM_OUTPUT("HPOL"),
  1695. SND_SOC_DAPM_OUTPUT("HPOR"),
  1696. SND_SOC_DAPM_OUTPUT("LOUTL"),
  1697. SND_SOC_DAPM_OUTPUT("LOUTR"),
  1698. };
  1699. static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
  1700. SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
  1701. RT5670_PWR_PDM2_BIT, 0, NULL, 0),
  1702. SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
  1703. RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
  1704. SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
  1705. RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
  1706. SND_SOC_DAPM_OUTPUT("PDM1L"),
  1707. SND_SOC_DAPM_OUTPUT("PDM1R"),
  1708. SND_SOC_DAPM_OUTPUT("PDM2L"),
  1709. SND_SOC_DAPM_OUTPUT("PDM2R"),
  1710. };
  1711. static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
  1712. SND_SOC_DAPM_PGA_E("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
  1713. rt5670_spk_event, SND_SOC_DAPM_PRE_PMD |
  1714. SND_SOC_DAPM_POST_PMU),
  1715. SND_SOC_DAPM_OUTPUT("SPOLP"),
  1716. SND_SOC_DAPM_OUTPUT("SPOLN"),
  1717. SND_SOC_DAPM_OUTPUT("SPORP"),
  1718. SND_SOC_DAPM_OUTPUT("SPORN"),
  1719. };
  1720. static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
  1721. { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
  1722. { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
  1723. { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
  1724. { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
  1725. { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
  1726. { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
  1727. { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
  1728. { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
  1729. { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
  1730. { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
  1731. { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
  1732. { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
  1733. { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
  1734. { "DMIC1", NULL, "DMIC L1" },
  1735. { "DMIC1", NULL, "DMIC R1" },
  1736. { "DMIC2", NULL, "DMIC L2" },
  1737. { "DMIC2", NULL, "DMIC R2" },
  1738. { "DMIC3", NULL, "DMIC L3" },
  1739. { "DMIC3", NULL, "DMIC R3" },
  1740. { "BST1", NULL, "IN1P" },
  1741. { "BST1", NULL, "IN1N" },
  1742. { "BST1", NULL, "Mic Det Power" },
  1743. { "BST2", NULL, "IN2P" },
  1744. { "BST2", NULL, "IN2N" },
  1745. { "INL VOL", NULL, "IN2P" },
  1746. { "INR VOL", NULL, "IN2N" },
  1747. { "RECMIXL", "INL Switch", "INL VOL" },
  1748. { "RECMIXL", "BST2 Switch", "BST2" },
  1749. { "RECMIXL", "BST1 Switch", "BST1" },
  1750. { "RECMIXR", "INR Switch", "INR VOL" },
  1751. { "RECMIXR", "BST2 Switch", "BST2" },
  1752. { "RECMIXR", "BST1 Switch", "BST1" },
  1753. { "ADC 1", NULL, "RECMIXL" },
  1754. { "ADC 1", NULL, "ADC 1 power" },
  1755. { "ADC 1", NULL, "ADC clock" },
  1756. { "ADC 2", NULL, "RECMIXR" },
  1757. { "ADC 2", NULL, "ADC 2 power" },
  1758. { "ADC 2", NULL, "ADC clock" },
  1759. { "DMIC L1", NULL, "DMIC CLK" },
  1760. { "DMIC L1", NULL, "DMIC1 Power" },
  1761. { "DMIC R1", NULL, "DMIC CLK" },
  1762. { "DMIC R1", NULL, "DMIC1 Power" },
  1763. { "DMIC L2", NULL, "DMIC CLK" },
  1764. { "DMIC L2", NULL, "DMIC2 Power" },
  1765. { "DMIC R2", NULL, "DMIC CLK" },
  1766. { "DMIC R2", NULL, "DMIC2 Power" },
  1767. { "DMIC L3", NULL, "DMIC CLK" },
  1768. { "DMIC L3", NULL, "DMIC3 Power" },
  1769. { "DMIC R3", NULL, "DMIC CLK" },
  1770. { "DMIC R3", NULL, "DMIC3 Power" },
  1771. { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
  1772. { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
  1773. { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
  1774. { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
  1775. { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
  1776. { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
  1777. { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
  1778. { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
  1779. { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
  1780. { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
  1781. { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
  1782. { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
  1783. { "ADC 1_2", NULL, "ADC 1" },
  1784. { "ADC 1_2", NULL, "ADC 2" },
  1785. { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1786. { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  1787. { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
  1788. { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  1789. { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
  1790. { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  1791. { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1792. { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  1793. { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
  1794. { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1795. { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1796. { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
  1797. { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1798. { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
  1799. { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
  1800. { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1801. { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
  1802. { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
  1803. { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
  1804. { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
  1805. { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
  1806. { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
  1807. { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
  1808. { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
  1809. { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1810. { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
  1811. { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
  1812. { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
  1813. { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1814. { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
  1815. { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
  1816. { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
  1817. { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1818. { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
  1819. { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  1820. { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
  1821. { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  1822. { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
  1823. { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  1824. { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
  1825. { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  1826. { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
  1827. { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
  1828. { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
  1829. { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
  1830. { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
  1831. { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
  1832. { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
  1833. { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
  1834. { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
  1835. { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
  1836. { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
  1837. { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
  1838. { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1839. { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
  1840. { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
  1841. { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
  1842. { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
  1843. { "VAD_ADC", NULL, "VAD ADC Mux" },
  1844. { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
  1845. { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
  1846. { "IF_ADC2", NULL, "Mono ADC MIXL" },
  1847. { "IF_ADC2", NULL, "Mono ADC MIXR" },
  1848. { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
  1849. { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
  1850. { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
  1851. { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
  1852. { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
  1853. { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" },
  1854. { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
  1855. { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
  1856. { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
  1857. { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" },
  1858. { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
  1859. { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
  1860. { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
  1861. { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
  1862. { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
  1863. { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
  1864. { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
  1865. { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
  1866. { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
  1867. { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
  1868. { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
  1869. { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
  1870. { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
  1871. { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
  1872. { "RxDP Mux", "DAC1", "DAC MIX" },
  1873. { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
  1874. { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
  1875. { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
  1876. { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
  1877. { "DSP UL Mux", "Bypass", "TDM Data Mux" },
  1878. { "DSP UL Mux", NULL, "I2S DSP" },
  1879. { "DSP DL Mux", "Bypass", "RxDP Mux" },
  1880. { "DSP DL Mux", NULL, "I2S DSP" },
  1881. { "TxDP_ADC_L", NULL, "DSP UL Mux" },
  1882. { "TxDP_ADC_R", NULL, "DSP UL Mux" },
  1883. { "TxDC_DAC", NULL, "DSP DL Mux" },
  1884. { "TxDP_ADC", NULL, "TxDP_ADC_L" },
  1885. { "TxDP_ADC", NULL, "TxDP_ADC_R" },
  1886. { "IF1 ADC", NULL, "I2S1" },
  1887. { "IF1 ADC", NULL, "IF1_ADC1" },
  1888. { "IF1 ADC", NULL, "IF1_ADC2" },
  1889. { "IF1 ADC", NULL, "IF_ADC3" },
  1890. { "IF1 ADC", NULL, "TxDP_ADC" },
  1891. { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
  1892. { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
  1893. { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
  1894. { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
  1895. { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
  1896. { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
  1897. { "IF2 ADC L", NULL, "IF2 ADC Mux" },
  1898. { "IF2 ADC R", NULL, "IF2 ADC Mux" },
  1899. { "IF2 ADC", NULL, "I2S2" },
  1900. { "IF2 ADC", NULL, "IF2 ADC L" },
  1901. { "IF2 ADC", NULL, "IF2 ADC R" },
  1902. { "AIF1TX", NULL, "IF1 ADC" },
  1903. { "AIF2TX", NULL, "IF2 ADC" },
  1904. { "IF1 DAC1", NULL, "AIF1RX" },
  1905. { "IF1 DAC2", NULL, "AIF1RX" },
  1906. { "IF2 DAC", NULL, "AIF2RX" },
  1907. { "IF1 DAC1", NULL, "I2S1" },
  1908. { "IF1 DAC2", NULL, "I2S1" },
  1909. { "IF2 DAC", NULL, "I2S2" },
  1910. { "IF1 DAC2 L", NULL, "IF1 DAC2" },
  1911. { "IF1 DAC2 R", NULL, "IF1 DAC2" },
  1912. { "IF1 DAC1 L", NULL, "IF1 DAC1" },
  1913. { "IF1 DAC1 R", NULL, "IF1 DAC1" },
  1914. { "IF2 DAC L", NULL, "IF2 DAC" },
  1915. { "IF2 DAC R", NULL, "IF2 DAC" },
  1916. { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
  1917. { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
  1918. { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
  1919. { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
  1920. { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
  1921. { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
  1922. { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
  1923. { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
  1924. { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
  1925. { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
  1926. { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1927. { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1928. { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
  1929. { "DAC MIX", NULL, "DAC1 MIXL" },
  1930. { "DAC MIX", NULL, "DAC1 MIXR" },
  1931. { "Audio DSP", NULL, "DAC1 MIXL" },
  1932. { "Audio DSP", NULL, "DAC1 MIXR" },
  1933. { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
  1934. { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
  1935. { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
  1936. { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
  1937. { "DAC L2 Volume", NULL, "DAC L2 Mux" },
  1938. { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
  1939. { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
  1940. { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
  1941. { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
  1942. { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
  1943. { "DAC R2 Volume", NULL, "DAC R2 Mux" },
  1944. { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
  1945. { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1946. { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
  1947. { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1948. { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
  1949. { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
  1950. { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1951. { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
  1952. { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1953. { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
  1954. { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
  1955. { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1956. { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1957. { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1958. { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
  1959. { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1960. { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1961. { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1962. { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
  1963. { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
  1964. { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1965. { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1966. { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
  1967. { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1968. { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1969. { "DAC L1", NULL, "DAC L1 Power" },
  1970. { "DAC L1", NULL, "Stereo DAC MIXL" },
  1971. { "DAC R1", NULL, "DAC R1 Power" },
  1972. { "DAC R1", NULL, "Stereo DAC MIXR" },
  1973. { "DAC L2", NULL, "Mono DAC MIXL" },
  1974. { "DAC R2", NULL, "Mono DAC MIXR" },
  1975. { "OUT MIXL", "BST1 Switch", "BST1" },
  1976. { "OUT MIXL", "INL Switch", "INL VOL" },
  1977. { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
  1978. { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
  1979. { "OUT MIXR", "BST2 Switch", "BST2" },
  1980. { "OUT MIXR", "INR Switch", "INR VOL" },
  1981. { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
  1982. { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
  1983. { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
  1984. { "HPOVOL MIXL", "INL Switch", "INL VOL" },
  1985. { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
  1986. { "HPOVOL MIXR", "INR Switch", "INR VOL" },
  1987. { "DAC 2", NULL, "DAC L2" },
  1988. { "DAC 2", NULL, "DAC R2" },
  1989. { "DAC 1", NULL, "DAC L1" },
  1990. { "DAC 1", NULL, "DAC R1" },
  1991. { "HPOVOL", NULL, "HPOVOL MIXL" },
  1992. { "HPOVOL", NULL, "HPOVOL MIXR" },
  1993. { "HPO MIX", "DAC1 Switch", "DAC 1" },
  1994. { "HPO MIX", "HPVOL Switch", "HPOVOL" },
  1995. { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
  1996. { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
  1997. { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
  1998. { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
  1999. { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  2000. { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
  2001. { "PDM1 L Mux", NULL, "PDM1 Power" },
  2002. { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  2003. { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
  2004. { "PDM1 R Mux", NULL, "PDM1 Power" },
  2005. { "HP Amp", NULL, "HPO MIX" },
  2006. { "HP Amp", NULL, "Mic Det Power" },
  2007. { "HPOL", NULL, "HP Amp" },
  2008. { "HPOL", NULL, "HP L Amp" },
  2009. { "HPOL", NULL, "Improve HP Amp Drv" },
  2010. { "HPOR", NULL, "HP Amp" },
  2011. { "HPOR", NULL, "HP R Amp" },
  2012. { "HPOR", NULL, "Improve HP Amp Drv" },
  2013. { "LOUT Amp", NULL, "LOUT MIX" },
  2014. { "LOUT L Playback", "Switch", "LOUT Amp" },
  2015. { "LOUT R Playback", "Switch", "LOUT Amp" },
  2016. { "LOUTL", NULL, "LOUT L Playback" },
  2017. { "LOUTR", NULL, "LOUT R Playback" },
  2018. { "LOUTL", NULL, "Improve HP Amp Drv" },
  2019. { "LOUTR", NULL, "Improve HP Amp Drv" },
  2020. };
  2021. static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
  2022. { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  2023. { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
  2024. { "PDM2 L Mux", NULL, "PDM2 Power" },
  2025. { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  2026. { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
  2027. { "PDM2 R Mux", NULL, "PDM2 Power" },
  2028. { "PDM1L", NULL, "PDM1 L Mux" },
  2029. { "PDM1R", NULL, "PDM1 R Mux" },
  2030. { "PDM2L", NULL, "PDM2 L Mux" },
  2031. { "PDM2R", NULL, "PDM2 R Mux" },
  2032. };
  2033. static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
  2034. { "SPO Amp", NULL, "PDM1 L Mux" },
  2035. { "SPO Amp", NULL, "PDM1 R Mux" },
  2036. { "SPOLP", NULL, "SPO Amp" },
  2037. { "SPOLN", NULL, "SPO Amp" },
  2038. { "SPORP", NULL, "SPO Amp" },
  2039. { "SPORN", NULL, "SPO Amp" },
  2040. };
  2041. static int rt5670_hw_params(struct snd_pcm_substream *substream,
  2042. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  2043. {
  2044. struct snd_soc_component *component = dai->component;
  2045. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2046. unsigned int val_len = 0, val_clk, mask_clk;
  2047. int pre_div, bclk_ms, frame_size;
  2048. rt5670->lrck[dai->id] = params_rate(params);
  2049. pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
  2050. if (pre_div < 0) {
  2051. dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
  2052. rt5670->lrck[dai->id], dai->id);
  2053. return -EINVAL;
  2054. }
  2055. frame_size = snd_soc_params_to_frame_size(params);
  2056. if (frame_size < 0) {
  2057. dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
  2058. return -EINVAL;
  2059. }
  2060. bclk_ms = frame_size > 32;
  2061. rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
  2062. dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
  2063. rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
  2064. dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
  2065. bclk_ms, pre_div, dai->id);
  2066. switch (params_width(params)) {
  2067. case 16:
  2068. break;
  2069. case 20:
  2070. val_len |= RT5670_I2S_DL_20;
  2071. break;
  2072. case 24:
  2073. val_len |= RT5670_I2S_DL_24;
  2074. break;
  2075. case 8:
  2076. val_len |= RT5670_I2S_DL_8;
  2077. break;
  2078. default:
  2079. return -EINVAL;
  2080. }
  2081. switch (dai->id) {
  2082. case RT5670_AIF1:
  2083. mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
  2084. val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
  2085. pre_div << RT5670_I2S_PD1_SFT;
  2086. snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
  2087. RT5670_I2S_DL_MASK, val_len);
  2088. snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
  2089. break;
  2090. case RT5670_AIF2:
  2091. mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
  2092. val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
  2093. pre_div << RT5670_I2S_PD2_SFT;
  2094. snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
  2095. RT5670_I2S_DL_MASK, val_len);
  2096. snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
  2097. break;
  2098. default:
  2099. dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
  2100. return -EINVAL;
  2101. }
  2102. return 0;
  2103. }
  2104. static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  2105. {
  2106. struct snd_soc_component *component = dai->component;
  2107. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2108. unsigned int reg_val = 0;
  2109. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  2110. case SND_SOC_DAIFMT_CBM_CFM:
  2111. rt5670->master[dai->id] = 1;
  2112. break;
  2113. case SND_SOC_DAIFMT_CBS_CFS:
  2114. reg_val |= RT5670_I2S_MS_S;
  2115. rt5670->master[dai->id] = 0;
  2116. break;
  2117. default:
  2118. return -EINVAL;
  2119. }
  2120. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  2121. case SND_SOC_DAIFMT_NB_NF:
  2122. break;
  2123. case SND_SOC_DAIFMT_IB_NF:
  2124. reg_val |= RT5670_I2S_BP_INV;
  2125. break;
  2126. default:
  2127. return -EINVAL;
  2128. }
  2129. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  2130. case SND_SOC_DAIFMT_I2S:
  2131. break;
  2132. case SND_SOC_DAIFMT_LEFT_J:
  2133. reg_val |= RT5670_I2S_DF_LEFT;
  2134. break;
  2135. case SND_SOC_DAIFMT_DSP_A:
  2136. reg_val |= RT5670_I2S_DF_PCM_A;
  2137. break;
  2138. case SND_SOC_DAIFMT_DSP_B:
  2139. reg_val |= RT5670_I2S_DF_PCM_B;
  2140. break;
  2141. default:
  2142. return -EINVAL;
  2143. }
  2144. switch (dai->id) {
  2145. case RT5670_AIF1:
  2146. snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
  2147. RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
  2148. RT5670_I2S_DF_MASK, reg_val);
  2149. break;
  2150. case RT5670_AIF2:
  2151. snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
  2152. RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
  2153. RT5670_I2S_DF_MASK, reg_val);
  2154. break;
  2155. default:
  2156. dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
  2157. return -EINVAL;
  2158. }
  2159. return 0;
  2160. }
  2161. static int rt5670_set_codec_sysclk(struct snd_soc_component *component, int clk_id,
  2162. int source, unsigned int freq, int dir)
  2163. {
  2164. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2165. unsigned int reg_val = 0;
  2166. switch (clk_id) {
  2167. case RT5670_SCLK_S_MCLK:
  2168. reg_val |= RT5670_SCLK_SRC_MCLK;
  2169. break;
  2170. case RT5670_SCLK_S_PLL1:
  2171. reg_val |= RT5670_SCLK_SRC_PLL1;
  2172. break;
  2173. case RT5670_SCLK_S_RCCLK:
  2174. reg_val |= RT5670_SCLK_SRC_RCCLK;
  2175. break;
  2176. default:
  2177. dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
  2178. return -EINVAL;
  2179. }
  2180. snd_soc_component_update_bits(component, RT5670_GLB_CLK,
  2181. RT5670_SCLK_SRC_MASK, reg_val);
  2182. rt5670->sysclk = freq;
  2183. if (clk_id != RT5670_SCLK_S_RCCLK)
  2184. rt5670->sysclk_src = clk_id;
  2185. dev_dbg(component->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id);
  2186. return 0;
  2187. }
  2188. static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
  2189. unsigned int freq_in, unsigned int freq_out)
  2190. {
  2191. struct snd_soc_component *component = dai->component;
  2192. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2193. struct rl6231_pll_code pll_code;
  2194. int ret;
  2195. if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
  2196. freq_out == rt5670->pll_out)
  2197. return 0;
  2198. if (!freq_in || !freq_out) {
  2199. dev_dbg(component->dev, "PLL disabled\n");
  2200. rt5670->pll_in = 0;
  2201. rt5670->pll_out = 0;
  2202. snd_soc_component_update_bits(component, RT5670_GLB_CLK,
  2203. RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
  2204. return 0;
  2205. }
  2206. switch (source) {
  2207. case RT5670_PLL1_S_MCLK:
  2208. snd_soc_component_update_bits(component, RT5670_GLB_CLK,
  2209. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
  2210. break;
  2211. case RT5670_PLL1_S_BCLK1:
  2212. case RT5670_PLL1_S_BCLK2:
  2213. case RT5670_PLL1_S_BCLK3:
  2214. case RT5670_PLL1_S_BCLK4:
  2215. switch (dai->id) {
  2216. case RT5670_AIF1:
  2217. snd_soc_component_update_bits(component, RT5670_GLB_CLK,
  2218. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
  2219. break;
  2220. case RT5670_AIF2:
  2221. snd_soc_component_update_bits(component, RT5670_GLB_CLK,
  2222. RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
  2223. break;
  2224. default:
  2225. dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
  2226. return -EINVAL;
  2227. }
  2228. break;
  2229. default:
  2230. dev_err(component->dev, "Unknown PLL source %d\n", source);
  2231. return -EINVAL;
  2232. }
  2233. ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
  2234. if (ret < 0) {
  2235. dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
  2236. return ret;
  2237. }
  2238. dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
  2239. pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
  2240. pll_code.n_code, pll_code.k_code);
  2241. snd_soc_component_write(component, RT5670_PLL_CTRL1,
  2242. pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
  2243. snd_soc_component_write(component, RT5670_PLL_CTRL2,
  2244. ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT) |
  2245. (pll_code.m_bp << RT5670_PLL_M_BP_SFT));
  2246. rt5670->pll_in = freq_in;
  2247. rt5670->pll_out = freq_out;
  2248. rt5670->pll_src = source;
  2249. return 0;
  2250. }
  2251. static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
  2252. unsigned int rx_mask, int slots, int slot_width)
  2253. {
  2254. struct snd_soc_component *component = dai->component;
  2255. unsigned int val = 0;
  2256. if (rx_mask || tx_mask)
  2257. val |= (1 << 14);
  2258. switch (slots) {
  2259. case 4:
  2260. val |= (1 << 12);
  2261. break;
  2262. case 6:
  2263. val |= (2 << 12);
  2264. break;
  2265. case 8:
  2266. val |= (3 << 12);
  2267. break;
  2268. case 2:
  2269. break;
  2270. default:
  2271. return -EINVAL;
  2272. }
  2273. switch (slot_width) {
  2274. case 20:
  2275. val |= (1 << 10);
  2276. break;
  2277. case 24:
  2278. val |= (2 << 10);
  2279. break;
  2280. case 32:
  2281. val |= (3 << 10);
  2282. break;
  2283. case 16:
  2284. break;
  2285. default:
  2286. return -EINVAL;
  2287. }
  2288. snd_soc_component_update_bits(component, RT5670_TDM_CTRL_1, 0x7c00, val);
  2289. return 0;
  2290. }
  2291. static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
  2292. {
  2293. struct snd_soc_component *component = dai->component;
  2294. dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
  2295. if (dai->id != RT5670_AIF1)
  2296. return 0;
  2297. if ((ratio % 50) == 0)
  2298. snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
  2299. RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS);
  2300. else
  2301. snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
  2302. RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR);
  2303. return 0;
  2304. }
  2305. static int rt5670_set_bias_level(struct snd_soc_component *component,
  2306. enum snd_soc_bias_level level)
  2307. {
  2308. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2309. switch (level) {
  2310. case SND_SOC_BIAS_PREPARE:
  2311. if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
  2312. snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
  2313. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2314. RT5670_PWR_BG | RT5670_PWR_VREF2,
  2315. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2316. RT5670_PWR_BG | RT5670_PWR_VREF2);
  2317. mdelay(10);
  2318. snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
  2319. RT5670_PWR_FV1 | RT5670_PWR_FV2,
  2320. RT5670_PWR_FV1 | RT5670_PWR_FV2);
  2321. snd_soc_component_update_bits(component, RT5670_CHARGE_PUMP,
  2322. RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
  2323. RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
  2324. snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x1);
  2325. snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
  2326. RT5670_LDO_SEL_MASK, 0x5);
  2327. }
  2328. break;
  2329. case SND_SOC_BIAS_STANDBY:
  2330. snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
  2331. RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
  2332. RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
  2333. snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
  2334. RT5670_LDO_SEL_MASK, 0x3);
  2335. break;
  2336. case SND_SOC_BIAS_OFF:
  2337. if (rt5670->jd_mode)
  2338. snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
  2339. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2340. RT5670_PWR_BG | RT5670_PWR_VREF2 |
  2341. RT5670_PWR_FV1 | RT5670_PWR_FV2,
  2342. RT5670_PWR_MB | RT5670_PWR_BG);
  2343. else
  2344. snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
  2345. RT5670_PWR_VREF1 | RT5670_PWR_MB |
  2346. RT5670_PWR_BG | RT5670_PWR_VREF2 |
  2347. RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
  2348. snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x0);
  2349. break;
  2350. default:
  2351. break;
  2352. }
  2353. return 0;
  2354. }
  2355. static int rt5670_probe(struct snd_soc_component *component)
  2356. {
  2357. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  2358. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2359. switch (snd_soc_component_read(component, RT5670_RESET) & RT5670_ID_MASK) {
  2360. case RT5670_ID_5670:
  2361. case RT5670_ID_5671:
  2362. snd_soc_dapm_new_controls(dapm,
  2363. rt5670_specific_dapm_widgets,
  2364. ARRAY_SIZE(rt5670_specific_dapm_widgets));
  2365. snd_soc_dapm_add_routes(dapm,
  2366. rt5670_specific_dapm_routes,
  2367. ARRAY_SIZE(rt5670_specific_dapm_routes));
  2368. break;
  2369. case RT5670_ID_5672:
  2370. snd_soc_dapm_new_controls(dapm,
  2371. rt5672_specific_dapm_widgets,
  2372. ARRAY_SIZE(rt5672_specific_dapm_widgets));
  2373. snd_soc_dapm_add_routes(dapm,
  2374. rt5672_specific_dapm_routes,
  2375. ARRAY_SIZE(rt5672_specific_dapm_routes));
  2376. break;
  2377. default:
  2378. dev_err(component->dev,
  2379. "The driver is for RT5670 RT5671 or RT5672 only\n");
  2380. return -ENODEV;
  2381. }
  2382. rt5670->component = component;
  2383. return 0;
  2384. }
  2385. static void rt5670_remove(struct snd_soc_component *component)
  2386. {
  2387. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2388. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2389. snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio);
  2390. }
  2391. #ifdef CONFIG_PM
  2392. static int rt5670_suspend(struct snd_soc_component *component)
  2393. {
  2394. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2395. regcache_cache_only(rt5670->regmap, true);
  2396. regcache_mark_dirty(rt5670->regmap);
  2397. return 0;
  2398. }
  2399. static int rt5670_resume(struct snd_soc_component *component)
  2400. {
  2401. struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
  2402. regcache_cache_only(rt5670->regmap, false);
  2403. regcache_sync(rt5670->regmap);
  2404. return 0;
  2405. }
  2406. #else
  2407. #define rt5670_suspend NULL
  2408. #define rt5670_resume NULL
  2409. #endif
  2410. #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
  2411. #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  2412. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
  2413. static const struct snd_soc_dai_ops rt5670_aif_dai_ops = {
  2414. .hw_params = rt5670_hw_params,
  2415. .set_fmt = rt5670_set_dai_fmt,
  2416. .set_tdm_slot = rt5670_set_tdm_slot,
  2417. .set_pll = rt5670_set_dai_pll,
  2418. .set_bclk_ratio = rt5670_set_bclk_ratio,
  2419. };
  2420. static struct snd_soc_dai_driver rt5670_dai[] = {
  2421. {
  2422. .name = "rt5670-aif1",
  2423. .id = RT5670_AIF1,
  2424. .playback = {
  2425. .stream_name = "AIF1 Playback",
  2426. .channels_min = 1,
  2427. .channels_max = 2,
  2428. .rates = RT5670_STEREO_RATES,
  2429. .formats = RT5670_FORMATS,
  2430. },
  2431. .capture = {
  2432. .stream_name = "AIF1 Capture",
  2433. .channels_min = 1,
  2434. .channels_max = 2,
  2435. .rates = RT5670_STEREO_RATES,
  2436. .formats = RT5670_FORMATS,
  2437. },
  2438. .ops = &rt5670_aif_dai_ops,
  2439. .symmetric_rate = 1,
  2440. },
  2441. {
  2442. .name = "rt5670-aif2",
  2443. .id = RT5670_AIF2,
  2444. .playback = {
  2445. .stream_name = "AIF2 Playback",
  2446. .channels_min = 1,
  2447. .channels_max = 2,
  2448. .rates = RT5670_STEREO_RATES,
  2449. .formats = RT5670_FORMATS,
  2450. },
  2451. .capture = {
  2452. .stream_name = "AIF2 Capture",
  2453. .channels_min = 1,
  2454. .channels_max = 2,
  2455. .rates = RT5670_STEREO_RATES,
  2456. .formats = RT5670_FORMATS,
  2457. },
  2458. .ops = &rt5670_aif_dai_ops,
  2459. .symmetric_rate = 1,
  2460. },
  2461. };
  2462. static const struct snd_soc_component_driver soc_component_dev_rt5670 = {
  2463. .probe = rt5670_probe,
  2464. .remove = rt5670_remove,
  2465. .suspend = rt5670_suspend,
  2466. .resume = rt5670_resume,
  2467. .set_bias_level = rt5670_set_bias_level,
  2468. .set_sysclk = rt5670_set_codec_sysclk,
  2469. .controls = rt5670_snd_controls,
  2470. .num_controls = ARRAY_SIZE(rt5670_snd_controls),
  2471. .dapm_widgets = rt5670_dapm_widgets,
  2472. .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
  2473. .dapm_routes = rt5670_dapm_routes,
  2474. .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
  2475. .use_pmdown_time = 1,
  2476. .endianness = 1,
  2477. };
  2478. static const struct regmap_config rt5670_regmap = {
  2479. .reg_bits = 8,
  2480. .val_bits = 16,
  2481. .use_single_read = true,
  2482. .use_single_write = true,
  2483. .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
  2484. RT5670_PR_SPACING),
  2485. .volatile_reg = rt5670_volatile_register,
  2486. .readable_reg = rt5670_readable_register,
  2487. .cache_type = REGCACHE_RBTREE,
  2488. .reg_defaults = rt5670_reg,
  2489. .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
  2490. .ranges = rt5670_ranges,
  2491. .num_ranges = ARRAY_SIZE(rt5670_ranges),
  2492. };
  2493. static const struct i2c_device_id rt5670_i2c_id[] = {
  2494. { "rt5670", 0 },
  2495. { "rt5671", 0 },
  2496. { "rt5672", 0 },
  2497. { }
  2498. };
  2499. MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
  2500. #ifdef CONFIG_ACPI
  2501. static const struct acpi_device_id rt5670_acpi_match[] = {
  2502. { "10EC5670", 0},
  2503. { "10EC5672", 0},
  2504. { "10EC5640", 0}, /* quirk */
  2505. { },
  2506. };
  2507. MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
  2508. #endif
  2509. static int rt5670_quirk_cb(const struct dmi_system_id *id)
  2510. {
  2511. rt5670_quirk = (unsigned long)id->driver_data;
  2512. return 1;
  2513. }
  2514. static const struct dmi_system_id dmi_platform_intel_quirks[] = {
  2515. {
  2516. .callback = rt5670_quirk_cb,
  2517. .ident = "Intel Braswell",
  2518. .matches = {
  2519. DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
  2520. DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
  2521. },
  2522. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2523. RT5670_DMIC1_IN2P |
  2524. RT5670_GPIO1_IS_IRQ |
  2525. RT5670_JD_MODE1),
  2526. },
  2527. {
  2528. .callback = rt5670_quirk_cb,
  2529. .ident = "Dell Wyse 3040",
  2530. .matches = {
  2531. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  2532. DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"),
  2533. },
  2534. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2535. RT5670_DMIC1_IN2P |
  2536. RT5670_GPIO1_IS_IRQ |
  2537. RT5670_JD_MODE1),
  2538. },
  2539. {
  2540. .callback = rt5670_quirk_cb,
  2541. .ident = "Lenovo Thinkpad Tablet 8",
  2542. .matches = {
  2543. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  2544. DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 8"),
  2545. },
  2546. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2547. RT5670_DMIC2_INR |
  2548. RT5670_GPIO1_IS_IRQ |
  2549. RT5670_JD_MODE1),
  2550. },
  2551. {
  2552. .callback = rt5670_quirk_cb,
  2553. .ident = "Lenovo Thinkpad Tablet 10",
  2554. .matches = {
  2555. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  2556. DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"),
  2557. },
  2558. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2559. RT5670_DMIC1_IN2P |
  2560. RT5670_GPIO1_IS_IRQ |
  2561. RT5670_JD_MODE1),
  2562. },
  2563. {
  2564. .callback = rt5670_quirk_cb,
  2565. .ident = "Lenovo Thinkpad Tablet 10",
  2566. .matches = {
  2567. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  2568. DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"),
  2569. },
  2570. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2571. RT5670_DMIC1_IN2P |
  2572. RT5670_GPIO1_IS_IRQ |
  2573. RT5670_JD_MODE1),
  2574. },
  2575. {
  2576. .callback = rt5670_quirk_cb,
  2577. .ident = "Lenovo Miix 2 10",
  2578. .matches = {
  2579. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  2580. DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"),
  2581. },
  2582. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2583. RT5670_DMIC1_IN2P |
  2584. RT5670_GPIO1_IS_EXT_SPK_EN |
  2585. RT5670_JD_MODE2),
  2586. },
  2587. {
  2588. .callback = rt5670_quirk_cb,
  2589. .ident = "Dell Venue 8 Pro 5855",
  2590. .matches = {
  2591. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  2592. DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"),
  2593. },
  2594. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2595. RT5670_DMIC2_INR |
  2596. RT5670_GPIO1_IS_IRQ |
  2597. RT5670_JD_MODE3),
  2598. },
  2599. {
  2600. .callback = rt5670_quirk_cb,
  2601. .ident = "Dell Venue 10 Pro 5055",
  2602. .matches = {
  2603. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  2604. DMI_MATCH(DMI_PRODUCT_NAME, "Venue 10 Pro 5055"),
  2605. },
  2606. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2607. RT5670_DMIC2_INR |
  2608. RT5670_GPIO1_IS_IRQ |
  2609. RT5670_JD_MODE1),
  2610. },
  2611. {
  2612. .callback = rt5670_quirk_cb,
  2613. .ident = "Aegex 10 tablet (RU2)",
  2614. .matches = {
  2615. DMI_MATCH(DMI_SYS_VENDOR, "AEGEX"),
  2616. DMI_MATCH(DMI_PRODUCT_VERSION, "RU2"),
  2617. },
  2618. .driver_data = (unsigned long *)(RT5670_DMIC_EN |
  2619. RT5670_DMIC2_INR |
  2620. RT5670_GPIO1_IS_IRQ |
  2621. RT5670_JD_MODE3),
  2622. },
  2623. {}
  2624. };
  2625. const char *rt5670_components(void)
  2626. {
  2627. unsigned long quirk;
  2628. bool dmic1 = false;
  2629. bool dmic2 = false;
  2630. bool dmic3 = false;
  2631. if (quirk_override) {
  2632. quirk = quirk_override;
  2633. } else {
  2634. dmi_check_system(dmi_platform_intel_quirks);
  2635. quirk = rt5670_quirk;
  2636. }
  2637. if ((quirk & RT5670_DMIC1_IN2P) ||
  2638. (quirk & RT5670_DMIC1_GPIO6) ||
  2639. (quirk & RT5670_DMIC1_GPIO7))
  2640. dmic1 = true;
  2641. if ((quirk & RT5670_DMIC2_INR) ||
  2642. (quirk & RT5670_DMIC2_GPIO8))
  2643. dmic2 = true;
  2644. if (quirk & RT5670_DMIC3_GPIO5)
  2645. dmic3 = true;
  2646. if (dmic1 && dmic2)
  2647. return "cfg-spk:2 cfg-mic:dmics12";
  2648. else if (dmic1)
  2649. return "cfg-spk:2 cfg-mic:dmic1";
  2650. else if (dmic2)
  2651. return "cfg-spk:2 cfg-mic:dmic2";
  2652. else if (dmic3)
  2653. return "cfg-spk:2 cfg-mic:dmic3";
  2654. return NULL;
  2655. }
  2656. EXPORT_SYMBOL_GPL(rt5670_components);
  2657. static int rt5670_i2c_probe(struct i2c_client *i2c)
  2658. {
  2659. struct rt5670_priv *rt5670;
  2660. int ret;
  2661. unsigned int val;
  2662. rt5670 = devm_kzalloc(&i2c->dev,
  2663. sizeof(struct rt5670_priv),
  2664. GFP_KERNEL);
  2665. if (NULL == rt5670)
  2666. return -ENOMEM;
  2667. i2c_set_clientdata(i2c, rt5670);
  2668. dmi_check_system(dmi_platform_intel_quirks);
  2669. if (quirk_override) {
  2670. dev_info(&i2c->dev, "Overriding quirk 0x%x => 0x%x\n",
  2671. (unsigned int)rt5670_quirk, quirk_override);
  2672. rt5670_quirk = quirk_override;
  2673. }
  2674. if (rt5670_quirk & RT5670_GPIO1_IS_IRQ) {
  2675. rt5670->gpio1_is_irq = true;
  2676. dev_info(&i2c->dev, "quirk GPIO1 is IRQ\n");
  2677. }
  2678. if (rt5670_quirk & RT5670_GPIO1_IS_EXT_SPK_EN) {
  2679. rt5670->gpio1_is_ext_spk_en = true;
  2680. dev_info(&i2c->dev, "quirk GPIO1 is external speaker enable\n");
  2681. }
  2682. if (rt5670_quirk & RT5670_IN2_DIFF) {
  2683. rt5670->in2_diff = true;
  2684. dev_info(&i2c->dev, "quirk IN2_DIFF\n");
  2685. }
  2686. if (rt5670_quirk & RT5670_DMIC_EN) {
  2687. rt5670->dmic_en = true;
  2688. dev_info(&i2c->dev, "quirk DMIC enabled\n");
  2689. }
  2690. if (rt5670_quirk & RT5670_DMIC1_IN2P) {
  2691. rt5670->dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
  2692. dev_info(&i2c->dev, "quirk DMIC1 on IN2P pin\n");
  2693. }
  2694. if (rt5670_quirk & RT5670_DMIC1_GPIO6) {
  2695. rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO6;
  2696. dev_info(&i2c->dev, "quirk DMIC1 on GPIO6 pin\n");
  2697. }
  2698. if (rt5670_quirk & RT5670_DMIC1_GPIO7) {
  2699. rt5670->dmic1_data_pin = RT5670_DMIC_DATA_GPIO7;
  2700. dev_info(&i2c->dev, "quirk DMIC1 on GPIO7 pin\n");
  2701. }
  2702. if (rt5670_quirk & RT5670_DMIC2_INR) {
  2703. rt5670->dmic2_data_pin = RT5670_DMIC_DATA_IN3N;
  2704. dev_info(&i2c->dev, "quirk DMIC2 on INR pin\n");
  2705. }
  2706. if (rt5670_quirk & RT5670_DMIC2_GPIO8) {
  2707. rt5670->dmic2_data_pin = RT5670_DMIC_DATA_GPIO8;
  2708. dev_info(&i2c->dev, "quirk DMIC2 on GPIO8 pin\n");
  2709. }
  2710. if (rt5670_quirk & RT5670_DMIC3_GPIO5) {
  2711. rt5670->dmic3_data_pin = RT5670_DMIC_DATA_GPIO5;
  2712. dev_info(&i2c->dev, "quirk DMIC3 on GPIO5 pin\n");
  2713. }
  2714. if (rt5670_quirk & RT5670_JD_MODE1) {
  2715. rt5670->jd_mode = 1;
  2716. dev_info(&i2c->dev, "quirk JD mode 1\n");
  2717. }
  2718. if (rt5670_quirk & RT5670_JD_MODE2) {
  2719. rt5670->jd_mode = 2;
  2720. dev_info(&i2c->dev, "quirk JD mode 2\n");
  2721. }
  2722. if (rt5670_quirk & RT5670_JD_MODE3) {
  2723. rt5670->jd_mode = 3;
  2724. dev_info(&i2c->dev, "quirk JD mode 3\n");
  2725. }
  2726. /*
  2727. * Enable the emulated "DAC1 Playback Switch" by default to avoid
  2728. * muting the output with older UCM profiles.
  2729. */
  2730. rt5670->dac1_playback_switch_l = true;
  2731. rt5670->dac1_playback_switch_r = true;
  2732. /* The Power-On-Reset values for the DAC1 mixer have the DAC1 input enabled. */
  2733. rt5670->dac1_mixl_dac1_switch = true;
  2734. rt5670->dac1_mixr_dac1_switch = true;
  2735. rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
  2736. if (IS_ERR(rt5670->regmap)) {
  2737. ret = PTR_ERR(rt5670->regmap);
  2738. dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
  2739. ret);
  2740. return ret;
  2741. }
  2742. regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
  2743. if (val != RT5670_DEVICE_ID) {
  2744. dev_err(&i2c->dev,
  2745. "Device with ID register %#x is not rt5670/72\n", val);
  2746. return -ENODEV;
  2747. }
  2748. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2749. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  2750. RT5670_PWR_HP_L | RT5670_PWR_HP_R |
  2751. RT5670_PWR_VREF2, RT5670_PWR_VREF2);
  2752. msleep(100);
  2753. regmap_write(rt5670->regmap, RT5670_RESET, 0);
  2754. regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
  2755. if (val >= 4)
  2756. regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
  2757. else
  2758. regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
  2759. ret = regmap_register_patch(rt5670->regmap, init_list,
  2760. ARRAY_SIZE(init_list));
  2761. if (ret != 0)
  2762. dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
  2763. regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC,
  2764. RT5670_MCLK_DET, RT5670_MCLK_DET);
  2765. if (rt5670->in2_diff)
  2766. regmap_update_bits(rt5670->regmap, RT5670_IN2,
  2767. RT5670_IN_DF2, RT5670_IN_DF2);
  2768. if (rt5670->gpio1_is_irq) {
  2769. /* for push button */
  2770. regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000);
  2771. regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010);
  2772. regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014);
  2773. /* for irq */
  2774. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2775. RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
  2776. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
  2777. RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
  2778. }
  2779. if (rt5670->gpio1_is_ext_spk_en) {
  2780. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2781. RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_GPIO1);
  2782. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
  2783. RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
  2784. }
  2785. if (rt5670->jd_mode) {
  2786. regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
  2787. RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
  2788. rt5670->sysclk = 0;
  2789. rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
  2790. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
  2791. RT5670_PWR_MB, RT5670_PWR_MB);
  2792. regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
  2793. RT5670_PWR_JD1, RT5670_PWR_JD1);
  2794. regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
  2795. RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
  2796. regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
  2797. RT5670_JD_TRI_CBJ_SEL_MASK |
  2798. RT5670_JD_TRI_HPO_SEL_MASK,
  2799. RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
  2800. switch (rt5670->jd_mode) {
  2801. case 1:
  2802. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2803. RT5670_JD1_MODE_MASK,
  2804. RT5670_JD1_MODE_0);
  2805. break;
  2806. case 2:
  2807. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2808. RT5670_JD1_MODE_MASK,
  2809. RT5670_JD1_MODE_1);
  2810. break;
  2811. case 3:
  2812. regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
  2813. RT5670_JD1_MODE_MASK,
  2814. RT5670_JD1_MODE_2);
  2815. break;
  2816. default:
  2817. break;
  2818. }
  2819. }
  2820. if (rt5670->dmic_en) {
  2821. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2822. RT5670_GP2_PIN_MASK,
  2823. RT5670_GP2_PIN_DMIC1_SCL);
  2824. switch (rt5670->dmic1_data_pin) {
  2825. case RT5670_DMIC_DATA_IN2P:
  2826. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2827. RT5670_DMIC_1_DP_MASK,
  2828. RT5670_DMIC_1_DP_IN2P);
  2829. break;
  2830. case RT5670_DMIC_DATA_GPIO6:
  2831. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2832. RT5670_DMIC_1_DP_MASK,
  2833. RT5670_DMIC_1_DP_GPIO6);
  2834. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2835. RT5670_GP6_PIN_MASK,
  2836. RT5670_GP6_PIN_DMIC1_SDA);
  2837. break;
  2838. case RT5670_DMIC_DATA_GPIO7:
  2839. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2840. RT5670_DMIC_1_DP_MASK,
  2841. RT5670_DMIC_1_DP_GPIO7);
  2842. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2843. RT5670_GP7_PIN_MASK,
  2844. RT5670_GP7_PIN_DMIC1_SDA);
  2845. break;
  2846. default:
  2847. break;
  2848. }
  2849. switch (rt5670->dmic2_data_pin) {
  2850. case RT5670_DMIC_DATA_IN3N:
  2851. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2852. RT5670_DMIC_2_DP_MASK,
  2853. RT5670_DMIC_2_DP_IN3N);
  2854. break;
  2855. case RT5670_DMIC_DATA_GPIO8:
  2856. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
  2857. RT5670_DMIC_2_DP_MASK,
  2858. RT5670_DMIC_2_DP_GPIO8);
  2859. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2860. RT5670_GP8_PIN_MASK,
  2861. RT5670_GP8_PIN_DMIC2_SDA);
  2862. break;
  2863. default:
  2864. break;
  2865. }
  2866. switch (rt5670->dmic3_data_pin) {
  2867. case RT5670_DMIC_DATA_GPIO5:
  2868. regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
  2869. RT5670_DMIC_3_DP_MASK,
  2870. RT5670_DMIC_3_DP_GPIO5);
  2871. regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
  2872. RT5670_GP5_PIN_MASK,
  2873. RT5670_GP5_PIN_DMIC3_SDA);
  2874. break;
  2875. case RT5670_DMIC_DATA_GPIO9:
  2876. case RT5670_DMIC_DATA_GPIO10:
  2877. dev_err(&i2c->dev,
  2878. "Always use GPIO5 as DMIC3 data pin\n");
  2879. break;
  2880. default:
  2881. break;
  2882. }
  2883. }
  2884. pm_runtime_enable(&i2c->dev);
  2885. pm_request_idle(&i2c->dev);
  2886. ret = devm_snd_soc_register_component(&i2c->dev,
  2887. &soc_component_dev_rt5670,
  2888. rt5670_dai, ARRAY_SIZE(rt5670_dai));
  2889. if (ret < 0)
  2890. goto err;
  2891. return 0;
  2892. err:
  2893. pm_runtime_disable(&i2c->dev);
  2894. return ret;
  2895. }
  2896. static void rt5670_i2c_remove(struct i2c_client *i2c)
  2897. {
  2898. pm_runtime_disable(&i2c->dev);
  2899. }
  2900. static struct i2c_driver rt5670_i2c_driver = {
  2901. .driver = {
  2902. .name = "rt5670",
  2903. .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
  2904. },
  2905. .probe_new = rt5670_i2c_probe,
  2906. .remove = rt5670_i2c_remove,
  2907. .id_table = rt5670_i2c_id,
  2908. };
  2909. module_i2c_driver(rt5670_i2c_driver);
  2910. MODULE_DESCRIPTION("ASoC RT5670 driver");
  2911. MODULE_AUTHOR("Bard Liao <[email protected]>");
  2912. MODULE_LICENSE("GPL v2");