rt5660.h 28 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * rt5660.h -- RT5660 ALSA SoC audio driver
  4. *
  5. * Copyright 2016 Realtek Semiconductor Corp.
  6. * Author: Oder Chiou <[email protected]>
  7. */
  8. #ifndef _RT5660_H
  9. #define _RT5660_H
  10. #include <linux/clk.h>
  11. #include <sound/rt5660.h>
  12. /* Info */
  13. #define RT5660_RESET 0x00
  14. #define RT5660_VENDOR_ID 0xfd
  15. #define RT5660_VENDOR_ID1 0xfe
  16. #define RT5660_VENDOR_ID2 0xff
  17. /* I/O - Output */
  18. #define RT5660_SPK_VOL 0x01
  19. #define RT5660_LOUT_VOL 0x02
  20. /* I/O - Input */
  21. #define RT5660_IN1_IN2 0x0d
  22. #define RT5660_IN3_IN4 0x0e
  23. /* I/O - ADC/DAC/DMIC */
  24. #define RT5660_DAC1_DIG_VOL 0x19
  25. #define RT5660_STO1_ADC_DIG_VOL 0x1c
  26. #define RT5660_ADC_BST_VOL1 0x1e
  27. /* Mixer - D-D */
  28. #define RT5660_STO1_ADC_MIXER 0x27
  29. #define RT5660_AD_DA_MIXER 0x29
  30. #define RT5660_STO_DAC_MIXER 0x2a
  31. #define RT5660_DIG_INF1_DATA 0x2f
  32. /* Mixer - ADC */
  33. #define RT5660_REC_L1_MIXER 0x3b
  34. #define RT5660_REC_L2_MIXER 0x3c
  35. #define RT5660_REC_R1_MIXER 0x3d
  36. #define RT5660_REC_R2_MIXER 0x3e
  37. /* Mixer - DAC */
  38. #define RT5660_LOUT_MIXER 0x45
  39. #define RT5660_SPK_MIXER 0x46
  40. #define RT5660_SPO_MIXER 0x48
  41. #define RT5660_SPO_CLSD_RATIO 0x4a
  42. #define RT5660_OUT_L_GAIN1 0x4d
  43. #define RT5660_OUT_L_GAIN2 0x4e
  44. #define RT5660_OUT_L1_MIXER 0x4f
  45. #define RT5660_OUT_R_GAIN1 0x50
  46. #define RT5660_OUT_R_GAIN2 0x51
  47. #define RT5660_OUT_R1_MIXER 0x52
  48. /* Power */
  49. #define RT5660_PWR_DIG1 0x61
  50. #define RT5660_PWR_DIG2 0x62
  51. #define RT5660_PWR_ANLG1 0x63
  52. #define RT5660_PWR_ANLG2 0x64
  53. #define RT5660_PWR_MIXER 0x65
  54. #define RT5660_PWR_VOL 0x66
  55. /* Private Register Control */
  56. #define RT5660_PRIV_INDEX 0x6a
  57. #define RT5660_PRIV_DATA 0x6c
  58. /* Format - ADC/DAC */
  59. #define RT5660_I2S1_SDP 0x70
  60. #define RT5660_ADDA_CLK1 0x73
  61. #define RT5660_ADDA_CLK2 0x74
  62. #define RT5660_DMIC_CTRL1 0x75
  63. /* Function - Analog */
  64. #define RT5660_GLB_CLK 0x80
  65. #define RT5660_PLL_CTRL1 0x81
  66. #define RT5660_PLL_CTRL2 0x82
  67. #define RT5660_CLSD_AMP_OC_CTRL 0x8c
  68. #define RT5660_CLSD_AMP_CTRL 0x8d
  69. #define RT5660_LOUT_AMP_CTRL 0x8e
  70. #define RT5660_SPK_AMP_SPKVDD 0x92
  71. #define RT5660_MICBIAS 0x93
  72. #define RT5660_CLSD_OUT_CTRL1 0xa1
  73. #define RT5660_CLSD_OUT_CTRL2 0xa2
  74. #define RT5660_DIPOLE_MIC_CTRL1 0xa3
  75. #define RT5660_DIPOLE_MIC_CTRL2 0xa4
  76. #define RT5660_DIPOLE_MIC_CTRL3 0xa5
  77. #define RT5660_DIPOLE_MIC_CTRL4 0xa6
  78. #define RT5660_DIPOLE_MIC_CTRL5 0xa7
  79. #define RT5660_DIPOLE_MIC_CTRL6 0xa8
  80. #define RT5660_DIPOLE_MIC_CTRL7 0xa9
  81. #define RT5660_DIPOLE_MIC_CTRL8 0xaa
  82. #define RT5660_DIPOLE_MIC_CTRL9 0xab
  83. #define RT5660_DIPOLE_MIC_CTRL10 0xac
  84. #define RT5660_DIPOLE_MIC_CTRL11 0xad
  85. #define RT5660_DIPOLE_MIC_CTRL12 0xae
  86. /* Function - Digital */
  87. #define RT5660_EQ_CTRL1 0xb0
  88. #define RT5660_EQ_CTRL2 0xb1
  89. #define RT5660_DRC_AGC_CTRL1 0xb3
  90. #define RT5660_DRC_AGC_CTRL2 0xb4
  91. #define RT5660_DRC_AGC_CTRL3 0xb5
  92. #define RT5660_DRC_AGC_CTRL4 0xb6
  93. #define RT5660_DRC_AGC_CTRL5 0xb7
  94. #define RT5660_JD_CTRL 0xbb
  95. #define RT5660_IRQ_CTRL1 0xbd
  96. #define RT5660_IRQ_CTRL2 0xbe
  97. #define RT5660_INT_IRQ_ST 0xbf
  98. #define RT5660_GPIO_CTRL1 0xc0
  99. #define RT5660_GPIO_CTRL2 0xc2
  100. #define RT5660_WIND_FILTER_CTRL1 0xd3
  101. #define RT5660_SV_ZCD1 0xd9
  102. #define RT5660_SV_ZCD2 0xda
  103. #define RT5660_DRC1_LM_CTRL1 0xe0
  104. #define RT5660_DRC1_LM_CTRL2 0xe1
  105. #define RT5660_DRC2_LM_CTRL1 0xe2
  106. #define RT5660_DRC2_LM_CTRL2 0xe3
  107. #define RT5660_MULTI_DRC_CTRL 0xe4
  108. #define RT5660_DRC2_CTRL1 0xe5
  109. #define RT5660_DRC2_CTRL2 0xe6
  110. #define RT5660_DRC2_CTRL3 0xe7
  111. #define RT5660_DRC2_CTRL4 0xe8
  112. #define RT5660_DRC2_CTRL5 0xe9
  113. #define RT5660_ALC_PGA_CTRL1 0xea
  114. #define RT5660_ALC_PGA_CTRL2 0xeb
  115. #define RT5660_ALC_PGA_CTRL3 0xec
  116. #define RT5660_ALC_PGA_CTRL4 0xed
  117. #define RT5660_ALC_PGA_CTRL5 0xee
  118. #define RT5660_ALC_PGA_CTRL6 0xef
  119. #define RT5660_ALC_PGA_CTRL7 0xf0
  120. /* General Control */
  121. #define RT5660_GEN_CTRL1 0xfa
  122. #define RT5660_GEN_CTRL2 0xfb
  123. #define RT5660_GEN_CTRL3 0xfc
  124. /* Index of Codec Private Register definition */
  125. #define RT5660_CHOP_DAC_ADC 0x3d
  126. /* Global Definition */
  127. #define RT5660_L_MUTE (0x1 << 15)
  128. #define RT5660_L_MUTE_SFT 15
  129. #define RT5660_VOL_L_MUTE (0x1 << 14)
  130. #define RT5660_VOL_L_SFT 14
  131. #define RT5660_R_MUTE (0x1 << 7)
  132. #define RT5660_R_MUTE_SFT 7
  133. #define RT5660_VOL_R_MUTE (0x1 << 6)
  134. #define RT5660_VOL_R_SFT 6
  135. #define RT5660_L_VOL_MASK (0x3f << 8)
  136. #define RT5660_L_VOL_SFT 8
  137. #define RT5660_R_VOL_MASK (0x3f)
  138. #define RT5660_R_VOL_SFT 0
  139. /* IN1 and IN2 Control (0x0d) */
  140. #define RT5660_IN_DF1 (0x1 << 15)
  141. #define RT5660_IN_SFT1 15
  142. #define RT5660_BST_MASK1 (0x7f << 8)
  143. #define RT5660_BST_SFT1 8
  144. #define RT5660_IN_DF2 (0x1 << 7)
  145. #define RT5660_IN_SFT2 7
  146. #define RT5660_BST_MASK2 (0x7f << 0)
  147. #define RT5660_BST_SFT2 0
  148. /* IN3 and IN4 Control (0x0e) */
  149. #define RT5660_IN_DF3 (0x1 << 15)
  150. #define RT5660_IN_SFT3 15
  151. #define RT5660_BST_MASK3 (0x7f << 8)
  152. #define RT5660_BST_SFT3 8
  153. #define RT5660_IN_DF4 (0x1 << 7)
  154. #define RT5660_IN_SFT4 7
  155. #define RT5660_BST_MASK4 (0x7f << 0)
  156. #define RT5660_BST_SFT4 0
  157. /* DAC1 Digital Volume (0x19) */
  158. #define RT5660_DAC_L1_VOL_MASK (0x7f << 9)
  159. #define RT5660_DAC_L1_VOL_SFT 9
  160. #define RT5660_DAC_R1_VOL_MASK (0x7f << 1)
  161. #define RT5660_DAC_R1_VOL_SFT 1
  162. /* ADC Digital Volume Control (0x1c) */
  163. #define RT5660_ADC_L_VOL_MASK (0x3f << 9)
  164. #define RT5660_ADC_L_VOL_SFT 9
  165. #define RT5660_ADC_R_VOL_MASK (0x3f << 1)
  166. #define RT5660_ADC_R_VOL_SFT 1
  167. /* ADC Boost Volume Control (0x1e) */
  168. #define RT5660_STO1_ADC_L_BST_MASK (0x3 << 14)
  169. #define RT5660_STO1_ADC_L_BST_SFT 14
  170. #define RT5660_STO1_ADC_R_BST_MASK (0x3 << 12)
  171. #define RT5660_STO1_ADC_R_BST_SFT 12
  172. /* Stereo ADC Mixer Control (0x27) */
  173. #define RT5660_M_ADC_L1 (0x1 << 14)
  174. #define RT5660_M_ADC_L1_SFT 14
  175. #define RT5660_M_ADC_L2 (0x1 << 13)
  176. #define RT5660_M_ADC_L2_SFT 13
  177. #define RT5660_M_ADC_R1 (0x1 << 6)
  178. #define RT5660_M_ADC_R1_SFT 6
  179. #define RT5660_M_ADC_R2 (0x1 << 5)
  180. #define RT5660_M_ADC_R2_SFT 5
  181. /* ADC Mixer to DAC Mixer Control (0x29) */
  182. #define RT5660_M_ADCMIX_L (0x1 << 15)
  183. #define RT5660_M_ADCMIX_L_SFT 15
  184. #define RT5660_M_DAC1_L (0x1 << 14)
  185. #define RT5660_M_DAC1_L_SFT 14
  186. #define RT5660_M_ADCMIX_R (0x1 << 7)
  187. #define RT5660_M_ADCMIX_R_SFT 7
  188. #define RT5660_M_DAC1_R (0x1 << 6)
  189. #define RT5660_M_DAC1_R_SFT 6
  190. /* Stereo DAC Mixer Control (0x2a) */
  191. #define RT5660_M_DAC_L1 (0x1 << 14)
  192. #define RT5660_M_DAC_L1_SFT 14
  193. #define RT5660_DAC_L1_STO_L_VOL_MASK (0x1 << 13)
  194. #define RT5660_DAC_L1_STO_L_VOL_SFT 13
  195. #define RT5660_M_DAC_R1_STO_L (0x1 << 9)
  196. #define RT5660_M_DAC_R1_STO_L_SFT 9
  197. #define RT5660_DAC_R1_STO_L_VOL_MASK (0x1 << 8)
  198. #define RT5660_DAC_R1_STO_L_VOL_SFT 8
  199. #define RT5660_M_DAC_R1 (0x1 << 6)
  200. #define RT5660_M_DAC_R1_SFT 6
  201. #define RT5660_DAC_R1_STO_R_VOL_MASK (0x1 << 5)
  202. #define RT5660_DAC_R1_STO_R_VOL_SFT 5
  203. #define RT5660_M_DAC_L1_STO_R (0x1 << 1)
  204. #define RT5660_M_DAC_L1_STO_R_SFT 1
  205. #define RT5660_DAC_L1_STO_R_VOL_MASK (0x1)
  206. #define RT5660_DAC_L1_STO_R_VOL_SFT 0
  207. /* Digital Interface Data Control (0x2f) */
  208. #define RT5660_IF1_DAC_IN_SEL (0x3 << 14)
  209. #define RT5660_IF1_DAC_IN_SFT 14
  210. #define RT5660_IF1_ADC_IN_SEL (0x3 << 12)
  211. #define RT5660_IF1_ADC_IN_SFT 12
  212. /* REC Left Mixer Control 1 (0x3b) */
  213. #define RT5660_G_BST3_RM_L_MASK (0x7 << 4)
  214. #define RT5660_G_BST3_RM_L_SFT 4
  215. #define RT5660_G_BST2_RM_L_MASK (0x7 << 1)
  216. #define RT5660_G_BST2_RM_L_SFT 1
  217. /* REC Left Mixer Control 2 (0x3c) */
  218. #define RT5660_G_BST1_RM_L_MASK (0x7 << 13)
  219. #define RT5660_G_BST1_RM_L_SFT 13
  220. #define RT5660_G_OM_L_RM_L_MASK (0x7 << 10)
  221. #define RT5660_G_OM_L_RM_L_SFT 10
  222. #define RT5660_M_BST3_RM_L (0x1 << 3)
  223. #define RT5660_M_BST3_RM_L_SFT 3
  224. #define RT5660_M_BST2_RM_L (0x1 << 2)
  225. #define RT5660_M_BST2_RM_L_SFT 2
  226. #define RT5660_M_BST1_RM_L (0x1 << 1)
  227. #define RT5660_M_BST1_RM_L_SFT 1
  228. #define RT5660_M_OM_L_RM_L (0x1)
  229. #define RT5660_M_OM_L_RM_L_SFT 0
  230. /* REC Right Mixer Control 1 (0x3d) */
  231. #define RT5660_G_BST3_RM_R_MASK (0x7 << 4)
  232. #define RT5660_G_BST3_RM_R_SFT 4
  233. #define RT5660_G_BST2_RM_R_MASK (0x7 << 1)
  234. #define RT5660_G_BST2_RM_R_SFT 1
  235. /* REC Right Mixer Control 2 (0x3e) */
  236. #define RT5660_G_BST1_RM_R_MASK (0x7 << 13)
  237. #define RT5660_G_BST1_RM_R_SFT 13
  238. #define RT5660_G_OM_R_RM_R_MASK (0x7 << 10)
  239. #define RT5660_G_OM_R_RM_R_SFT 10
  240. #define RT5660_M_BST3_RM_R (0x1 << 3)
  241. #define RT5660_M_BST3_RM_R_SFT 3
  242. #define RT5660_M_BST2_RM_R (0x1 << 2)
  243. #define RT5660_M_BST2_RM_R_SFT 2
  244. #define RT5660_M_BST1_RM_R (0x1 << 1)
  245. #define RT5660_M_BST1_RM_R_SFT 1
  246. #define RT5660_M_OM_R_RM_R (0x1)
  247. #define RT5660_M_OM_R_RM_R_SFT 0
  248. /* LOUTMIX Control (0x45) */
  249. #define RT5660_M_DAC1_LM (0x1 << 14)
  250. #define RT5660_M_DAC1_LM_SFT 14
  251. #define RT5660_M_LOVOL_M (0x1 << 13)
  252. #define RT5660_M_LOVOL_LM_SFT 13
  253. /* SPK Mixer Control (0x46) */
  254. #define RT5660_G_BST3_SM_MASK (0x3 << 14)
  255. #define RT5660_G_BST3_SM_SFT 14
  256. #define RT5660_G_BST1_SM_MASK (0x3 << 12)
  257. #define RT5660_G_BST1_SM_SFT 12
  258. #define RT5660_G_DACl_SM_MASK (0x3 << 10)
  259. #define RT5660_G_DACl_SM_SFT 10
  260. #define RT5660_G_DACR_SM_MASK (0x3 << 8)
  261. #define RT5660_G_DACR_SM_SFT 8
  262. #define RT5660_G_OM_L_SM_MASK (0x3 << 6)
  263. #define RT5660_G_OM_L_SM_SFT 6
  264. #define RT5660_M_DACR_SM (0x1 << 5)
  265. #define RT5660_M_DACR_SM_SFT 5
  266. #define RT5660_M_BST1_SM (0x1 << 4)
  267. #define RT5660_M_BST1_SM_SFT 4
  268. #define RT5660_M_BST3_SM (0x1 << 3)
  269. #define RT5660_M_BST3_SM_SFT 3
  270. #define RT5660_M_DACL_SM (0x1 << 2)
  271. #define RT5660_M_DACL_SM_SFT 2
  272. #define RT5660_M_OM_L_SM (0x1 << 1)
  273. #define RT5660_M_OM_L_SM_SFT 1
  274. /* SPOMIX Control (0x48) */
  275. #define RT5660_M_DAC_R_SPM (0x1 << 14)
  276. #define RT5660_M_DAC_R_SPM_SFT 14
  277. #define RT5660_M_DAC_L_SPM (0x1 << 13)
  278. #define RT5660_M_DAC_L_SPM_SFT 13
  279. #define RT5660_M_SV_SPM (0x1 << 12)
  280. #define RT5660_M_SV_SPM_SFT 12
  281. #define RT5660_M_BST1_SPM (0x1 << 11)
  282. #define RT5660_M_BST1_SPM_SFT 11
  283. /* Output Left Mixer Control 1 (0x4d) */
  284. #define RT5660_G_BST3_OM_L_MASK (0x7 << 13)
  285. #define RT5660_G_BST3_OM_L_SFT 13
  286. #define RT5660_G_BST2_OM_L_MASK (0x7 << 10)
  287. #define RT5660_G_BST2_OM_L_SFT 10
  288. #define RT5660_G_BST1_OM_L_MASK (0x7 << 7)
  289. #define RT5660_G_BST1_OM_L_SFT 7
  290. #define RT5660_G_RM_L_OM_L_MASK (0x7 << 1)
  291. #define RT5660_G_RM_L_OM_L_SFT 1
  292. /* Output Left Mixer Control 2 (0x4e) */
  293. #define RT5660_G_DAC_R1_OM_L_MASK (0x7 << 10)
  294. #define RT5660_G_DAC_R1_OM_L_SFT 10
  295. #define RT5660_G_DAC_L1_OM_L_MASK (0x7 << 7)
  296. #define RT5660_G_DAC_L1_OM_L_SFT 7
  297. /* Output Left Mixer Control 3 (0x4f) */
  298. #define RT5660_M_BST3_OM_L (0x1 << 5)
  299. #define RT5660_M_BST3_OM_L_SFT 5
  300. #define RT5660_M_BST2_OM_L (0x1 << 4)
  301. #define RT5660_M_BST2_OM_L_SFT 4
  302. #define RT5660_M_BST1_OM_L (0x1 << 3)
  303. #define RT5660_M_BST1_OM_L_SFT 3
  304. #define RT5660_M_RM_L_OM_L (0x1 << 2)
  305. #define RT5660_M_RM_L_OM_L_SFT 2
  306. #define RT5660_M_DAC_R_OM_L (0x1 << 1)
  307. #define RT5660_M_DAC_R_OM_L_SFT 1
  308. #define RT5660_M_DAC_L_OM_L (0x1)
  309. #define RT5660_M_DAC_L_OM_L_SFT 0
  310. /* Output Right Mixer Control 1 (0x50) */
  311. #define RT5660_G_BST2_OM_R_MASK (0x7 << 10)
  312. #define RT5660_G_BST2_OM_R_SFT 10
  313. #define RT5660_G_BST1_OM_R_MASK (0x7 << 7)
  314. #define RT5660_G_BST1_OM_R_SFT 7
  315. #define RT5660_G_RM_R_OM_R_MASK (0x7 << 1)
  316. #define RT5660_G_RM_R_OM_R_SFT 1
  317. /* Output Right Mixer Control 2 (0x51) */
  318. #define RT5660_G_DAC_L_OM_R_MASK (0x7 << 10)
  319. #define RT5660_G_DAC_L_OM_R_SFT 10
  320. #define RT5660_G_DAC_R_OM_R_MASK (0x7 << 7)
  321. #define RT5660_G_DAC_R_OM_R_SFT 7
  322. /* Output Right Mixer Control 3 (0x52) */
  323. #define RT5660_M_BST2_OM_R (0x1 << 4)
  324. #define RT5660_M_BST2_OM_R_SFT 4
  325. #define RT5660_M_BST1_OM_R (0x1 << 3)
  326. #define RT5660_M_BST1_OM_R_SFT 3
  327. #define RT5660_M_RM_R_OM_R (0x1 << 2)
  328. #define RT5660_M_RM_R_OM_R_SFT 2
  329. #define RT5660_M_DAC_L_OM_R (0x1 << 1)
  330. #define RT5660_M_DAC_L_OM_R_SFT 1
  331. #define RT5660_M_DAC_R_OM_R (0x1)
  332. #define RT5660_M_DAC_R_OM_R_SFT 0
  333. /* Power Management for Digital 1 (0x61) */
  334. #define RT5660_PWR_I2S1 (0x1 << 15)
  335. #define RT5660_PWR_I2S1_BIT 15
  336. #define RT5660_PWR_DAC_L1 (0x1 << 12)
  337. #define RT5660_PWR_DAC_L1_BIT 12
  338. #define RT5660_PWR_DAC_R1 (0x1 << 11)
  339. #define RT5660_PWR_DAC_R1_BIT 11
  340. #define RT5660_PWR_ADC_L (0x1 << 2)
  341. #define RT5660_PWR_ADC_L_BIT 2
  342. #define RT5660_PWR_ADC_R (0x1 << 1)
  343. #define RT5660_PWR_ADC_R_BIT 1
  344. #define RT5660_PWR_CLS_D (0x1)
  345. #define RT5660_PWR_CLS_D_BIT 0
  346. /* Power Management for Digital 2 (0x62) */
  347. #define RT5660_PWR_ADC_S1F (0x1 << 15)
  348. #define RT5660_PWR_ADC_S1F_BIT 15
  349. #define RT5660_PWR_DAC_S1F (0x1 << 11)
  350. #define RT5660_PWR_DAC_S1F_BIT 11
  351. /* Power Management for Analog 1 (0x63) */
  352. #define RT5660_PWR_VREF1 (0x1 << 15)
  353. #define RT5660_PWR_VREF1_BIT 15
  354. #define RT5660_PWR_FV1 (0x1 << 14)
  355. #define RT5660_PWR_FV1_BIT 14
  356. #define RT5660_PWR_MB (0x1 << 13)
  357. #define RT5660_PWR_MB_BIT 13
  358. #define RT5660_PWR_BG (0x1 << 11)
  359. #define RT5660_PWR_BG_BIT 11
  360. #define RT5660_PWR_HP_L (0x1 << 7)
  361. #define RT5660_PWR_HP_L_BIT 7
  362. #define RT5660_PWR_HP_R (0x1 << 6)
  363. #define RT5660_PWR_HP_R_BIT 6
  364. #define RT5660_PWR_HA (0x1 << 5)
  365. #define RT5660_PWR_HA_BIT 5
  366. #define RT5660_PWR_VREF2 (0x1 << 4)
  367. #define RT5660_PWR_VREF2_BIT 4
  368. #define RT5660_PWR_FV2 (0x1 << 3)
  369. #define RT5660_PWR_FV2_BIT 3
  370. #define RT5660_PWR_LDO2 (0x1 << 2)
  371. #define RT5660_PWR_LDO2_BIT 2
  372. /* Power Management for Analog 2 (0x64) */
  373. #define RT5660_PWR_BST1 (0x1 << 15)
  374. #define RT5660_PWR_BST1_BIT 15
  375. #define RT5660_PWR_BST2 (0x1 << 14)
  376. #define RT5660_PWR_BST2_BIT 14
  377. #define RT5660_PWR_BST3 (0x1 << 13)
  378. #define RT5660_PWR_BST3_BIT 13
  379. #define RT5660_PWR_MB1 (0x1 << 11)
  380. #define RT5660_PWR_MB1_BIT 11
  381. #define RT5660_PWR_MB2 (0x1 << 10)
  382. #define RT5660_PWR_MB2_BIT 10
  383. #define RT5660_PWR_PLL (0x1 << 9)
  384. #define RT5660_PWR_PLL_BIT 9
  385. /* Power Management for Mixer (0x65) */
  386. #define RT5660_PWR_OM_L (0x1 << 15)
  387. #define RT5660_PWR_OM_L_BIT 15
  388. #define RT5660_PWR_OM_R (0x1 << 14)
  389. #define RT5660_PWR_OM_R_BIT 14
  390. #define RT5660_PWR_SM (0x1 << 13)
  391. #define RT5660_PWR_SM_BIT 13
  392. #define RT5660_PWR_RM_L (0x1 << 11)
  393. #define RT5660_PWR_RM_L_BIT 11
  394. #define RT5660_PWR_RM_R (0x1 << 10)
  395. #define RT5660_PWR_RM_R_BIT 10
  396. /* Power Management for Volume (0x66) */
  397. #define RT5660_PWR_SV (0x1 << 15)
  398. #define RT5660_PWR_SV_BIT 15
  399. #define RT5660_PWR_LV_L (0x1 << 11)
  400. #define RT5660_PWR_LV_L_BIT 11
  401. #define RT5660_PWR_LV_R (0x1 << 10)
  402. #define RT5660_PWR_LV_R_BIT 10
  403. /* I2S1 Audio Serial Data Port Control (0x70) */
  404. #define RT5660_I2S_MS_MASK (0x1 << 15)
  405. #define RT5660_I2S_MS_SFT 15
  406. #define RT5660_I2S_MS_M (0x0 << 15)
  407. #define RT5660_I2S_MS_S (0x1 << 15)
  408. #define RT5660_I2S_O_CP_MASK (0x3 << 10)
  409. #define RT5660_I2S_O_CP_SFT 10
  410. #define RT5660_I2S_O_CP_OFF (0x0 << 10)
  411. #define RT5660_I2S_O_CP_U_LAW (0x1 << 10)
  412. #define RT5660_I2S_O_CP_A_LAW (0x2 << 10)
  413. #define RT5660_I2S_I_CP_MASK (0x3 << 8)
  414. #define RT5660_I2S_I_CP_SFT 8
  415. #define RT5660_I2S_I_CP_OFF (0x0 << 8)
  416. #define RT5660_I2S_I_CP_U_LAW (0x1 << 8)
  417. #define RT5660_I2S_I_CP_A_LAW (0x2 << 8)
  418. #define RT5660_I2S_BP_MASK (0x1 << 7)
  419. #define RT5660_I2S_BP_SFT 7
  420. #define RT5660_I2S_BP_NOR (0x0 << 7)
  421. #define RT5660_I2S_BP_INV (0x1 << 7)
  422. #define RT5660_I2S_DL_MASK (0x3 << 2)
  423. #define RT5660_I2S_DL_SFT 2
  424. #define RT5660_I2S_DL_16 (0x0 << 2)
  425. #define RT5660_I2S_DL_20 (0x1 << 2)
  426. #define RT5660_I2S_DL_24 (0x2 << 2)
  427. #define RT5660_I2S_DL_8 (0x3 << 2)
  428. #define RT5660_I2S_DF_MASK (0x3)
  429. #define RT5660_I2S_DF_SFT 0
  430. #define RT5660_I2S_DF_I2S (0x0)
  431. #define RT5660_I2S_DF_LEFT (0x1)
  432. #define RT5660_I2S_DF_PCM_A (0x2)
  433. #define RT5660_I2S_DF_PCM_B (0x3)
  434. /* ADC/DAC Clock Control 1 (0x73) */
  435. #define RT5660_I2S_BCLK_MS1_MASK (0x1 << 15)
  436. #define RT5660_I2S_BCLK_MS1_SFT 15
  437. #define RT5660_I2S_BCLK_MS1_32 (0x0 << 15)
  438. #define RT5660_I2S_BCLK_MS1_64 (0x1 << 15)
  439. #define RT5660_I2S_PD1_MASK (0x7 << 12)
  440. #define RT5660_I2S_PD1_SFT 12
  441. #define RT5660_I2S_PD1_1 (0x0 << 12)
  442. #define RT5660_I2S_PD1_2 (0x1 << 12)
  443. #define RT5660_I2S_PD1_3 (0x2 << 12)
  444. #define RT5660_I2S_PD1_4 (0x3 << 12)
  445. #define RT5660_I2S_PD1_6 (0x4 << 12)
  446. #define RT5660_I2S_PD1_8 (0x5 << 12)
  447. #define RT5660_I2S_PD1_12 (0x6 << 12)
  448. #define RT5660_I2S_PD1_16 (0x7 << 12)
  449. #define RT5660_DAC_OSR_MASK (0x3 << 2)
  450. #define RT5660_DAC_OSR_SFT 2
  451. #define RT5660_DAC_OSR_128 (0x0 << 2)
  452. #define RT5660_DAC_OSR_64 (0x1 << 2)
  453. #define RT5660_DAC_OSR_32 (0x2 << 2)
  454. #define RT5660_DAC_OSR_16 (0x3 << 2)
  455. #define RT5660_ADC_OSR_MASK (0x3)
  456. #define RT5660_ADC_OSR_SFT 0
  457. #define RT5660_ADC_OSR_128 (0x0)
  458. #define RT5660_ADC_OSR_64 (0x1)
  459. #define RT5660_ADC_OSR_32 (0x2)
  460. #define RT5660_ADC_OSR_16 (0x3)
  461. /* ADC/DAC Clock Control 2 (0x74) */
  462. #define RT5660_RESET_ADF (0x1 << 13)
  463. #define RT5660_RESET_ADF_SFT 13
  464. #define RT5660_RESET_DAF (0x1 << 12)
  465. #define RT5660_RESET_DAF_SFT 12
  466. #define RT5660_DAHPF_EN (0x1 << 11)
  467. #define RT5660_DAHPF_EN_SFT 11
  468. #define RT5660_ADHPF_EN (0x1 << 10)
  469. #define RT5660_ADHPF_EN_SFT 10
  470. /* Digital Microphone Control (0x75) */
  471. #define RT5660_DMIC_1_EN_MASK (0x1 << 15)
  472. #define RT5660_DMIC_1_EN_SFT 15
  473. #define RT5660_DMIC_1_DIS (0x0 << 15)
  474. #define RT5660_DMIC_1_EN (0x1 << 15)
  475. #define RT5660_DMIC_1L_LH_MASK (0x1 << 13)
  476. #define RT5660_DMIC_1L_LH_SFT 13
  477. #define RT5660_DMIC_1L_LH_RISING (0x0 << 13)
  478. #define RT5660_DMIC_1L_LH_FALLING (0x1 << 13)
  479. #define RT5660_DMIC_1R_LH_MASK (0x1 << 12)
  480. #define RT5660_DMIC_1R_LH_SFT 12
  481. #define RT5660_DMIC_1R_LH_RISING (0x0 << 12)
  482. #define RT5660_DMIC_1R_LH_FALLING (0x1 << 12)
  483. #define RT5660_SEL_DMIC_DATA_MASK (0x1 << 11)
  484. #define RT5660_SEL_DMIC_DATA_SFT 11
  485. #define RT5660_SEL_DMIC_DATA_GPIO2 (0x0 << 11)
  486. #define RT5660_SEL_DMIC_DATA_IN1P (0x1 << 11)
  487. #define RT5660_DMIC_CLK_MASK (0x7 << 5)
  488. #define RT5660_DMIC_CLK_SFT 5
  489. /* Global Clock Control (0x80) */
  490. #define RT5660_SCLK_SRC_MASK (0x3 << 14)
  491. #define RT5660_SCLK_SRC_SFT 14
  492. #define RT5660_SCLK_SRC_MCLK (0x0 << 14)
  493. #define RT5660_SCLK_SRC_PLL1 (0x1 << 14)
  494. #define RT5660_SCLK_SRC_RCCLK (0x2 << 14)
  495. #define RT5660_PLL1_SRC_MASK (0x3 << 12)
  496. #define RT5660_PLL1_SRC_SFT 12
  497. #define RT5660_PLL1_SRC_MCLK (0x0 << 12)
  498. #define RT5660_PLL1_SRC_BCLK1 (0x1 << 12)
  499. #define RT5660_PLL1_SRC_RCCLK (0x2 << 12)
  500. #define RT5660_PLL1_PD_MASK (0x1 << 3)
  501. #define RT5660_PLL1_PD_SFT 3
  502. #define RT5660_PLL1_PD_1 (0x0 << 3)
  503. #define RT5660_PLL1_PD_2 (0x1 << 3)
  504. #define RT5660_PLL_INP_MAX 40000000
  505. #define RT5660_PLL_INP_MIN 256000
  506. /* PLL M/N/K Code Control 1 (0x81) */
  507. #define RT5660_PLL_N_MAX 0x1ff
  508. #define RT5660_PLL_N_MASK (RT5660_PLL_N_MAX << 7)
  509. #define RT5660_PLL_N_SFT 7
  510. #define RT5660_PLL_K_MAX 0x1f
  511. #define RT5660_PLL_K_MASK (RT5660_PLL_K_MAX)
  512. #define RT5660_PLL_K_SFT 0
  513. /* PLL M/N/K Code Control 2 (0x82) */
  514. #define RT5660_PLL_M_MAX 0xf
  515. #define RT5660_PLL_M_MASK (RT5660_PLL_M_MAX << 12)
  516. #define RT5660_PLL_M_SFT 12
  517. #define RT5660_PLL_M_BP (0x1 << 11)
  518. #define RT5660_PLL_M_BP_SFT 11
  519. /* Class D Over Current Control (0x8c) */
  520. #define RT5660_CLSD_OC_MASK (0x1 << 9)
  521. #define RT5660_CLSD_OC_SFT 9
  522. #define RT5660_CLSD_OC_PU (0x0 << 9)
  523. #define RT5660_CLSD_OC_PD (0x1 << 9)
  524. #define RT5660_AUTO_PD_MASK (0x1 << 8)
  525. #define RT5660_AUTO_PD_SFT 8
  526. #define RT5660_AUTO_PD_DIS (0x0 << 8)
  527. #define RT5660_AUTO_PD_EN (0x1 << 8)
  528. #define RT5660_CLSD_OC_TH_MASK (0x3f)
  529. #define RT5660_CLSD_OC_TH_SFT 0
  530. /* Class D Output Control (0x8d) */
  531. #define RT5660_CLSD_RATIO_MASK (0xf << 12)
  532. #define RT5660_CLSD_RATIO_SFT 12
  533. /* Lout Amp Control 1 (0x8e) */
  534. #define RT5660_LOUT_CO_MASK (0x1 << 4)
  535. #define RT5660_LOUT_CO_SFT 4
  536. #define RT5660_LOUT_CO_DIS (0x0 << 4)
  537. #define RT5660_LOUT_CO_EN (0x1 << 4)
  538. #define RT5660_LOUT_CB_MASK (0x1)
  539. #define RT5660_LOUT_CB_SFT 0
  540. #define RT5660_LOUT_CB_PD (0x0)
  541. #define RT5660_LOUT_CB_PU (0x1)
  542. /* SPKVDD detection control (0x92) */
  543. #define RT5660_SPKVDD_DET_MASK (0x1 << 15)
  544. #define RT5660_SPKVDD_DET_SFT 15
  545. #define RT5660_SPKVDD_DET_DIS (0x0 << 15)
  546. #define RT5660_SPKVDD_DET_EN (0x1 << 15)
  547. #define RT5660_SPK_AG_MASK (0x1 << 14)
  548. #define RT5660_SPK_AG_SFT 14
  549. #define RT5660_SPK_AG_DIS (0x0 << 14)
  550. #define RT5660_SPK_AG_EN (0x1 << 14)
  551. /* Micbias Control (0x93) */
  552. #define RT5660_MIC1_BS_MASK (0x1 << 15)
  553. #define RT5660_MIC1_BS_SFT 15
  554. #define RT5660_MIC1_BS_9AV (0x0 << 15)
  555. #define RT5660_MIC1_BS_75AV (0x1 << 15)
  556. #define RT5660_MIC2_BS_MASK (0x1 << 14)
  557. #define RT5660_MIC2_BS_SFT 14
  558. #define RT5660_MIC2_BS_9AV (0x0 << 14)
  559. #define RT5660_MIC2_BS_75AV (0x1 << 14)
  560. #define RT5660_MIC1_OVCD_MASK (0x1 << 11)
  561. #define RT5660_MIC1_OVCD_SFT 11
  562. #define RT5660_MIC1_OVCD_DIS (0x0 << 11)
  563. #define RT5660_MIC1_OVCD_EN (0x1 << 11)
  564. #define RT5660_MIC1_OVTH_MASK (0x3 << 9)
  565. #define RT5660_MIC1_OVTH_SFT 9
  566. #define RT5660_MIC1_OVTH_600UA (0x0 << 9)
  567. #define RT5660_MIC1_OVTH_1500UA (0x1 << 9)
  568. #define RT5660_MIC1_OVTH_2000UA (0x2 << 9)
  569. #define RT5660_MIC2_OVCD_MASK (0x1 << 8)
  570. #define RT5660_MIC2_OVCD_SFT 8
  571. #define RT5660_MIC2_OVCD_DIS (0x0 << 8)
  572. #define RT5660_MIC2_OVCD_EN (0x1 << 8)
  573. #define RT5660_MIC2_OVTH_MASK (0x3 << 6)
  574. #define RT5660_MIC2_OVTH_SFT 6
  575. #define RT5660_MIC2_OVTH_600UA (0x0 << 6)
  576. #define RT5660_MIC2_OVTH_1500UA (0x1 << 6)
  577. #define RT5660_MIC2_OVTH_2000UA (0x2 << 6)
  578. #define RT5660_PWR_CLK25M_MASK (0x1 << 4)
  579. #define RT5660_PWR_CLK25M_SFT 4
  580. #define RT5660_PWR_CLK25M_PD (0x0 << 4)
  581. #define RT5660_PWR_CLK25M_PU (0x1 << 4)
  582. /* EQ Control 1 (0xb0) */
  583. #define RT5660_EQ_SRC_MASK (0x1 << 15)
  584. #define RT5660_EQ_SRC_SFT 15
  585. #define RT5660_EQ_SRC_DAC (0x0 << 15)
  586. #define RT5660_EQ_SRC_ADC (0x1 << 15)
  587. #define RT5660_EQ_UPD (0x1 << 14)
  588. #define RT5660_EQ_UPD_BIT 14
  589. /* Jack Detect Control (0xbb) */
  590. #define RT5660_JD_MASK (0x3 << 14)
  591. #define RT5660_JD_SFT 14
  592. #define RT5660_JD_DIS (0x0 << 14)
  593. #define RT5660_JD_GPIO1 (0x1 << 14)
  594. #define RT5660_JD_GPIO2 (0x2 << 14)
  595. #define RT5660_JD_LOUT_MASK (0x1 << 11)
  596. #define RT5660_JD_LOUT_SFT 11
  597. #define RT5660_JD_LOUT_DIS (0x0 << 11)
  598. #define RT5660_JD_LOUT_EN (0x1 << 11)
  599. #define RT5660_JD_LOUT_TRG_MASK (0x1 << 10)
  600. #define RT5660_JD_LOUT_TRG_SFT 10
  601. #define RT5660_JD_LOUT_TRG_LO (0x0 << 10)
  602. #define RT5660_JD_LOUT_TRG_HI (0x1 << 10)
  603. #define RT5660_JD_SPO_MASK (0x1 << 9)
  604. #define RT5660_JD_SPO_SFT 9
  605. #define RT5660_JD_SPO_DIS (0x0 << 9)
  606. #define RT5660_JD_SPO_EN (0x1 << 9)
  607. #define RT5660_JD_SPO_TRG_MASK (0x1 << 8)
  608. #define RT5660_JD_SPO_TRG_SFT 8
  609. #define RT5660_JD_SPO_TRG_LO (0x0 << 8)
  610. #define RT5660_JD_SPO_TRG_HI (0x1 << 8)
  611. /* IRQ Control 1 (0xbd) */
  612. #define RT5660_IRQ_JD_MASK (0x1 << 15)
  613. #define RT5660_IRQ_JD_SFT 15
  614. #define RT5660_IRQ_JD_BP (0x0 << 15)
  615. #define RT5660_IRQ_JD_NOR (0x1 << 15)
  616. #define RT5660_IRQ_OT_MASK (0x1 << 14)
  617. #define RT5660_IRQ_OT_SFT 14
  618. #define RT5660_IRQ_OT_BP (0x0 << 14)
  619. #define RT5660_IRQ_OT_NOR (0x1 << 14)
  620. #define RT5660_JD_STKY_MASK (0x1 << 13)
  621. #define RT5660_JD_STKY_SFT 13
  622. #define RT5660_JD_STKY_DIS (0x0 << 13)
  623. #define RT5660_JD_STKY_EN (0x1 << 13)
  624. #define RT5660_OT_STKY_MASK (0x1 << 12)
  625. #define RT5660_OT_STKY_SFT 12
  626. #define RT5660_OT_STKY_DIS (0x0 << 12)
  627. #define RT5660_OT_STKY_EN (0x1 << 12)
  628. #define RT5660_JD_P_MASK (0x1 << 11)
  629. #define RT5660_JD_P_SFT 11
  630. #define RT5660_JD_P_NOR (0x0 << 11)
  631. #define RT5660_JD_P_INV (0x1 << 11)
  632. #define RT5660_OT_P_MASK (0x1 << 10)
  633. #define RT5660_OT_P_SFT 10
  634. #define RT5660_OT_P_NOR (0x0 << 10)
  635. #define RT5660_OT_P_INV (0x1 << 10)
  636. /* IRQ Control 2 (0xbe) */
  637. #define RT5660_IRQ_MB1_OC_MASK (0x1 << 15)
  638. #define RT5660_IRQ_MB1_OC_SFT 15
  639. #define RT5660_IRQ_MB1_OC_BP (0x0 << 15)
  640. #define RT5660_IRQ_MB1_OC_NOR (0x1 << 15)
  641. #define RT5660_IRQ_MB2_OC_MASK (0x1 << 14)
  642. #define RT5660_IRQ_MB2_OC_SFT 14
  643. #define RT5660_IRQ_MB2_OC_BP (0x0 << 14)
  644. #define RT5660_IRQ_MB2_OC_NOR (0x1 << 14)
  645. #define RT5660_MB1_OC_STKY_MASK (0x1 << 11)
  646. #define RT5660_MB1_OC_STKY_SFT 11
  647. #define RT5660_MB1_OC_STKY_DIS (0x0 << 11)
  648. #define RT5660_MB1_OC_STKY_EN (0x1 << 11)
  649. #define RT5660_MB2_OC_STKY_MASK (0x1 << 10)
  650. #define RT5660_MB2_OC_STKY_SFT 10
  651. #define RT5660_MB2_OC_STKY_DIS (0x0 << 10)
  652. #define RT5660_MB2_OC_STKY_EN (0x1 << 10)
  653. #define RT5660_MB1_OC_P_MASK (0x1 << 7)
  654. #define RT5660_MB1_OC_P_SFT 7
  655. #define RT5660_MB1_OC_P_NOR (0x0 << 7)
  656. #define RT5660_MB1_OC_P_INV (0x1 << 7)
  657. #define RT5660_MB2_OC_P_MASK (0x1 << 6)
  658. #define RT5660_MB2_OC_P_SFT 6
  659. #define RT5660_MB2_OC_P_NOR (0x0 << 6)
  660. #define RT5660_MB2_OC_P_INV (0x1 << 6)
  661. #define RT5660_MB1_OC_CLR (0x1 << 3)
  662. #define RT5660_MB1_OC_CLR_SFT 3
  663. #define RT5660_MB2_OC_CLR (0x1 << 2)
  664. #define RT5660_MB2_OC_CLR_SFT 2
  665. /* GPIO Control 1 (0xc0) */
  666. #define RT5660_GP2_PIN_MASK (0x1 << 14)
  667. #define RT5660_GP2_PIN_SFT 14
  668. #define RT5660_GP2_PIN_GPIO2 (0x0 << 14)
  669. #define RT5660_GP2_PIN_DMIC1_SDA (0x1 << 14)
  670. #define RT5660_GP1_PIN_MASK (0x3 << 12)
  671. #define RT5660_GP1_PIN_SFT 12
  672. #define RT5660_GP1_PIN_GPIO1 (0x0 << 12)
  673. #define RT5660_GP1_PIN_DMIC1_SCL (0x1 << 12)
  674. #define RT5660_GP1_PIN_IRQ (0x2 << 12)
  675. #define RT5660_GPIO_M_MASK (0x1 << 9)
  676. #define RT5660_GPIO_M_SFT 9
  677. #define RT5660_GPIO_M_FLT (0x0 << 9)
  678. #define RT5660_GPIO_M_PH (0x1 << 9)
  679. /* GPIO Control 3 (0xc2) */
  680. #define RT5660_GP2_PF_MASK (0x1 << 5)
  681. #define RT5660_GP2_PF_SFT 5
  682. #define RT5660_GP2_PF_IN (0x0 << 5)
  683. #define RT5660_GP2_PF_OUT (0x1 << 5)
  684. #define RT5660_GP2_OUT_MASK (0x1 << 4)
  685. #define RT5660_GP2_OUT_SFT 4
  686. #define RT5660_GP2_OUT_LO (0x0 << 4)
  687. #define RT5660_GP2_OUT_HI (0x1 << 4)
  688. #define RT5660_GP2_P_MASK (0x1 << 3)
  689. #define RT5660_GP2_P_SFT 3
  690. #define RT5660_GP2_P_NOR (0x0 << 3)
  691. #define RT5660_GP2_P_INV (0x1 << 3)
  692. #define RT5660_GP1_PF_MASK (0x1 << 2)
  693. #define RT5660_GP1_PF_SFT 2
  694. #define RT5660_GP1_PF_IN (0x0 << 2)
  695. #define RT5660_GP1_PF_OUT (0x1 << 2)
  696. #define RT5660_GP1_OUT_MASK (0x1 << 1)
  697. #define RT5660_GP1_OUT_SFT 1
  698. #define RT5660_GP1_OUT_LO (0x0 << 1)
  699. #define RT5660_GP1_OUT_HI (0x1 << 1)
  700. #define RT5660_GP1_P_MASK (0x1)
  701. #define RT5660_GP1_P_SFT 0
  702. #define RT5660_GP1_P_NOR (0x0)
  703. #define RT5660_GP1_P_INV (0x1)
  704. /* Soft volume and zero cross control 1 (0xd9) */
  705. #define RT5660_SV_MASK (0x1 << 15)
  706. #define RT5660_SV_SFT 15
  707. #define RT5660_SV_DIS (0x0 << 15)
  708. #define RT5660_SV_EN (0x1 << 15)
  709. #define RT5660_SPO_SV_MASK (0x1 << 14)
  710. #define RT5660_SPO_SV_SFT 14
  711. #define RT5660_SPO_SV_DIS (0x0 << 14)
  712. #define RT5660_SPO_SV_EN (0x1 << 14)
  713. #define RT5660_OUT_SV_MASK (0x1 << 12)
  714. #define RT5660_OUT_SV_SFT 12
  715. #define RT5660_OUT_SV_DIS (0x0 << 12)
  716. #define RT5660_OUT_SV_EN (0x1 << 12)
  717. #define RT5660_ZCD_DIG_MASK (0x1 << 11)
  718. #define RT5660_ZCD_DIG_SFT 11
  719. #define RT5660_ZCD_DIG_DIS (0x0 << 11)
  720. #define RT5660_ZCD_DIG_EN (0x1 << 11)
  721. #define RT5660_ZCD_MASK (0x1 << 10)
  722. #define RT5660_ZCD_SFT 10
  723. #define RT5660_ZCD_PD (0x0 << 10)
  724. #define RT5660_ZCD_PU (0x1 << 10)
  725. #define RT5660_SV_DLY_MASK (0xf)
  726. #define RT5660_SV_DLY_SFT 0
  727. /* Soft volume and zero cross control 2 (0xda) */
  728. #define RT5660_ZCD_SPO_MASK (0x1 << 15)
  729. #define RT5660_ZCD_SPO_SFT 15
  730. #define RT5660_ZCD_SPO_DIS (0x0 << 15)
  731. #define RT5660_ZCD_SPO_EN (0x1 << 15)
  732. #define RT5660_ZCD_OMR_MASK (0x1 << 8)
  733. #define RT5660_ZCD_OMR_SFT 8
  734. #define RT5660_ZCD_OMR_DIS (0x0 << 8)
  735. #define RT5660_ZCD_OMR_EN (0x1 << 8)
  736. #define RT5660_ZCD_OML_MASK (0x1 << 7)
  737. #define RT5660_ZCD_OML_SFT 7
  738. #define RT5660_ZCD_OML_DIS (0x0 << 7)
  739. #define RT5660_ZCD_OML_EN (0x1 << 7)
  740. #define RT5660_ZCD_SPM_MASK (0x1 << 6)
  741. #define RT5660_ZCD_SPM_SFT 6
  742. #define RT5660_ZCD_SPM_DIS (0x0 << 6)
  743. #define RT5660_ZCD_SPM_EN (0x1 << 6)
  744. #define RT5660_ZCD_RMR_MASK (0x1 << 5)
  745. #define RT5660_ZCD_RMR_SFT 5
  746. #define RT5660_ZCD_RMR_DIS (0x0 << 5)
  747. #define RT5660_ZCD_RMR_EN (0x1 << 5)
  748. #define RT5660_ZCD_RML_MASK (0x1 << 4)
  749. #define RT5660_ZCD_RML_SFT 4
  750. #define RT5660_ZCD_RML_DIS (0x0 << 4)
  751. #define RT5660_ZCD_RML_EN (0x1 << 4)
  752. /* General Control 1 (0xfa) */
  753. #define RT5660_PWR_VREF_HP (0x1 << 11)
  754. #define RT5660_PWR_VREF_HP_SFT 11
  755. #define RT5660_AUTO_DIS_AMP (0x1 << 6)
  756. #define RT5660_MCLK_DET (0x1 << 5)
  757. #define RT5660_POW_CLKDET (0x1 << 1)
  758. #define RT5660_DIG_GATE_CTRL (0x1)
  759. #define RT5660_DIG_GATE_CTRL_SFT 0
  760. /* System Clock Source */
  761. #define RT5660_SCLK_S_MCLK 0
  762. #define RT5660_SCLK_S_PLL1 1
  763. #define RT5660_SCLK_S_RCCLK 2
  764. /* PLL1 Source */
  765. #define RT5660_PLL1_S_MCLK 0
  766. #define RT5660_PLL1_S_BCLK 1
  767. enum {
  768. RT5660_AIF1,
  769. RT5660_AIFS,
  770. };
  771. struct rt5660_priv {
  772. struct snd_soc_component *component;
  773. struct rt5660_platform_data pdata;
  774. struct regmap *regmap;
  775. struct clk *mclk;
  776. int sysclk;
  777. int sysclk_src;
  778. int lrck[RT5660_AIFS];
  779. int bclk[RT5660_AIFS];
  780. int master[RT5660_AIFS];
  781. int pll_src;
  782. int pll_in;
  783. int pll_out;
  784. };
  785. #endif