da7213.c 65 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * DA7213 ALSA SoC Codec Driver
  4. *
  5. * Copyright (c) 2013 Dialog Semiconductor
  6. *
  7. * Author: Adam Thomson <[email protected]>
  8. * Based on DA9055 ALSA SoC codec driver.
  9. */
  10. #include <linux/acpi.h>
  11. #include <linux/of_device.h>
  12. #include <linux/property.h>
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/i2c.h>
  16. #include <linux/regmap.h>
  17. #include <linux/slab.h>
  18. #include <linux/module.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <linux/pm_runtime.h>
  22. #include <sound/soc.h>
  23. #include <sound/initval.h>
  24. #include <sound/tlv.h>
  25. #include <sound/da7213.h>
  26. #include "da7213.h"
  27. /* Gain and Volume */
  28. static const DECLARE_TLV_DB_RANGE(aux_vol_tlv,
  29. /* -54dB */
  30. 0x0, 0x11, TLV_DB_SCALE_ITEM(-5400, 0, 0),
  31. /* -52.5dB to 15dB */
  32. 0x12, 0x3f, TLV_DB_SCALE_ITEM(-5250, 150, 0)
  33. );
  34. static const DECLARE_TLV_DB_RANGE(digital_gain_tlv,
  35. 0x0, 0x07, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
  36. /* -78dB to 12dB */
  37. 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
  38. );
  39. static const DECLARE_TLV_DB_RANGE(alc_analog_gain_tlv,
  40. 0x0, 0x0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
  41. /* 0dB to 36dB */
  42. 0x01, 0x07, TLV_DB_SCALE_ITEM(0, 600, 0)
  43. );
  44. static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
  45. static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
  46. static const DECLARE_TLV_DB_SCALE(eq_gain_tlv, -1050, 150, 0);
  47. static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -5700, 100, 0);
  48. static const DECLARE_TLV_DB_SCALE(lineout_vol_tlv, -4800, 100, 0);
  49. static const DECLARE_TLV_DB_SCALE(alc_threshold_tlv, -9450, 150, 0);
  50. static const DECLARE_TLV_DB_SCALE(alc_gain_tlv, 0, 600, 0);
  51. /* ADC and DAC voice mode (8kHz) high pass cutoff value */
  52. static const char * const da7213_voice_hpf_corner_txt[] = {
  53. "2.5Hz", "25Hz", "50Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
  54. };
  55. static SOC_ENUM_SINGLE_DECL(da7213_dac_voice_hpf_corner,
  56. DA7213_DAC_FILTERS1,
  57. DA7213_VOICE_HPF_CORNER_SHIFT,
  58. da7213_voice_hpf_corner_txt);
  59. static SOC_ENUM_SINGLE_DECL(da7213_adc_voice_hpf_corner,
  60. DA7213_ADC_FILTERS1,
  61. DA7213_VOICE_HPF_CORNER_SHIFT,
  62. da7213_voice_hpf_corner_txt);
  63. /* ADC and DAC high pass filter cutoff value */
  64. static const char * const da7213_audio_hpf_corner_txt[] = {
  65. "Fs/24000", "Fs/12000", "Fs/6000", "Fs/3000"
  66. };
  67. static SOC_ENUM_SINGLE_DECL(da7213_dac_audio_hpf_corner,
  68. DA7213_DAC_FILTERS1
  69. , DA7213_AUDIO_HPF_CORNER_SHIFT,
  70. da7213_audio_hpf_corner_txt);
  71. static SOC_ENUM_SINGLE_DECL(da7213_adc_audio_hpf_corner,
  72. DA7213_ADC_FILTERS1,
  73. DA7213_AUDIO_HPF_CORNER_SHIFT,
  74. da7213_audio_hpf_corner_txt);
  75. /* Gain ramping rate value */
  76. static const char * const da7213_gain_ramp_rate_txt[] = {
  77. "nominal rate * 8", "nominal rate * 16", "nominal rate / 16",
  78. "nominal rate / 32"
  79. };
  80. static SOC_ENUM_SINGLE_DECL(da7213_gain_ramp_rate,
  81. DA7213_GAIN_RAMP_CTRL,
  82. DA7213_GAIN_RAMP_RATE_SHIFT,
  83. da7213_gain_ramp_rate_txt);
  84. /* DAC noise gate setup time value */
  85. static const char * const da7213_dac_ng_setup_time_txt[] = {
  86. "256 samples", "512 samples", "1024 samples", "2048 samples"
  87. };
  88. static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_setup_time,
  89. DA7213_DAC_NG_SETUP_TIME,
  90. DA7213_DAC_NG_SETUP_TIME_SHIFT,
  91. da7213_dac_ng_setup_time_txt);
  92. /* DAC noise gate rampup rate value */
  93. static const char * const da7213_dac_ng_rampup_txt[] = {
  94. "0.02 ms/dB", "0.16 ms/dB"
  95. };
  96. static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampup_rate,
  97. DA7213_DAC_NG_SETUP_TIME,
  98. DA7213_DAC_NG_RAMPUP_RATE_SHIFT,
  99. da7213_dac_ng_rampup_txt);
  100. /* DAC noise gate rampdown rate value */
  101. static const char * const da7213_dac_ng_rampdown_txt[] = {
  102. "0.64 ms/dB", "20.48 ms/dB"
  103. };
  104. static SOC_ENUM_SINGLE_DECL(da7213_dac_ng_rampdown_rate,
  105. DA7213_DAC_NG_SETUP_TIME,
  106. DA7213_DAC_NG_RAMPDN_RATE_SHIFT,
  107. da7213_dac_ng_rampdown_txt);
  108. /* DAC soft mute rate value */
  109. static const char * const da7213_dac_soft_mute_rate_txt[] = {
  110. "1", "2", "4", "8", "16", "32", "64"
  111. };
  112. static SOC_ENUM_SINGLE_DECL(da7213_dac_soft_mute_rate,
  113. DA7213_DAC_FILTERS5,
  114. DA7213_DAC_SOFTMUTE_RATE_SHIFT,
  115. da7213_dac_soft_mute_rate_txt);
  116. /* ALC Attack Rate select */
  117. static const char * const da7213_alc_attack_rate_txt[] = {
  118. "44/fs", "88/fs", "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs",
  119. "5632/fs", "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
  120. };
  121. static SOC_ENUM_SINGLE_DECL(da7213_alc_attack_rate,
  122. DA7213_ALC_CTRL2,
  123. DA7213_ALC_ATTACK_SHIFT,
  124. da7213_alc_attack_rate_txt);
  125. /* ALC Release Rate select */
  126. static const char * const da7213_alc_release_rate_txt[] = {
  127. "176/fs", "352/fs", "704/fs", "1408/fs", "2816/fs", "5632/fs",
  128. "11264/fs", "22528/fs", "45056/fs", "90112/fs", "180224/fs"
  129. };
  130. static SOC_ENUM_SINGLE_DECL(da7213_alc_release_rate,
  131. DA7213_ALC_CTRL2,
  132. DA7213_ALC_RELEASE_SHIFT,
  133. da7213_alc_release_rate_txt);
  134. /* ALC Hold Time select */
  135. static const char * const da7213_alc_hold_time_txt[] = {
  136. "62/fs", "124/fs", "248/fs", "496/fs", "992/fs", "1984/fs", "3968/fs",
  137. "7936/fs", "15872/fs", "31744/fs", "63488/fs", "126976/fs",
  138. "253952/fs", "507904/fs", "1015808/fs", "2031616/fs"
  139. };
  140. static SOC_ENUM_SINGLE_DECL(da7213_alc_hold_time,
  141. DA7213_ALC_CTRL3,
  142. DA7213_ALC_HOLD_SHIFT,
  143. da7213_alc_hold_time_txt);
  144. /* ALC Input Signal Tracking rate select */
  145. static const char * const da7213_alc_integ_rate_txt[] = {
  146. "1/4", "1/16", "1/256", "1/65536"
  147. };
  148. static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_attack_rate,
  149. DA7213_ALC_CTRL3,
  150. DA7213_ALC_INTEG_ATTACK_SHIFT,
  151. da7213_alc_integ_rate_txt);
  152. static SOC_ENUM_SINGLE_DECL(da7213_alc_integ_release_rate,
  153. DA7213_ALC_CTRL3,
  154. DA7213_ALC_INTEG_RELEASE_SHIFT,
  155. da7213_alc_integ_rate_txt);
  156. /*
  157. * Control Functions
  158. */
  159. static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val)
  160. {
  161. int mid_data, top_data;
  162. int sum = 0;
  163. u8 iteration;
  164. for (iteration = 0; iteration < DA7213_ALC_AVG_ITERATIONS;
  165. iteration++) {
  166. /* Select the left or right channel and capture data */
  167. snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val);
  168. /* Select middle 8 bits for read back from data register */
  169. snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
  170. reg_val | DA7213_ALC_DATA_MIDDLE);
  171. mid_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
  172. /* Select top 8 bits for read back from data register */
  173. snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
  174. reg_val | DA7213_ALC_DATA_TOP);
  175. top_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);
  176. sum += ((mid_data << 8) | (top_data << 16));
  177. }
  178. return sum / DA7213_ALC_AVG_ITERATIONS;
  179. }
  180. static void da7213_alc_calib_man(struct snd_soc_component *component)
  181. {
  182. u8 reg_val;
  183. int avg_left_data, avg_right_data, offset_l, offset_r;
  184. /* Calculate average for Left and Right data */
  185. /* Left Data */
  186. avg_left_data = da7213_get_alc_data(component,
  187. DA7213_ALC_CIC_OP_CHANNEL_LEFT);
  188. /* Right Data */
  189. avg_right_data = da7213_get_alc_data(component,
  190. DA7213_ALC_CIC_OP_CHANNEL_RIGHT);
  191. /* Calculate DC offset */
  192. offset_l = -avg_left_data;
  193. offset_r = -avg_right_data;
  194. reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8;
  195. snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_L, reg_val);
  196. reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16;
  197. snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_L, reg_val);
  198. reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8;
  199. snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_M_R, reg_val);
  200. reg_val = (offset_r & DA7213_ALC_OFFSET_19_16) >> 16;
  201. snd_soc_component_write(component, DA7213_ALC_OFFSET_MAN_U_R, reg_val);
  202. /* Enable analog/digital gain mode & offset cancellation */
  203. snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
  204. DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
  205. DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
  206. }
  207. static void da7213_alc_calib_auto(struct snd_soc_component *component)
  208. {
  209. u8 alc_ctrl1;
  210. /* Begin auto calibration and wait for completion */
  211. snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
  212. DA7213_ALC_AUTO_CALIB_EN);
  213. do {
  214. alc_ctrl1 = snd_soc_component_read(component, DA7213_ALC_CTRL1);
  215. } while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);
  216. /* If auto calibration fails, fall back to digital gain only mode */
  217. if (alc_ctrl1 & DA7213_ALC_CALIB_OVERFLOW) {
  218. dev_warn(component->dev,
  219. "ALC auto calibration failed with overflow\n");
  220. snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
  221. DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
  222. 0);
  223. } else {
  224. /* Enable analog/digital gain mode & offset cancellation */
  225. snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
  226. DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE,
  227. DA7213_ALC_OFFSET_EN | DA7213_ALC_SYNC_MODE);
  228. }
  229. }
  230. static void da7213_alc_calib(struct snd_soc_component *component)
  231. {
  232. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  233. u8 adc_l_ctrl, adc_r_ctrl;
  234. u8 mixin_l_sel, mixin_r_sel;
  235. u8 mic_1_ctrl, mic_2_ctrl;
  236. /* Save current values from ADC control registers */
  237. adc_l_ctrl = snd_soc_component_read(component, DA7213_ADC_L_CTRL);
  238. adc_r_ctrl = snd_soc_component_read(component, DA7213_ADC_R_CTRL);
  239. /* Save current values from MIXIN_L/R_SELECT registers */
  240. mixin_l_sel = snd_soc_component_read(component, DA7213_MIXIN_L_SELECT);
  241. mixin_r_sel = snd_soc_component_read(component, DA7213_MIXIN_R_SELECT);
  242. /* Save current values from MIC control registers */
  243. mic_1_ctrl = snd_soc_component_read(component, DA7213_MIC_1_CTRL);
  244. mic_2_ctrl = snd_soc_component_read(component, DA7213_MIC_2_CTRL);
  245. /* Enable ADC Left and Right */
  246. snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
  247. DA7213_ADC_EN);
  248. snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL, DA7213_ADC_EN,
  249. DA7213_ADC_EN);
  250. /* Enable MIC paths */
  251. snd_soc_component_update_bits(component, DA7213_MIXIN_L_SELECT,
  252. DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
  253. DA7213_MIXIN_L_MIX_SELECT_MIC_2,
  254. DA7213_MIXIN_L_MIX_SELECT_MIC_1 |
  255. DA7213_MIXIN_L_MIX_SELECT_MIC_2);
  256. snd_soc_component_update_bits(component, DA7213_MIXIN_R_SELECT,
  257. DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
  258. DA7213_MIXIN_R_MIX_SELECT_MIC_1,
  259. DA7213_MIXIN_R_MIX_SELECT_MIC_2 |
  260. DA7213_MIXIN_R_MIX_SELECT_MIC_1);
  261. /* Mute MIC PGAs */
  262. snd_soc_component_update_bits(component, DA7213_MIC_1_CTRL, DA7213_MUTE_EN,
  263. DA7213_MUTE_EN);
  264. snd_soc_component_update_bits(component, DA7213_MIC_2_CTRL, DA7213_MUTE_EN,
  265. DA7213_MUTE_EN);
  266. /* Perform calibration */
  267. if (da7213->alc_calib_auto)
  268. da7213_alc_calib_auto(component);
  269. else
  270. da7213_alc_calib_man(component);
  271. /* Restore MIXIN_L/R_SELECT registers to their original states */
  272. snd_soc_component_write(component, DA7213_MIXIN_L_SELECT, mixin_l_sel);
  273. snd_soc_component_write(component, DA7213_MIXIN_R_SELECT, mixin_r_sel);
  274. /* Restore ADC control registers to their original states */
  275. snd_soc_component_write(component, DA7213_ADC_L_CTRL, adc_l_ctrl);
  276. snd_soc_component_write(component, DA7213_ADC_R_CTRL, adc_r_ctrl);
  277. /* Restore original values of MIC control registers */
  278. snd_soc_component_write(component, DA7213_MIC_1_CTRL, mic_1_ctrl);
  279. snd_soc_component_write(component, DA7213_MIC_2_CTRL, mic_2_ctrl);
  280. }
  281. static int da7213_put_mixin_gain(struct snd_kcontrol *kcontrol,
  282. struct snd_ctl_elem_value *ucontrol)
  283. {
  284. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  285. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  286. int ret;
  287. ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
  288. /* If ALC in operation, make sure calibrated offsets are updated */
  289. if ((!ret) && (da7213->alc_en))
  290. da7213_alc_calib(component);
  291. return ret;
  292. }
  293. static int da7213_put_alc_sw(struct snd_kcontrol *kcontrol,
  294. struct snd_ctl_elem_value *ucontrol)
  295. {
  296. struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
  297. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  298. /* Force ALC offset calibration if enabling ALC */
  299. if (ucontrol->value.integer.value[0] ||
  300. ucontrol->value.integer.value[1]) {
  301. if (!da7213->alc_en) {
  302. da7213_alc_calib(component);
  303. da7213->alc_en = true;
  304. }
  305. } else {
  306. da7213->alc_en = false;
  307. }
  308. return snd_soc_put_volsw(kcontrol, ucontrol);
  309. }
  310. /*
  311. * KControls
  312. */
  313. static const struct snd_kcontrol_new da7213_snd_controls[] = {
  314. /* Volume controls */
  315. SOC_SINGLE_TLV("Mic 1 Volume", DA7213_MIC_1_GAIN,
  316. DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
  317. DA7213_NO_INVERT, mic_vol_tlv),
  318. SOC_SINGLE_TLV("Mic 2 Volume", DA7213_MIC_2_GAIN,
  319. DA7213_MIC_AMP_GAIN_SHIFT, DA7213_MIC_AMP_GAIN_MAX,
  320. DA7213_NO_INVERT, mic_vol_tlv),
  321. SOC_DOUBLE_R_TLV("Aux Volume", DA7213_AUX_L_GAIN, DA7213_AUX_R_GAIN,
  322. DA7213_AUX_AMP_GAIN_SHIFT, DA7213_AUX_AMP_GAIN_MAX,
  323. DA7213_NO_INVERT, aux_vol_tlv),
  324. SOC_DOUBLE_R_EXT_TLV("Mixin PGA Volume", DA7213_MIXIN_L_GAIN,
  325. DA7213_MIXIN_R_GAIN, DA7213_MIXIN_AMP_GAIN_SHIFT,
  326. DA7213_MIXIN_AMP_GAIN_MAX, DA7213_NO_INVERT,
  327. snd_soc_get_volsw_2r, da7213_put_mixin_gain,
  328. mixin_gain_tlv),
  329. SOC_DOUBLE_R_TLV("ADC Volume", DA7213_ADC_L_GAIN, DA7213_ADC_R_GAIN,
  330. DA7213_ADC_AMP_GAIN_SHIFT, DA7213_ADC_AMP_GAIN_MAX,
  331. DA7213_NO_INVERT, digital_gain_tlv),
  332. SOC_DOUBLE_R_TLV("DAC Volume", DA7213_DAC_L_GAIN, DA7213_DAC_R_GAIN,
  333. DA7213_DAC_AMP_GAIN_SHIFT, DA7213_DAC_AMP_GAIN_MAX,
  334. DA7213_NO_INVERT, digital_gain_tlv),
  335. SOC_DOUBLE_R_TLV("Headphone Volume", DA7213_HP_L_GAIN, DA7213_HP_R_GAIN,
  336. DA7213_HP_AMP_GAIN_SHIFT, DA7213_HP_AMP_GAIN_MAX,
  337. DA7213_NO_INVERT, hp_vol_tlv),
  338. SOC_SINGLE_TLV("Lineout Volume", DA7213_LINE_GAIN,
  339. DA7213_LINE_AMP_GAIN_SHIFT, DA7213_LINE_AMP_GAIN_MAX,
  340. DA7213_NO_INVERT, lineout_vol_tlv),
  341. /* DAC Equalizer controls */
  342. SOC_SINGLE("DAC EQ Switch", DA7213_DAC_FILTERS4, DA7213_DAC_EQ_EN_SHIFT,
  343. DA7213_DAC_EQ_EN_MAX, DA7213_NO_INVERT),
  344. SOC_SINGLE_TLV("DAC EQ1 Volume", DA7213_DAC_FILTERS2,
  345. DA7213_DAC_EQ_BAND1_SHIFT, DA7213_DAC_EQ_BAND_MAX,
  346. DA7213_NO_INVERT, eq_gain_tlv),
  347. SOC_SINGLE_TLV("DAC EQ2 Volume", DA7213_DAC_FILTERS2,
  348. DA7213_DAC_EQ_BAND2_SHIFT, DA7213_DAC_EQ_BAND_MAX,
  349. DA7213_NO_INVERT, eq_gain_tlv),
  350. SOC_SINGLE_TLV("DAC EQ3 Volume", DA7213_DAC_FILTERS3,
  351. DA7213_DAC_EQ_BAND3_SHIFT, DA7213_DAC_EQ_BAND_MAX,
  352. DA7213_NO_INVERT, eq_gain_tlv),
  353. SOC_SINGLE_TLV("DAC EQ4 Volume", DA7213_DAC_FILTERS3,
  354. DA7213_DAC_EQ_BAND4_SHIFT, DA7213_DAC_EQ_BAND_MAX,
  355. DA7213_NO_INVERT, eq_gain_tlv),
  356. SOC_SINGLE_TLV("DAC EQ5 Volume", DA7213_DAC_FILTERS4,
  357. DA7213_DAC_EQ_BAND5_SHIFT, DA7213_DAC_EQ_BAND_MAX,
  358. DA7213_NO_INVERT, eq_gain_tlv),
  359. /* High Pass Filter and Voice Mode controls */
  360. SOC_SINGLE("ADC HPF Switch", DA7213_ADC_FILTERS1, DA7213_HPF_EN_SHIFT,
  361. DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
  362. SOC_ENUM("ADC HPF Cutoff", da7213_adc_audio_hpf_corner),
  363. SOC_SINGLE("ADC Voice Mode Switch", DA7213_ADC_FILTERS1,
  364. DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
  365. DA7213_NO_INVERT),
  366. SOC_ENUM("ADC Voice Cutoff", da7213_adc_voice_hpf_corner),
  367. SOC_SINGLE("DAC HPF Switch", DA7213_DAC_FILTERS1, DA7213_HPF_EN_SHIFT,
  368. DA7213_HPF_EN_MAX, DA7213_NO_INVERT),
  369. SOC_ENUM("DAC HPF Cutoff", da7213_dac_audio_hpf_corner),
  370. SOC_SINGLE("DAC Voice Mode Switch", DA7213_DAC_FILTERS1,
  371. DA7213_VOICE_EN_SHIFT, DA7213_VOICE_EN_MAX,
  372. DA7213_NO_INVERT),
  373. SOC_ENUM("DAC Voice Cutoff", da7213_dac_voice_hpf_corner),
  374. /* Mute controls */
  375. SOC_SINGLE("Mic 1 Switch", DA7213_MIC_1_CTRL, DA7213_MUTE_EN_SHIFT,
  376. DA7213_MUTE_EN_MAX, DA7213_INVERT),
  377. SOC_SINGLE("Mic 2 Switch", DA7213_MIC_2_CTRL, DA7213_MUTE_EN_SHIFT,
  378. DA7213_MUTE_EN_MAX, DA7213_INVERT),
  379. SOC_DOUBLE_R("Aux Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
  380. DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
  381. SOC_DOUBLE_R("Mixin PGA Switch", DA7213_MIXIN_L_CTRL,
  382. DA7213_MIXIN_R_CTRL, DA7213_MUTE_EN_SHIFT,
  383. DA7213_MUTE_EN_MAX, DA7213_INVERT),
  384. SOC_DOUBLE_R("ADC Switch", DA7213_ADC_L_CTRL, DA7213_ADC_R_CTRL,
  385. DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
  386. SOC_DOUBLE_R("Headphone Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
  387. DA7213_MUTE_EN_SHIFT, DA7213_MUTE_EN_MAX, DA7213_INVERT),
  388. SOC_SINGLE("Lineout Switch", DA7213_LINE_CTRL, DA7213_MUTE_EN_SHIFT,
  389. DA7213_MUTE_EN_MAX, DA7213_INVERT),
  390. SOC_SINGLE("DAC Soft Mute Switch", DA7213_DAC_FILTERS5,
  391. DA7213_DAC_SOFTMUTE_EN_SHIFT, DA7213_DAC_SOFTMUTE_EN_MAX,
  392. DA7213_NO_INVERT),
  393. SOC_ENUM("DAC Soft Mute Rate", da7213_dac_soft_mute_rate),
  394. /* Zero Cross controls */
  395. SOC_DOUBLE_R("Aux ZC Switch", DA7213_AUX_L_CTRL, DA7213_AUX_R_CTRL,
  396. DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
  397. SOC_DOUBLE_R("Mixin PGA ZC Switch", DA7213_MIXIN_L_CTRL,
  398. DA7213_MIXIN_R_CTRL, DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX,
  399. DA7213_NO_INVERT),
  400. SOC_DOUBLE_R("Headphone ZC Switch", DA7213_HP_L_CTRL, DA7213_HP_R_CTRL,
  401. DA7213_ZC_EN_SHIFT, DA7213_ZC_EN_MAX, DA7213_NO_INVERT),
  402. /* Gain Ramping controls */
  403. SOC_DOUBLE_R("Aux Gain Ramping Switch", DA7213_AUX_L_CTRL,
  404. DA7213_AUX_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
  405. DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
  406. SOC_DOUBLE_R("Mixin Gain Ramping Switch", DA7213_MIXIN_L_CTRL,
  407. DA7213_MIXIN_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
  408. DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
  409. SOC_DOUBLE_R("ADC Gain Ramping Switch", DA7213_ADC_L_CTRL,
  410. DA7213_ADC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
  411. DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
  412. SOC_DOUBLE_R("DAC Gain Ramping Switch", DA7213_DAC_L_CTRL,
  413. DA7213_DAC_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
  414. DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
  415. SOC_DOUBLE_R("Headphone Gain Ramping Switch", DA7213_HP_L_CTRL,
  416. DA7213_HP_R_CTRL, DA7213_GAIN_RAMP_EN_SHIFT,
  417. DA7213_GAIN_RAMP_EN_MAX, DA7213_NO_INVERT),
  418. SOC_SINGLE("Lineout Gain Ramping Switch", DA7213_LINE_CTRL,
  419. DA7213_GAIN_RAMP_EN_SHIFT, DA7213_GAIN_RAMP_EN_MAX,
  420. DA7213_NO_INVERT),
  421. SOC_ENUM("Gain Ramping Rate", da7213_gain_ramp_rate),
  422. /* DAC Noise Gate controls */
  423. SOC_SINGLE("DAC NG Switch", DA7213_DAC_NG_CTRL, DA7213_DAC_NG_EN_SHIFT,
  424. DA7213_DAC_NG_EN_MAX, DA7213_NO_INVERT),
  425. SOC_ENUM("DAC NG Setup Time", da7213_dac_ng_setup_time),
  426. SOC_ENUM("DAC NG Rampup Rate", da7213_dac_ng_rampup_rate),
  427. SOC_ENUM("DAC NG Rampdown Rate", da7213_dac_ng_rampdown_rate),
  428. SOC_SINGLE("DAC NG OFF Threshold", DA7213_DAC_NG_OFF_THRESHOLD,
  429. DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
  430. DA7213_NO_INVERT),
  431. SOC_SINGLE("DAC NG ON Threshold", DA7213_DAC_NG_ON_THRESHOLD,
  432. DA7213_DAC_NG_THRESHOLD_SHIFT, DA7213_DAC_NG_THRESHOLD_MAX,
  433. DA7213_NO_INVERT),
  434. /* DAC Routing & Inversion */
  435. SOC_DOUBLE("DAC Mono Switch", DA7213_DIG_ROUTING_DAC,
  436. DA7213_DAC_L_MONO_SHIFT, DA7213_DAC_R_MONO_SHIFT,
  437. DA7213_DAC_MONO_MAX, DA7213_NO_INVERT),
  438. SOC_DOUBLE("DAC Invert Switch", DA7213_DIG_CTRL, DA7213_DAC_L_INV_SHIFT,
  439. DA7213_DAC_R_INV_SHIFT, DA7213_DAC_INV_MAX,
  440. DA7213_NO_INVERT),
  441. /* DMIC controls */
  442. SOC_DOUBLE_R("DMIC Switch", DA7213_MIXIN_L_SELECT,
  443. DA7213_MIXIN_R_SELECT, DA7213_DMIC_EN_SHIFT,
  444. DA7213_DMIC_EN_MAX, DA7213_NO_INVERT),
  445. /* ALC Controls */
  446. SOC_DOUBLE_EXT("ALC Switch", DA7213_ALC_CTRL1, DA7213_ALC_L_EN_SHIFT,
  447. DA7213_ALC_R_EN_SHIFT, DA7213_ALC_EN_MAX,
  448. DA7213_NO_INVERT, snd_soc_get_volsw, da7213_put_alc_sw),
  449. SOC_ENUM("ALC Attack Rate", da7213_alc_attack_rate),
  450. SOC_ENUM("ALC Release Rate", da7213_alc_release_rate),
  451. SOC_ENUM("ALC Hold Time", da7213_alc_hold_time),
  452. /*
  453. * Rate at which input signal envelope is tracked as the signal gets
  454. * larger
  455. */
  456. SOC_ENUM("ALC Integ Attack Rate", da7213_alc_integ_attack_rate),
  457. /*
  458. * Rate at which input signal envelope is tracked as the signal gets
  459. * smaller
  460. */
  461. SOC_ENUM("ALC Integ Release Rate", da7213_alc_integ_release_rate),
  462. SOC_SINGLE_TLV("ALC Noise Threshold Volume", DA7213_ALC_NOISE,
  463. DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
  464. DA7213_INVERT, alc_threshold_tlv),
  465. SOC_SINGLE_TLV("ALC Min Threshold Volume", DA7213_ALC_TARGET_MIN,
  466. DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
  467. DA7213_INVERT, alc_threshold_tlv),
  468. SOC_SINGLE_TLV("ALC Max Threshold Volume", DA7213_ALC_TARGET_MAX,
  469. DA7213_ALC_THRESHOLD_SHIFT, DA7213_ALC_THRESHOLD_MAX,
  470. DA7213_INVERT, alc_threshold_tlv),
  471. SOC_SINGLE_TLV("ALC Max Attenuation Volume", DA7213_ALC_GAIN_LIMITS,
  472. DA7213_ALC_ATTEN_MAX_SHIFT,
  473. DA7213_ALC_ATTEN_GAIN_MAX_MAX, DA7213_NO_INVERT,
  474. alc_gain_tlv),
  475. SOC_SINGLE_TLV("ALC Max Gain Volume", DA7213_ALC_GAIN_LIMITS,
  476. DA7213_ALC_GAIN_MAX_SHIFT, DA7213_ALC_ATTEN_GAIN_MAX_MAX,
  477. DA7213_NO_INVERT, alc_gain_tlv),
  478. SOC_SINGLE_TLV("ALC Min Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
  479. DA7213_ALC_ANA_GAIN_MIN_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
  480. DA7213_NO_INVERT, alc_analog_gain_tlv),
  481. SOC_SINGLE_TLV("ALC Max Analog Gain Volume", DA7213_ALC_ANA_GAIN_LIMITS,
  482. DA7213_ALC_ANA_GAIN_MAX_SHIFT, DA7213_ALC_ANA_GAIN_MAX,
  483. DA7213_NO_INVERT, alc_analog_gain_tlv),
  484. SOC_SINGLE("ALC Anticlip Mode Switch", DA7213_ALC_ANTICLIP_CTRL,
  485. DA7213_ALC_ANTICLIP_EN_SHIFT, DA7213_ALC_ANTICLIP_EN_MAX,
  486. DA7213_NO_INVERT),
  487. SOC_SINGLE("ALC Anticlip Level", DA7213_ALC_ANTICLIP_LEVEL,
  488. DA7213_ALC_ANTICLIP_LEVEL_SHIFT,
  489. DA7213_ALC_ANTICLIP_LEVEL_MAX, DA7213_NO_INVERT),
  490. };
  491. /*
  492. * DAPM
  493. */
  494. /*
  495. * Enums
  496. */
  497. /* MIC PGA source select */
  498. static const char * const da7213_mic_amp_in_sel_txt[] = {
  499. "Differential", "MIC_P", "MIC_N"
  500. };
  501. static SOC_ENUM_SINGLE_DECL(da7213_mic_1_amp_in_sel,
  502. DA7213_MIC_1_CTRL,
  503. DA7213_MIC_AMP_IN_SEL_SHIFT,
  504. da7213_mic_amp_in_sel_txt);
  505. static const struct snd_kcontrol_new da7213_mic_1_amp_in_sel_mux =
  506. SOC_DAPM_ENUM("Mic 1 Amp Source MUX", da7213_mic_1_amp_in_sel);
  507. static SOC_ENUM_SINGLE_DECL(da7213_mic_2_amp_in_sel,
  508. DA7213_MIC_2_CTRL,
  509. DA7213_MIC_AMP_IN_SEL_SHIFT,
  510. da7213_mic_amp_in_sel_txt);
  511. static const struct snd_kcontrol_new da7213_mic_2_amp_in_sel_mux =
  512. SOC_DAPM_ENUM("Mic 2 Amp Source MUX", da7213_mic_2_amp_in_sel);
  513. /* DAI routing select */
  514. static const char * const da7213_dai_src_txt[] = {
  515. "ADC Left", "ADC Right", "DAI Input Left", "DAI Input Right"
  516. };
  517. static SOC_ENUM_SINGLE_DECL(da7213_dai_l_src,
  518. DA7213_DIG_ROUTING_DAI,
  519. DA7213_DAI_L_SRC_SHIFT,
  520. da7213_dai_src_txt);
  521. static const struct snd_kcontrol_new da7213_dai_l_src_mux =
  522. SOC_DAPM_ENUM("DAI Left Source MUX", da7213_dai_l_src);
  523. static SOC_ENUM_SINGLE_DECL(da7213_dai_r_src,
  524. DA7213_DIG_ROUTING_DAI,
  525. DA7213_DAI_R_SRC_SHIFT,
  526. da7213_dai_src_txt);
  527. static const struct snd_kcontrol_new da7213_dai_r_src_mux =
  528. SOC_DAPM_ENUM("DAI Right Source MUX", da7213_dai_r_src);
  529. /* DAC routing select */
  530. static const char * const da7213_dac_src_txt[] = {
  531. "ADC Output Left", "ADC Output Right", "DAI Input Left",
  532. "DAI Input Right"
  533. };
  534. static SOC_ENUM_SINGLE_DECL(da7213_dac_l_src,
  535. DA7213_DIG_ROUTING_DAC,
  536. DA7213_DAC_L_SRC_SHIFT,
  537. da7213_dac_src_txt);
  538. static const struct snd_kcontrol_new da7213_dac_l_src_mux =
  539. SOC_DAPM_ENUM("DAC Left Source MUX", da7213_dac_l_src);
  540. static SOC_ENUM_SINGLE_DECL(da7213_dac_r_src,
  541. DA7213_DIG_ROUTING_DAC,
  542. DA7213_DAC_R_SRC_SHIFT,
  543. da7213_dac_src_txt);
  544. static const struct snd_kcontrol_new da7213_dac_r_src_mux =
  545. SOC_DAPM_ENUM("DAC Right Source MUX", da7213_dac_r_src);
  546. /*
  547. * Mixer Controls
  548. */
  549. /* Mixin Left */
  550. static const struct snd_kcontrol_new da7213_dapm_mixinl_controls[] = {
  551. SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXIN_L_SELECT,
  552. DA7213_MIXIN_L_MIX_SELECT_AUX_L_SHIFT,
  553. DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  554. SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_L_SELECT,
  555. DA7213_MIXIN_L_MIX_SELECT_MIC_1_SHIFT,
  556. DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  557. SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_L_SELECT,
  558. DA7213_MIXIN_L_MIX_SELECT_MIC_2_SHIFT,
  559. DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  560. SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXIN_L_SELECT,
  561. DA7213_MIXIN_L_MIX_SELECT_MIXIN_R_SHIFT,
  562. DA7213_MIXIN_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  563. };
  564. /* Mixin Right */
  565. static const struct snd_kcontrol_new da7213_dapm_mixinr_controls[] = {
  566. SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXIN_R_SELECT,
  567. DA7213_MIXIN_R_MIX_SELECT_AUX_R_SHIFT,
  568. DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  569. SOC_DAPM_SINGLE("Mic 2 Switch", DA7213_MIXIN_R_SELECT,
  570. DA7213_MIXIN_R_MIX_SELECT_MIC_2_SHIFT,
  571. DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  572. SOC_DAPM_SINGLE("Mic 1 Switch", DA7213_MIXIN_R_SELECT,
  573. DA7213_MIXIN_R_MIX_SELECT_MIC_1_SHIFT,
  574. DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  575. SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXIN_R_SELECT,
  576. DA7213_MIXIN_R_MIX_SELECT_MIXIN_L_SHIFT,
  577. DA7213_MIXIN_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  578. };
  579. /* Mixout Left */
  580. static const struct snd_kcontrol_new da7213_dapm_mixoutl_controls[] = {
  581. SOC_DAPM_SINGLE("Aux Left Switch", DA7213_MIXOUT_L_SELECT,
  582. DA7213_MIXOUT_L_MIX_SELECT_AUX_L_SHIFT,
  583. DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  584. SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_L_SELECT,
  585. DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_SHIFT,
  586. DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  587. SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_L_SELECT,
  588. DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_SHIFT,
  589. DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  590. SOC_DAPM_SINGLE("DAC Left Switch", DA7213_MIXOUT_L_SELECT,
  591. DA7213_MIXOUT_L_MIX_SELECT_DAC_L_SHIFT,
  592. DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  593. SOC_DAPM_SINGLE("Aux Left Invert Switch", DA7213_MIXOUT_L_SELECT,
  594. DA7213_MIXOUT_L_MIX_SELECT_AUX_L_INVERTED_SHIFT,
  595. DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  596. SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_L_SELECT,
  597. DA7213_MIXOUT_L_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
  598. DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  599. SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_L_SELECT,
  600. DA7213_MIXOUT_L_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
  601. DA7213_MIXOUT_L_MIX_SELECT_MAX, DA7213_NO_INVERT),
  602. };
  603. /* Mixout Right */
  604. static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = {
  605. SOC_DAPM_SINGLE("Aux Right Switch", DA7213_MIXOUT_R_SELECT,
  606. DA7213_MIXOUT_R_MIX_SELECT_AUX_R_SHIFT,
  607. DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  608. SOC_DAPM_SINGLE("Mixin Right Switch", DA7213_MIXOUT_R_SELECT,
  609. DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_SHIFT,
  610. DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  611. SOC_DAPM_SINGLE("Mixin Left Switch", DA7213_MIXOUT_R_SELECT,
  612. DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_SHIFT,
  613. DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  614. SOC_DAPM_SINGLE("DAC Right Switch", DA7213_MIXOUT_R_SELECT,
  615. DA7213_MIXOUT_R_MIX_SELECT_DAC_R_SHIFT,
  616. DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  617. SOC_DAPM_SINGLE("Aux Right Invert Switch", DA7213_MIXOUT_R_SELECT,
  618. DA7213_MIXOUT_R_MIX_SELECT_AUX_R_INVERTED_SHIFT,
  619. DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  620. SOC_DAPM_SINGLE("Mixin Right Invert Switch", DA7213_MIXOUT_R_SELECT,
  621. DA7213_MIXOUT_R_MIX_SELECT_MIXIN_R_INVERTED_SHIFT,
  622. DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  623. SOC_DAPM_SINGLE("Mixin Left Invert Switch", DA7213_MIXOUT_R_SELECT,
  624. DA7213_MIXOUT_R_MIX_SELECT_MIXIN_L_INVERTED_SHIFT,
  625. DA7213_MIXOUT_R_MIX_SELECT_MAX, DA7213_NO_INVERT),
  626. };
  627. /*
  628. * DAPM Events
  629. */
  630. static int da7213_dai_event(struct snd_soc_dapm_widget *w,
  631. struct snd_kcontrol *kcontrol, int event)
  632. {
  633. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  634. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  635. u8 pll_ctrl, pll_status;
  636. int i = 0;
  637. bool srm_lock = false;
  638. switch (event) {
  639. case SND_SOC_DAPM_PRE_PMU:
  640. /* Enable DAI clks for master mode */
  641. if (da7213->master)
  642. snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
  643. DA7213_DAI_CLK_EN_MASK,
  644. DA7213_DAI_CLK_EN_MASK);
  645. /* PC synchronised to DAI */
  646. snd_soc_component_update_bits(component, DA7213_PC_COUNT,
  647. DA7213_PC_FREERUN_MASK, 0);
  648. /* If SRM not enabled then nothing more to do */
  649. pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
  650. if (!(pll_ctrl & DA7213_PLL_SRM_EN))
  651. return 0;
  652. /* Assist 32KHz mode PLL lock */
  653. if (pll_ctrl & DA7213_PLL_32K_MODE) {
  654. snd_soc_component_write(component, 0xF0, 0x8B);
  655. snd_soc_component_write(component, 0xF2, 0x03);
  656. snd_soc_component_write(component, 0xF0, 0x00);
  657. }
  658. /* Check SRM has locked */
  659. do {
  660. pll_status = snd_soc_component_read(component, DA7213_PLL_STATUS);
  661. if (pll_status & DA7219_PLL_SRM_LOCK) {
  662. srm_lock = true;
  663. } else {
  664. ++i;
  665. msleep(50);
  666. }
  667. } while ((i < DA7213_SRM_CHECK_RETRIES) && (!srm_lock));
  668. if (!srm_lock)
  669. dev_warn(component->dev, "SRM failed to lock\n");
  670. return 0;
  671. case SND_SOC_DAPM_POST_PMD:
  672. /* Revert 32KHz PLL lock udpates if applied previously */
  673. pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
  674. if (pll_ctrl & DA7213_PLL_32K_MODE) {
  675. snd_soc_component_write(component, 0xF0, 0x8B);
  676. snd_soc_component_write(component, 0xF2, 0x01);
  677. snd_soc_component_write(component, 0xF0, 0x00);
  678. }
  679. /* PC free-running */
  680. snd_soc_component_update_bits(component, DA7213_PC_COUNT,
  681. DA7213_PC_FREERUN_MASK,
  682. DA7213_PC_FREERUN_MASK);
  683. /* Disable DAI clks if in master mode */
  684. if (da7213->master)
  685. snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
  686. DA7213_DAI_CLK_EN_MASK, 0);
  687. return 0;
  688. default:
  689. return -EINVAL;
  690. }
  691. }
  692. /*
  693. * DAPM widgets
  694. */
  695. static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = {
  696. /*
  697. * Power Supply
  698. */
  699. SND_SOC_DAPM_REGULATOR_SUPPLY("VDDMIC", 0, 0),
  700. /*
  701. * Input & Output
  702. */
  703. /* Use a supply here as this controls both input & output DAIs */
  704. SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
  705. DA7213_NO_INVERT, da7213_dai_event,
  706. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  707. /*
  708. * Input
  709. */
  710. /* Input Lines */
  711. SND_SOC_DAPM_INPUT("MIC1"),
  712. SND_SOC_DAPM_INPUT("MIC2"),
  713. SND_SOC_DAPM_INPUT("AUXL"),
  714. SND_SOC_DAPM_INPUT("AUXR"),
  715. /* MUXs for Mic PGA source selection */
  716. SND_SOC_DAPM_MUX("Mic 1 Amp Source MUX", SND_SOC_NOPM, 0, 0,
  717. &da7213_mic_1_amp_in_sel_mux),
  718. SND_SOC_DAPM_MUX("Mic 2 Amp Source MUX", SND_SOC_NOPM, 0, 0,
  719. &da7213_mic_2_amp_in_sel_mux),
  720. /* Input PGAs */
  721. SND_SOC_DAPM_PGA("Mic 1 PGA", DA7213_MIC_1_CTRL, DA7213_AMP_EN_SHIFT,
  722. DA7213_NO_INVERT, NULL, 0),
  723. SND_SOC_DAPM_PGA("Mic 2 PGA", DA7213_MIC_2_CTRL, DA7213_AMP_EN_SHIFT,
  724. DA7213_NO_INVERT, NULL, 0),
  725. SND_SOC_DAPM_PGA("Aux Left PGA", DA7213_AUX_L_CTRL, DA7213_AMP_EN_SHIFT,
  726. DA7213_NO_INVERT, NULL, 0),
  727. SND_SOC_DAPM_PGA("Aux Right PGA", DA7213_AUX_R_CTRL,
  728. DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
  729. SND_SOC_DAPM_PGA("Mixin Left PGA", DA7213_MIXIN_L_CTRL,
  730. DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
  731. SND_SOC_DAPM_PGA("Mixin Right PGA", DA7213_MIXIN_R_CTRL,
  732. DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
  733. /* Mic Biases */
  734. SND_SOC_DAPM_SUPPLY("Mic Bias 1", DA7213_MICBIAS_CTRL,
  735. DA7213_MICBIAS1_EN_SHIFT, DA7213_NO_INVERT,
  736. NULL, 0),
  737. SND_SOC_DAPM_SUPPLY("Mic Bias 2", DA7213_MICBIAS_CTRL,
  738. DA7213_MICBIAS2_EN_SHIFT, DA7213_NO_INVERT,
  739. NULL, 0),
  740. /* Input Mixers */
  741. SND_SOC_DAPM_MIXER("Mixin Left", SND_SOC_NOPM, 0, 0,
  742. &da7213_dapm_mixinl_controls[0],
  743. ARRAY_SIZE(da7213_dapm_mixinl_controls)),
  744. SND_SOC_DAPM_MIXER("Mixin Right", SND_SOC_NOPM, 0, 0,
  745. &da7213_dapm_mixinr_controls[0],
  746. ARRAY_SIZE(da7213_dapm_mixinr_controls)),
  747. /* ADCs */
  748. SND_SOC_DAPM_ADC("ADC Left", NULL, DA7213_ADC_L_CTRL,
  749. DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
  750. SND_SOC_DAPM_ADC("ADC Right", NULL, DA7213_ADC_R_CTRL,
  751. DA7213_ADC_EN_SHIFT, DA7213_NO_INVERT),
  752. /* DAI */
  753. SND_SOC_DAPM_MUX("DAI Left Source MUX", SND_SOC_NOPM, 0, 0,
  754. &da7213_dai_l_src_mux),
  755. SND_SOC_DAPM_MUX("DAI Right Source MUX", SND_SOC_NOPM, 0, 0,
  756. &da7213_dai_r_src_mux),
  757. SND_SOC_DAPM_AIF_OUT("DAIOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
  758. SND_SOC_DAPM_AIF_OUT("DAIOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
  759. /*
  760. * Output
  761. */
  762. /* DAI */
  763. SND_SOC_DAPM_AIF_IN("DAIINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
  764. SND_SOC_DAPM_AIF_IN("DAIINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
  765. SND_SOC_DAPM_MUX("DAC Left Source MUX", SND_SOC_NOPM, 0, 0,
  766. &da7213_dac_l_src_mux),
  767. SND_SOC_DAPM_MUX("DAC Right Source MUX", SND_SOC_NOPM, 0, 0,
  768. &da7213_dac_r_src_mux),
  769. /* DACs */
  770. SND_SOC_DAPM_DAC("DAC Left", NULL, DA7213_DAC_L_CTRL,
  771. DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
  772. SND_SOC_DAPM_DAC("DAC Right", NULL, DA7213_DAC_R_CTRL,
  773. DA7213_DAC_EN_SHIFT, DA7213_NO_INVERT),
  774. /* Output Mixers */
  775. SND_SOC_DAPM_MIXER("Mixout Left", SND_SOC_NOPM, 0, 0,
  776. &da7213_dapm_mixoutl_controls[0],
  777. ARRAY_SIZE(da7213_dapm_mixoutl_controls)),
  778. SND_SOC_DAPM_MIXER("Mixout Right", SND_SOC_NOPM, 0, 0,
  779. &da7213_dapm_mixoutr_controls[0],
  780. ARRAY_SIZE(da7213_dapm_mixoutr_controls)),
  781. /* Output PGAs */
  782. SND_SOC_DAPM_PGA("Mixout Left PGA", DA7213_MIXOUT_L_CTRL,
  783. DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
  784. SND_SOC_DAPM_PGA("Mixout Right PGA", DA7213_MIXOUT_R_CTRL,
  785. DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
  786. SND_SOC_DAPM_PGA("Lineout PGA", DA7213_LINE_CTRL, DA7213_AMP_EN_SHIFT,
  787. DA7213_NO_INVERT, NULL, 0),
  788. SND_SOC_DAPM_PGA("Headphone Left PGA", DA7213_HP_L_CTRL,
  789. DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
  790. SND_SOC_DAPM_PGA("Headphone Right PGA", DA7213_HP_R_CTRL,
  791. DA7213_AMP_EN_SHIFT, DA7213_NO_INVERT, NULL, 0),
  792. /* Charge Pump */
  793. SND_SOC_DAPM_SUPPLY("Charge Pump", DA7213_CP_CTRL, DA7213_CP_EN_SHIFT,
  794. DA7213_NO_INVERT, NULL, 0),
  795. /* Output Lines */
  796. SND_SOC_DAPM_OUTPUT("HPL"),
  797. SND_SOC_DAPM_OUTPUT("HPR"),
  798. SND_SOC_DAPM_OUTPUT("LINE"),
  799. };
  800. /*
  801. * DAPM audio route definition
  802. */
  803. static const struct snd_soc_dapm_route da7213_audio_map[] = {
  804. /* Dest Connecting Widget source */
  805. /* Input path */
  806. {"Mic Bias 1", NULL, "VDDMIC"},
  807. {"Mic Bias 2", NULL, "VDDMIC"},
  808. {"MIC1", NULL, "Mic Bias 1"},
  809. {"MIC2", NULL, "Mic Bias 2"},
  810. {"Mic 1 Amp Source MUX", "Differential", "MIC1"},
  811. {"Mic 1 Amp Source MUX", "MIC_P", "MIC1"},
  812. {"Mic 1 Amp Source MUX", "MIC_N", "MIC1"},
  813. {"Mic 2 Amp Source MUX", "Differential", "MIC2"},
  814. {"Mic 2 Amp Source MUX", "MIC_P", "MIC2"},
  815. {"Mic 2 Amp Source MUX", "MIC_N", "MIC2"},
  816. {"Mic 1 PGA", NULL, "Mic 1 Amp Source MUX"},
  817. {"Mic 2 PGA", NULL, "Mic 2 Amp Source MUX"},
  818. {"Aux Left PGA", NULL, "AUXL"},
  819. {"Aux Right PGA", NULL, "AUXR"},
  820. {"Mixin Left", "Aux Left Switch", "Aux Left PGA"},
  821. {"Mixin Left", "Mic 1 Switch", "Mic 1 PGA"},
  822. {"Mixin Left", "Mic 2 Switch", "Mic 2 PGA"},
  823. {"Mixin Left", "Mixin Right Switch", "Mixin Right PGA"},
  824. {"Mixin Right", "Aux Right Switch", "Aux Right PGA"},
  825. {"Mixin Right", "Mic 2 Switch", "Mic 2 PGA"},
  826. {"Mixin Right", "Mic 1 Switch", "Mic 1 PGA"},
  827. {"Mixin Right", "Mixin Left Switch", "Mixin Left PGA"},
  828. {"Mixin Left PGA", NULL, "Mixin Left"},
  829. {"ADC Left", NULL, "Mixin Left PGA"},
  830. {"Mixin Right PGA", NULL, "Mixin Right"},
  831. {"ADC Right", NULL, "Mixin Right PGA"},
  832. {"DAI Left Source MUX", "ADC Left", "ADC Left"},
  833. {"DAI Left Source MUX", "ADC Right", "ADC Right"},
  834. {"DAI Left Source MUX", "DAI Input Left", "DAIINL"},
  835. {"DAI Left Source MUX", "DAI Input Right", "DAIINR"},
  836. {"DAI Right Source MUX", "ADC Left", "ADC Left"},
  837. {"DAI Right Source MUX", "ADC Right", "ADC Right"},
  838. {"DAI Right Source MUX", "DAI Input Left", "DAIINL"},
  839. {"DAI Right Source MUX", "DAI Input Right", "DAIINR"},
  840. {"DAIOUTL", NULL, "DAI Left Source MUX"},
  841. {"DAIOUTR", NULL, "DAI Right Source MUX"},
  842. {"DAIOUTL", NULL, "DAI"},
  843. {"DAIOUTR", NULL, "DAI"},
  844. /* Output path */
  845. {"DAIINL", NULL, "DAI"},
  846. {"DAIINR", NULL, "DAI"},
  847. {"DAC Left Source MUX", "ADC Output Left", "ADC Left"},
  848. {"DAC Left Source MUX", "ADC Output Right", "ADC Right"},
  849. {"DAC Left Source MUX", "DAI Input Left", "DAIINL"},
  850. {"DAC Left Source MUX", "DAI Input Right", "DAIINR"},
  851. {"DAC Right Source MUX", "ADC Output Left", "ADC Left"},
  852. {"DAC Right Source MUX", "ADC Output Right", "ADC Right"},
  853. {"DAC Right Source MUX", "DAI Input Left", "DAIINL"},
  854. {"DAC Right Source MUX", "DAI Input Right", "DAIINR"},
  855. {"DAC Left", NULL, "DAC Left Source MUX"},
  856. {"DAC Right", NULL, "DAC Right Source MUX"},
  857. {"Mixout Left", "Aux Left Switch", "Aux Left PGA"},
  858. {"Mixout Left", "Mixin Left Switch", "Mixin Left PGA"},
  859. {"Mixout Left", "Mixin Right Switch", "Mixin Right PGA"},
  860. {"Mixout Left", "DAC Left Switch", "DAC Left"},
  861. {"Mixout Left", "Aux Left Invert Switch", "Aux Left PGA"},
  862. {"Mixout Left", "Mixin Left Invert Switch", "Mixin Left PGA"},
  863. {"Mixout Left", "Mixin Right Invert Switch", "Mixin Right PGA"},
  864. {"Mixout Right", "Aux Right Switch", "Aux Right PGA"},
  865. {"Mixout Right", "Mixin Right Switch", "Mixin Right PGA"},
  866. {"Mixout Right", "Mixin Left Switch", "Mixin Left PGA"},
  867. {"Mixout Right", "DAC Right Switch", "DAC Right"},
  868. {"Mixout Right", "Aux Right Invert Switch", "Aux Right PGA"},
  869. {"Mixout Right", "Mixin Right Invert Switch", "Mixin Right PGA"},
  870. {"Mixout Right", "Mixin Left Invert Switch", "Mixin Left PGA"},
  871. {"Mixout Left PGA", NULL, "Mixout Left"},
  872. {"Mixout Right PGA", NULL, "Mixout Right"},
  873. {"Headphone Left PGA", NULL, "Mixout Left PGA"},
  874. {"Headphone Left PGA", NULL, "Charge Pump"},
  875. {"HPL", NULL, "Headphone Left PGA"},
  876. {"Headphone Right PGA", NULL, "Mixout Right PGA"},
  877. {"Headphone Right PGA", NULL, "Charge Pump"},
  878. {"HPR", NULL, "Headphone Right PGA"},
  879. {"Lineout PGA", NULL, "Mixout Right PGA"},
  880. {"LINE", NULL, "Lineout PGA"},
  881. };
  882. static const struct reg_default da7213_reg_defaults[] = {
  883. { DA7213_DIG_ROUTING_DAI, 0x10 },
  884. { DA7213_SR, 0x0A },
  885. { DA7213_REFERENCES, 0x80 },
  886. { DA7213_PLL_FRAC_TOP, 0x00 },
  887. { DA7213_PLL_FRAC_BOT, 0x00 },
  888. { DA7213_PLL_INTEGER, 0x20 },
  889. { DA7213_PLL_CTRL, 0x0C },
  890. { DA7213_DAI_CLK_MODE, 0x01 },
  891. { DA7213_DAI_CTRL, 0x08 },
  892. { DA7213_DIG_ROUTING_DAC, 0x32 },
  893. { DA7213_AUX_L_GAIN, 0x35 },
  894. { DA7213_AUX_R_GAIN, 0x35 },
  895. { DA7213_MIXIN_L_SELECT, 0x00 },
  896. { DA7213_MIXIN_R_SELECT, 0x00 },
  897. { DA7213_MIXIN_L_GAIN, 0x03 },
  898. { DA7213_MIXIN_R_GAIN, 0x03 },
  899. { DA7213_ADC_L_GAIN, 0x6F },
  900. { DA7213_ADC_R_GAIN, 0x6F },
  901. { DA7213_ADC_FILTERS1, 0x80 },
  902. { DA7213_MIC_1_GAIN, 0x01 },
  903. { DA7213_MIC_2_GAIN, 0x01 },
  904. { DA7213_DAC_FILTERS5, 0x00 },
  905. { DA7213_DAC_FILTERS2, 0x88 },
  906. { DA7213_DAC_FILTERS3, 0x88 },
  907. { DA7213_DAC_FILTERS4, 0x08 },
  908. { DA7213_DAC_FILTERS1, 0x80 },
  909. { DA7213_DAC_L_GAIN, 0x6F },
  910. { DA7213_DAC_R_GAIN, 0x6F },
  911. { DA7213_CP_CTRL, 0x61 },
  912. { DA7213_HP_L_GAIN, 0x39 },
  913. { DA7213_HP_R_GAIN, 0x39 },
  914. { DA7213_LINE_GAIN, 0x30 },
  915. { DA7213_MIXOUT_L_SELECT, 0x00 },
  916. { DA7213_MIXOUT_R_SELECT, 0x00 },
  917. { DA7213_SYSTEM_MODES_INPUT, 0x00 },
  918. { DA7213_SYSTEM_MODES_OUTPUT, 0x00 },
  919. { DA7213_AUX_L_CTRL, 0x44 },
  920. { DA7213_AUX_R_CTRL, 0x44 },
  921. { DA7213_MICBIAS_CTRL, 0x11 },
  922. { DA7213_MIC_1_CTRL, 0x40 },
  923. { DA7213_MIC_2_CTRL, 0x40 },
  924. { DA7213_MIXIN_L_CTRL, 0x40 },
  925. { DA7213_MIXIN_R_CTRL, 0x40 },
  926. { DA7213_ADC_L_CTRL, 0x40 },
  927. { DA7213_ADC_R_CTRL, 0x40 },
  928. { DA7213_DAC_L_CTRL, 0x48 },
  929. { DA7213_DAC_R_CTRL, 0x40 },
  930. { DA7213_HP_L_CTRL, 0x41 },
  931. { DA7213_HP_R_CTRL, 0x40 },
  932. { DA7213_LINE_CTRL, 0x40 },
  933. { DA7213_MIXOUT_L_CTRL, 0x10 },
  934. { DA7213_MIXOUT_R_CTRL, 0x10 },
  935. { DA7213_LDO_CTRL, 0x00 },
  936. { DA7213_IO_CTRL, 0x00 },
  937. { DA7213_GAIN_RAMP_CTRL, 0x00},
  938. { DA7213_MIC_CONFIG, 0x00 },
  939. { DA7213_PC_COUNT, 0x00 },
  940. { DA7213_CP_VOL_THRESHOLD1, 0x32 },
  941. { DA7213_CP_DELAY, 0x95 },
  942. { DA7213_CP_DETECTOR, 0x00 },
  943. { DA7213_DAI_OFFSET, 0x00 },
  944. { DA7213_DIG_CTRL, 0x00 },
  945. { DA7213_ALC_CTRL2, 0x00 },
  946. { DA7213_ALC_CTRL3, 0x00 },
  947. { DA7213_ALC_NOISE, 0x3F },
  948. { DA7213_ALC_TARGET_MIN, 0x3F },
  949. { DA7213_ALC_TARGET_MAX, 0x00 },
  950. { DA7213_ALC_GAIN_LIMITS, 0xFF },
  951. { DA7213_ALC_ANA_GAIN_LIMITS, 0x71 },
  952. { DA7213_ALC_ANTICLIP_CTRL, 0x00 },
  953. { DA7213_ALC_ANTICLIP_LEVEL, 0x00 },
  954. { DA7213_ALC_OFFSET_MAN_M_L, 0x00 },
  955. { DA7213_ALC_OFFSET_MAN_U_L, 0x00 },
  956. { DA7213_ALC_OFFSET_MAN_M_R, 0x00 },
  957. { DA7213_ALC_OFFSET_MAN_U_R, 0x00 },
  958. { DA7213_ALC_CIC_OP_LVL_CTRL, 0x00 },
  959. { DA7213_DAC_NG_SETUP_TIME, 0x00 },
  960. { DA7213_DAC_NG_OFF_THRESHOLD, 0x00 },
  961. { DA7213_DAC_NG_ON_THRESHOLD, 0x00 },
  962. { DA7213_DAC_NG_CTRL, 0x00 },
  963. };
  964. static bool da7213_volatile_register(struct device *dev, unsigned int reg)
  965. {
  966. switch (reg) {
  967. case DA7213_STATUS1:
  968. case DA7213_PLL_STATUS:
  969. case DA7213_AUX_L_GAIN_STATUS:
  970. case DA7213_AUX_R_GAIN_STATUS:
  971. case DA7213_MIC_1_GAIN_STATUS:
  972. case DA7213_MIC_2_GAIN_STATUS:
  973. case DA7213_MIXIN_L_GAIN_STATUS:
  974. case DA7213_MIXIN_R_GAIN_STATUS:
  975. case DA7213_ADC_L_GAIN_STATUS:
  976. case DA7213_ADC_R_GAIN_STATUS:
  977. case DA7213_DAC_L_GAIN_STATUS:
  978. case DA7213_DAC_R_GAIN_STATUS:
  979. case DA7213_HP_L_GAIN_STATUS:
  980. case DA7213_HP_R_GAIN_STATUS:
  981. case DA7213_LINE_GAIN_STATUS:
  982. case DA7213_ALC_CTRL1:
  983. case DA7213_ALC_OFFSET_AUTO_M_L:
  984. case DA7213_ALC_OFFSET_AUTO_U_L:
  985. case DA7213_ALC_OFFSET_AUTO_M_R:
  986. case DA7213_ALC_OFFSET_AUTO_U_R:
  987. case DA7213_ALC_CIC_OP_LVL_DATA:
  988. return true;
  989. default:
  990. return false;
  991. }
  992. }
  993. static int da7213_hw_params(struct snd_pcm_substream *substream,
  994. struct snd_pcm_hw_params *params,
  995. struct snd_soc_dai *dai)
  996. {
  997. struct snd_soc_component *component = dai->component;
  998. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  999. u8 dai_ctrl = 0;
  1000. u8 fs;
  1001. /* Set DAI format */
  1002. switch (params_width(params)) {
  1003. case 16:
  1004. dai_ctrl |= DA7213_DAI_WORD_LENGTH_S16_LE;
  1005. break;
  1006. case 20:
  1007. dai_ctrl |= DA7213_DAI_WORD_LENGTH_S20_LE;
  1008. break;
  1009. case 24:
  1010. dai_ctrl |= DA7213_DAI_WORD_LENGTH_S24_LE;
  1011. break;
  1012. case 32:
  1013. dai_ctrl |= DA7213_DAI_WORD_LENGTH_S32_LE;
  1014. break;
  1015. default:
  1016. return -EINVAL;
  1017. }
  1018. /* Set sampling rate */
  1019. switch (params_rate(params)) {
  1020. case 8000:
  1021. fs = DA7213_SR_8000;
  1022. da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
  1023. break;
  1024. case 11025:
  1025. fs = DA7213_SR_11025;
  1026. da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
  1027. break;
  1028. case 12000:
  1029. fs = DA7213_SR_12000;
  1030. da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
  1031. break;
  1032. case 16000:
  1033. fs = DA7213_SR_16000;
  1034. da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
  1035. break;
  1036. case 22050:
  1037. fs = DA7213_SR_22050;
  1038. da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
  1039. break;
  1040. case 32000:
  1041. fs = DA7213_SR_32000;
  1042. da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
  1043. break;
  1044. case 44100:
  1045. fs = DA7213_SR_44100;
  1046. da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
  1047. break;
  1048. case 48000:
  1049. fs = DA7213_SR_48000;
  1050. da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
  1051. break;
  1052. case 88200:
  1053. fs = DA7213_SR_88200;
  1054. da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
  1055. break;
  1056. case 96000:
  1057. fs = DA7213_SR_96000;
  1058. da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
  1059. break;
  1060. default:
  1061. return -EINVAL;
  1062. }
  1063. snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_WORD_LENGTH_MASK,
  1064. dai_ctrl);
  1065. snd_soc_component_write(component, DA7213_SR, fs);
  1066. return 0;
  1067. }
  1068. static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  1069. {
  1070. struct snd_soc_component *component = codec_dai->component;
  1071. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  1072. u8 dai_clk_mode = 0, dai_ctrl = 0;
  1073. u8 dai_offset = 0;
  1074. /* Set master/slave mode */
  1075. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1076. case SND_SOC_DAIFMT_CBM_CFM:
  1077. da7213->master = true;
  1078. break;
  1079. case SND_SOC_DAIFMT_CBS_CFS:
  1080. da7213->master = false;
  1081. break;
  1082. default:
  1083. return -EINVAL;
  1084. }
  1085. /* Set clock normal/inverted */
  1086. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1087. case SND_SOC_DAIFMT_I2S:
  1088. case SND_SOC_DAIFMT_LEFT_J:
  1089. case SND_SOC_DAIFMT_RIGHT_J:
  1090. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1091. case SND_SOC_DAIFMT_NB_NF:
  1092. break;
  1093. case SND_SOC_DAIFMT_NB_IF:
  1094. dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
  1095. break;
  1096. case SND_SOC_DAIFMT_IB_NF:
  1097. dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
  1098. break;
  1099. case SND_SOC_DAIFMT_IB_IF:
  1100. dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
  1101. DA7213_DAI_CLK_POL_INV;
  1102. break;
  1103. default:
  1104. return -EINVAL;
  1105. }
  1106. break;
  1107. case SND_SOC_DAI_FORMAT_DSP_A:
  1108. case SND_SOC_DAI_FORMAT_DSP_B:
  1109. /* The bclk is inverted wrt ASoC conventions */
  1110. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1111. case SND_SOC_DAIFMT_NB_NF:
  1112. dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
  1113. break;
  1114. case SND_SOC_DAIFMT_NB_IF:
  1115. dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
  1116. DA7213_DAI_CLK_POL_INV;
  1117. break;
  1118. case SND_SOC_DAIFMT_IB_NF:
  1119. break;
  1120. case SND_SOC_DAIFMT_IB_IF:
  1121. dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
  1122. break;
  1123. default:
  1124. return -EINVAL;
  1125. }
  1126. break;
  1127. default:
  1128. return -EINVAL;
  1129. }
  1130. /* Only I2S is supported */
  1131. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1132. case SND_SOC_DAIFMT_I2S:
  1133. dai_ctrl |= DA7213_DAI_FORMAT_I2S_MODE;
  1134. break;
  1135. case SND_SOC_DAIFMT_LEFT_J:
  1136. dai_ctrl |= DA7213_DAI_FORMAT_LEFT_J;
  1137. break;
  1138. case SND_SOC_DAIFMT_RIGHT_J:
  1139. dai_ctrl |= DA7213_DAI_FORMAT_RIGHT_J;
  1140. break;
  1141. case SND_SOC_DAI_FORMAT_DSP_A: /* L data MSB after FRM LRC */
  1142. dai_ctrl |= DA7213_DAI_FORMAT_DSP;
  1143. dai_offset = 1;
  1144. break;
  1145. case SND_SOC_DAI_FORMAT_DSP_B: /* L data MSB during FRM LRC */
  1146. dai_ctrl |= DA7213_DAI_FORMAT_DSP;
  1147. break;
  1148. default:
  1149. return -EINVAL;
  1150. }
  1151. /* By default only 64 BCLK per WCLK is supported */
  1152. dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
  1153. snd_soc_component_update_bits(component, DA7213_DAI_CLK_MODE,
  1154. DA7213_DAI_BCLKS_PER_WCLK_MASK |
  1155. DA7213_DAI_CLK_POL_MASK | DA7213_DAI_WCLK_POL_MASK,
  1156. dai_clk_mode);
  1157. snd_soc_component_update_bits(component, DA7213_DAI_CTRL, DA7213_DAI_FORMAT_MASK,
  1158. dai_ctrl);
  1159. snd_soc_component_write(component, DA7213_DAI_OFFSET, dai_offset);
  1160. return 0;
  1161. }
  1162. static int da7213_mute(struct snd_soc_dai *dai, int mute, int direction)
  1163. {
  1164. struct snd_soc_component *component = dai->component;
  1165. if (mute) {
  1166. snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
  1167. DA7213_MUTE_EN, DA7213_MUTE_EN);
  1168. snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
  1169. DA7213_MUTE_EN, DA7213_MUTE_EN);
  1170. } else {
  1171. snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
  1172. DA7213_MUTE_EN, 0);
  1173. snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
  1174. DA7213_MUTE_EN, 0);
  1175. }
  1176. return 0;
  1177. }
  1178. #define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  1179. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1180. static int da7213_set_component_sysclk(struct snd_soc_component *component,
  1181. int clk_id, int source,
  1182. unsigned int freq, int dir)
  1183. {
  1184. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  1185. int ret = 0;
  1186. if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))
  1187. return 0;
  1188. if (((freq < 5000000) && (freq != 32768)) || (freq > 54000000)) {
  1189. dev_err(component->dev, "Unsupported MCLK value %d\n",
  1190. freq);
  1191. return -EINVAL;
  1192. }
  1193. switch (clk_id) {
  1194. case DA7213_CLKSRC_MCLK:
  1195. snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
  1196. DA7213_PLL_MCLK_SQR_EN, 0);
  1197. break;
  1198. case DA7213_CLKSRC_MCLK_SQR:
  1199. snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
  1200. DA7213_PLL_MCLK_SQR_EN,
  1201. DA7213_PLL_MCLK_SQR_EN);
  1202. break;
  1203. default:
  1204. dev_err(component->dev, "Unknown clock source %d\n", clk_id);
  1205. return -EINVAL;
  1206. }
  1207. da7213->clk_src = clk_id;
  1208. if (da7213->mclk) {
  1209. freq = clk_round_rate(da7213->mclk, freq);
  1210. ret = clk_set_rate(da7213->mclk, freq);
  1211. if (ret) {
  1212. dev_err(component->dev, "Failed to set clock rate %d\n",
  1213. freq);
  1214. return ret;
  1215. }
  1216. }
  1217. da7213->mclk_rate = freq;
  1218. return 0;
  1219. }
  1220. /* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
  1221. static int _da7213_set_component_pll(struct snd_soc_component *component,
  1222. int pll_id, int source,
  1223. unsigned int fref, unsigned int fout)
  1224. {
  1225. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  1226. u8 pll_ctrl, indiv_bits, indiv;
  1227. u8 pll_frac_top, pll_frac_bot, pll_integer;
  1228. u32 freq_ref;
  1229. u64 frac_div;
  1230. /* Workout input divider based on MCLK rate */
  1231. if (da7213->mclk_rate == 32768) {
  1232. if (!da7213->master) {
  1233. dev_err(component->dev,
  1234. "32KHz only valid if codec is clock master\n");
  1235. return -EINVAL;
  1236. }
  1237. /* 32KHz PLL Mode */
  1238. indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
  1239. indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
  1240. source = DA7213_SYSCLK_PLL_32KHZ;
  1241. freq_ref = 3750000;
  1242. } else {
  1243. if (da7213->mclk_rate < 5000000) {
  1244. dev_err(component->dev,
  1245. "PLL input clock %d below valid range\n",
  1246. da7213->mclk_rate);
  1247. return -EINVAL;
  1248. } else if (da7213->mclk_rate <= 9000000) {
  1249. indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
  1250. indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
  1251. } else if (da7213->mclk_rate <= 18000000) {
  1252. indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
  1253. indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
  1254. } else if (da7213->mclk_rate <= 36000000) {
  1255. indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
  1256. indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
  1257. } else if (da7213->mclk_rate <= 54000000) {
  1258. indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
  1259. indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
  1260. } else {
  1261. dev_err(component->dev,
  1262. "PLL input clock %d above valid range\n",
  1263. da7213->mclk_rate);
  1264. return -EINVAL;
  1265. }
  1266. freq_ref = (da7213->mclk_rate / indiv);
  1267. }
  1268. pll_ctrl = indiv_bits;
  1269. /* Configure PLL */
  1270. switch (source) {
  1271. case DA7213_SYSCLK_MCLK:
  1272. snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
  1273. DA7213_PLL_INDIV_MASK |
  1274. DA7213_PLL_MODE_MASK, pll_ctrl);
  1275. return 0;
  1276. case DA7213_SYSCLK_PLL:
  1277. break;
  1278. case DA7213_SYSCLK_PLL_SRM:
  1279. pll_ctrl |= DA7213_PLL_SRM_EN;
  1280. fout = DA7213_PLL_FREQ_OUT_94310400;
  1281. break;
  1282. case DA7213_SYSCLK_PLL_32KHZ:
  1283. if (da7213->mclk_rate != 32768) {
  1284. dev_err(component->dev,
  1285. "32KHz mode only valid with 32KHz MCLK\n");
  1286. return -EINVAL;
  1287. }
  1288. pll_ctrl |= DA7213_PLL_32K_MODE | DA7213_PLL_SRM_EN;
  1289. fout = DA7213_PLL_FREQ_OUT_94310400;
  1290. break;
  1291. default:
  1292. dev_err(component->dev, "Invalid PLL config\n");
  1293. return -EINVAL;
  1294. }
  1295. /* Calculate dividers for PLL */
  1296. pll_integer = fout / freq_ref;
  1297. frac_div = (u64)(fout % freq_ref) * 8192ULL;
  1298. do_div(frac_div, freq_ref);
  1299. pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK;
  1300. pll_frac_bot = (frac_div) & DA7213_BYTE_MASK;
  1301. /* Write PLL dividers */
  1302. snd_soc_component_write(component, DA7213_PLL_FRAC_TOP, pll_frac_top);
  1303. snd_soc_component_write(component, DA7213_PLL_FRAC_BOT, pll_frac_bot);
  1304. snd_soc_component_write(component, DA7213_PLL_INTEGER, pll_integer);
  1305. /* Enable PLL */
  1306. pll_ctrl |= DA7213_PLL_EN;
  1307. snd_soc_component_update_bits(component, DA7213_PLL_CTRL,
  1308. DA7213_PLL_INDIV_MASK | DA7213_PLL_MODE_MASK,
  1309. pll_ctrl);
  1310. /* Assist 32KHz mode PLL lock */
  1311. if (source == DA7213_SYSCLK_PLL_32KHZ) {
  1312. snd_soc_component_write(component, 0xF0, 0x8B);
  1313. snd_soc_component_write(component, 0xF1, 0x03);
  1314. snd_soc_component_write(component, 0xF1, 0x01);
  1315. snd_soc_component_write(component, 0xF0, 0x00);
  1316. }
  1317. return 0;
  1318. }
  1319. static int da7213_set_component_pll(struct snd_soc_component *component,
  1320. int pll_id, int source,
  1321. unsigned int fref, unsigned int fout)
  1322. {
  1323. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  1324. da7213->fixed_clk_auto_pll = false;
  1325. return _da7213_set_component_pll(component, pll_id, source, fref, fout);
  1326. }
  1327. /* DAI operations */
  1328. static const struct snd_soc_dai_ops da7213_dai_ops = {
  1329. .hw_params = da7213_hw_params,
  1330. .set_fmt = da7213_set_dai_fmt,
  1331. .mute_stream = da7213_mute,
  1332. .no_capture_mute = 1,
  1333. };
  1334. static struct snd_soc_dai_driver da7213_dai = {
  1335. .name = "da7213-hifi",
  1336. /* Playback Capabilities */
  1337. .playback = {
  1338. .stream_name = "Playback",
  1339. .channels_min = 1,
  1340. .channels_max = 2,
  1341. .rates = SNDRV_PCM_RATE_8000_96000,
  1342. .formats = DA7213_FORMATS,
  1343. },
  1344. /* Capture Capabilities */
  1345. .capture = {
  1346. .stream_name = "Capture",
  1347. .channels_min = 1,
  1348. .channels_max = 2,
  1349. .rates = SNDRV_PCM_RATE_8000_96000,
  1350. .formats = DA7213_FORMATS,
  1351. },
  1352. .ops = &da7213_dai_ops,
  1353. .symmetric_rate = 1,
  1354. };
  1355. static int da7213_set_auto_pll(struct snd_soc_component *component, bool enable)
  1356. {
  1357. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  1358. int mode;
  1359. if (!da7213->fixed_clk_auto_pll)
  1360. return 0;
  1361. da7213->mclk_rate = clk_get_rate(da7213->mclk);
  1362. if (enable) {
  1363. /* Slave mode needs SRM for non-harmonic frequencies */
  1364. if (da7213->master)
  1365. mode = DA7213_SYSCLK_PLL;
  1366. else
  1367. mode = DA7213_SYSCLK_PLL_SRM;
  1368. /* PLL is not required for harmonic frequencies */
  1369. switch (da7213->out_rate) {
  1370. case DA7213_PLL_FREQ_OUT_90316800:
  1371. if (da7213->mclk_rate == 11289600 ||
  1372. da7213->mclk_rate == 22579200 ||
  1373. da7213->mclk_rate == 45158400)
  1374. mode = DA7213_SYSCLK_MCLK;
  1375. break;
  1376. case DA7213_PLL_FREQ_OUT_98304000:
  1377. if (da7213->mclk_rate == 12288000 ||
  1378. da7213->mclk_rate == 24576000 ||
  1379. da7213->mclk_rate == 49152000)
  1380. mode = DA7213_SYSCLK_MCLK;
  1381. break;
  1382. default:
  1383. return -1;
  1384. }
  1385. } else {
  1386. /* Disable PLL in standby */
  1387. mode = DA7213_SYSCLK_MCLK;
  1388. }
  1389. return _da7213_set_component_pll(component, 0, mode,
  1390. da7213->mclk_rate, da7213->out_rate);
  1391. }
  1392. static int da7213_set_bias_level(struct snd_soc_component *component,
  1393. enum snd_soc_bias_level level)
  1394. {
  1395. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  1396. int ret;
  1397. switch (level) {
  1398. case SND_SOC_BIAS_ON:
  1399. break;
  1400. case SND_SOC_BIAS_PREPARE:
  1401. /* Enable MCLK for transition to ON state */
  1402. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY) {
  1403. if (da7213->mclk) {
  1404. ret = clk_prepare_enable(da7213->mclk);
  1405. if (ret) {
  1406. dev_err(component->dev,
  1407. "Failed to enable mclk\n");
  1408. return ret;
  1409. }
  1410. da7213_set_auto_pll(component, true);
  1411. }
  1412. }
  1413. break;
  1414. case SND_SOC_BIAS_STANDBY:
  1415. if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
  1416. /* Enable VMID reference & master bias */
  1417. snd_soc_component_update_bits(component, DA7213_REFERENCES,
  1418. DA7213_VMID_EN | DA7213_BIAS_EN,
  1419. DA7213_VMID_EN | DA7213_BIAS_EN);
  1420. } else {
  1421. /* Remove MCLK */
  1422. if (da7213->mclk) {
  1423. da7213_set_auto_pll(component, false);
  1424. clk_disable_unprepare(da7213->mclk);
  1425. }
  1426. }
  1427. break;
  1428. case SND_SOC_BIAS_OFF:
  1429. /* Disable VMID reference & master bias */
  1430. snd_soc_component_update_bits(component, DA7213_REFERENCES,
  1431. DA7213_VMID_EN | DA7213_BIAS_EN, 0);
  1432. break;
  1433. }
  1434. return 0;
  1435. }
  1436. #if defined(CONFIG_OF)
  1437. /* DT */
  1438. static const struct of_device_id da7213_of_match[] = {
  1439. { .compatible = "dlg,da7212", },
  1440. { .compatible = "dlg,da7213", },
  1441. { }
  1442. };
  1443. MODULE_DEVICE_TABLE(of, da7213_of_match);
  1444. #endif
  1445. #ifdef CONFIG_ACPI
  1446. static const struct acpi_device_id da7213_acpi_match[] = {
  1447. { "DLGS7212", 0},
  1448. { "DLGS7213", 0},
  1449. { },
  1450. };
  1451. MODULE_DEVICE_TABLE(acpi, da7213_acpi_match);
  1452. #endif
  1453. static enum da7213_micbias_voltage
  1454. da7213_of_micbias_lvl(struct snd_soc_component *component, u32 val)
  1455. {
  1456. switch (val) {
  1457. case 1600:
  1458. return DA7213_MICBIAS_1_6V;
  1459. case 2200:
  1460. return DA7213_MICBIAS_2_2V;
  1461. case 2500:
  1462. return DA7213_MICBIAS_2_5V;
  1463. case 3000:
  1464. return DA7213_MICBIAS_3_0V;
  1465. default:
  1466. dev_warn(component->dev, "Invalid micbias level\n");
  1467. return DA7213_MICBIAS_2_2V;
  1468. }
  1469. }
  1470. static enum da7213_dmic_data_sel
  1471. da7213_of_dmic_data_sel(struct snd_soc_component *component, const char *str)
  1472. {
  1473. if (!strcmp(str, "lrise_rfall")) {
  1474. return DA7213_DMIC_DATA_LRISE_RFALL;
  1475. } else if (!strcmp(str, "lfall_rrise")) {
  1476. return DA7213_DMIC_DATA_LFALL_RRISE;
  1477. } else {
  1478. dev_warn(component->dev, "Invalid DMIC data select type\n");
  1479. return DA7213_DMIC_DATA_LRISE_RFALL;
  1480. }
  1481. }
  1482. static enum da7213_dmic_samplephase
  1483. da7213_of_dmic_samplephase(struct snd_soc_component *component, const char *str)
  1484. {
  1485. if (!strcmp(str, "on_clkedge")) {
  1486. return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
  1487. } else if (!strcmp(str, "between_clkedge")) {
  1488. return DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE;
  1489. } else {
  1490. dev_warn(component->dev, "Invalid DMIC sample phase\n");
  1491. return DA7213_DMIC_SAMPLE_ON_CLKEDGE;
  1492. }
  1493. }
  1494. static enum da7213_dmic_clk_rate
  1495. da7213_of_dmic_clkrate(struct snd_soc_component *component, u32 val)
  1496. {
  1497. switch (val) {
  1498. case 1500000:
  1499. return DA7213_DMIC_CLK_1_5MHZ;
  1500. case 3000000:
  1501. return DA7213_DMIC_CLK_3_0MHZ;
  1502. default:
  1503. dev_warn(component->dev, "Invalid DMIC clock rate\n");
  1504. return DA7213_DMIC_CLK_1_5MHZ;
  1505. }
  1506. }
  1507. static struct da7213_platform_data
  1508. *da7213_fw_to_pdata(struct snd_soc_component *component)
  1509. {
  1510. struct device *dev = component->dev;
  1511. struct da7213_platform_data *pdata;
  1512. const char *fw_str;
  1513. u32 fw_val32;
  1514. pdata = devm_kzalloc(component->dev, sizeof(*pdata), GFP_KERNEL);
  1515. if (!pdata)
  1516. return NULL;
  1517. if (device_property_read_u32(dev, "dlg,micbias1-lvl", &fw_val32) >= 0)
  1518. pdata->micbias1_lvl = da7213_of_micbias_lvl(component, fw_val32);
  1519. else
  1520. pdata->micbias1_lvl = DA7213_MICBIAS_2_2V;
  1521. if (device_property_read_u32(dev, "dlg,micbias2-lvl", &fw_val32) >= 0)
  1522. pdata->micbias2_lvl = da7213_of_micbias_lvl(component, fw_val32);
  1523. else
  1524. pdata->micbias2_lvl = DA7213_MICBIAS_2_2V;
  1525. if (!device_property_read_string(dev, "dlg,dmic-data-sel", &fw_str))
  1526. pdata->dmic_data_sel = da7213_of_dmic_data_sel(component, fw_str);
  1527. else
  1528. pdata->dmic_data_sel = DA7213_DMIC_DATA_LRISE_RFALL;
  1529. if (!device_property_read_string(dev, "dlg,dmic-samplephase", &fw_str))
  1530. pdata->dmic_samplephase =
  1531. da7213_of_dmic_samplephase(component, fw_str);
  1532. else
  1533. pdata->dmic_samplephase = DA7213_DMIC_SAMPLE_ON_CLKEDGE;
  1534. if (device_property_read_u32(dev, "dlg,dmic-clkrate", &fw_val32) >= 0)
  1535. pdata->dmic_clk_rate = da7213_of_dmic_clkrate(component, fw_val32);
  1536. else
  1537. pdata->dmic_clk_rate = DA7213_DMIC_CLK_3_0MHZ;
  1538. return pdata;
  1539. }
  1540. static int da7213_probe(struct snd_soc_component *component)
  1541. {
  1542. struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
  1543. pm_runtime_get_sync(component->dev);
  1544. /* Default to using ALC auto offset calibration mode. */
  1545. snd_soc_component_update_bits(component, DA7213_ALC_CTRL1,
  1546. DA7213_ALC_CALIB_MODE_MAN, 0);
  1547. da7213->alc_calib_auto = true;
  1548. /* Default PC counter to free-running */
  1549. snd_soc_component_update_bits(component, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
  1550. DA7213_PC_FREERUN_MASK);
  1551. /* Enable all Gain Ramps */
  1552. snd_soc_component_update_bits(component, DA7213_AUX_L_CTRL,
  1553. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1554. snd_soc_component_update_bits(component, DA7213_AUX_R_CTRL,
  1555. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1556. snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL,
  1557. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1558. snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL,
  1559. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1560. snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL,
  1561. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1562. snd_soc_component_update_bits(component, DA7213_ADC_R_CTRL,
  1563. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1564. snd_soc_component_update_bits(component, DA7213_DAC_L_CTRL,
  1565. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1566. snd_soc_component_update_bits(component, DA7213_DAC_R_CTRL,
  1567. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1568. snd_soc_component_update_bits(component, DA7213_HP_L_CTRL,
  1569. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1570. snd_soc_component_update_bits(component, DA7213_HP_R_CTRL,
  1571. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1572. snd_soc_component_update_bits(component, DA7213_LINE_CTRL,
  1573. DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);
  1574. /*
  1575. * There are two separate control bits for input and output mixers as
  1576. * well as headphone and line outs.
  1577. * One to enable corresponding amplifier and other to enable its
  1578. * output. As amplifier bits are related to power control, they are
  1579. * being managed by DAPM while other (non power related) bits are
  1580. * enabled here
  1581. */
  1582. snd_soc_component_update_bits(component, DA7213_MIXIN_L_CTRL,
  1583. DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
  1584. snd_soc_component_update_bits(component, DA7213_MIXIN_R_CTRL,
  1585. DA7213_MIXIN_MIX_EN, DA7213_MIXIN_MIX_EN);
  1586. snd_soc_component_update_bits(component, DA7213_MIXOUT_L_CTRL,
  1587. DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
  1588. snd_soc_component_update_bits(component, DA7213_MIXOUT_R_CTRL,
  1589. DA7213_MIXOUT_MIX_EN, DA7213_MIXOUT_MIX_EN);
  1590. snd_soc_component_update_bits(component, DA7213_HP_L_CTRL,
  1591. DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
  1592. snd_soc_component_update_bits(component, DA7213_HP_R_CTRL,
  1593. DA7213_HP_AMP_OE, DA7213_HP_AMP_OE);
  1594. snd_soc_component_update_bits(component, DA7213_LINE_CTRL,
  1595. DA7213_LINE_AMP_OE, DA7213_LINE_AMP_OE);
  1596. /* Handle DT/Platform data */
  1597. da7213->pdata = dev_get_platdata(component->dev);
  1598. if (!da7213->pdata)
  1599. da7213->pdata = da7213_fw_to_pdata(component);
  1600. /* Set platform data values */
  1601. if (da7213->pdata) {
  1602. struct da7213_platform_data *pdata = da7213->pdata;
  1603. u8 micbias_lvl = 0, dmic_cfg = 0;
  1604. /* Set Mic Bias voltages */
  1605. switch (pdata->micbias1_lvl) {
  1606. case DA7213_MICBIAS_1_6V:
  1607. case DA7213_MICBIAS_2_2V:
  1608. case DA7213_MICBIAS_2_5V:
  1609. case DA7213_MICBIAS_3_0V:
  1610. micbias_lvl |= (pdata->micbias1_lvl <<
  1611. DA7213_MICBIAS1_LEVEL_SHIFT);
  1612. break;
  1613. }
  1614. switch (pdata->micbias2_lvl) {
  1615. case DA7213_MICBIAS_1_6V:
  1616. case DA7213_MICBIAS_2_2V:
  1617. case DA7213_MICBIAS_2_5V:
  1618. case DA7213_MICBIAS_3_0V:
  1619. micbias_lvl |= (pdata->micbias2_lvl <<
  1620. DA7213_MICBIAS2_LEVEL_SHIFT);
  1621. break;
  1622. }
  1623. snd_soc_component_update_bits(component, DA7213_MICBIAS_CTRL,
  1624. DA7213_MICBIAS1_LEVEL_MASK |
  1625. DA7213_MICBIAS2_LEVEL_MASK, micbias_lvl);
  1626. /* Set DMIC configuration */
  1627. switch (pdata->dmic_data_sel) {
  1628. case DA7213_DMIC_DATA_LFALL_RRISE:
  1629. case DA7213_DMIC_DATA_LRISE_RFALL:
  1630. dmic_cfg |= (pdata->dmic_data_sel <<
  1631. DA7213_DMIC_DATA_SEL_SHIFT);
  1632. break;
  1633. }
  1634. switch (pdata->dmic_samplephase) {
  1635. case DA7213_DMIC_SAMPLE_ON_CLKEDGE:
  1636. case DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE:
  1637. dmic_cfg |= (pdata->dmic_samplephase <<
  1638. DA7213_DMIC_SAMPLEPHASE_SHIFT);
  1639. break;
  1640. }
  1641. switch (pdata->dmic_clk_rate) {
  1642. case DA7213_DMIC_CLK_3_0MHZ:
  1643. case DA7213_DMIC_CLK_1_5MHZ:
  1644. dmic_cfg |= (pdata->dmic_clk_rate <<
  1645. DA7213_DMIC_CLK_RATE_SHIFT);
  1646. break;
  1647. }
  1648. snd_soc_component_update_bits(component, DA7213_MIC_CONFIG,
  1649. DA7213_DMIC_DATA_SEL_MASK |
  1650. DA7213_DMIC_SAMPLEPHASE_MASK |
  1651. DA7213_DMIC_CLK_RATE_MASK, dmic_cfg);
  1652. }
  1653. pm_runtime_put_sync(component->dev);
  1654. /* Check if MCLK provided */
  1655. da7213->mclk = devm_clk_get(component->dev, "mclk");
  1656. if (IS_ERR(da7213->mclk)) {
  1657. if (PTR_ERR(da7213->mclk) != -ENOENT)
  1658. return PTR_ERR(da7213->mclk);
  1659. else
  1660. da7213->mclk = NULL;
  1661. } else {
  1662. /* Do automatic PLL handling assuming fixed clock until
  1663. * set_pll() has been called. This makes the codec usable
  1664. * with the simple-audio-card driver. */
  1665. da7213->fixed_clk_auto_pll = true;
  1666. }
  1667. return 0;
  1668. }
  1669. static const struct snd_soc_component_driver soc_component_dev_da7213 = {
  1670. .probe = da7213_probe,
  1671. .set_bias_level = da7213_set_bias_level,
  1672. .controls = da7213_snd_controls,
  1673. .num_controls = ARRAY_SIZE(da7213_snd_controls),
  1674. .dapm_widgets = da7213_dapm_widgets,
  1675. .num_dapm_widgets = ARRAY_SIZE(da7213_dapm_widgets),
  1676. .dapm_routes = da7213_audio_map,
  1677. .num_dapm_routes = ARRAY_SIZE(da7213_audio_map),
  1678. .set_sysclk = da7213_set_component_sysclk,
  1679. .set_pll = da7213_set_component_pll,
  1680. .idle_bias_on = 1,
  1681. .use_pmdown_time = 1,
  1682. .endianness = 1,
  1683. };
  1684. static const struct regmap_config da7213_regmap_config = {
  1685. .reg_bits = 8,
  1686. .val_bits = 8,
  1687. .reg_defaults = da7213_reg_defaults,
  1688. .num_reg_defaults = ARRAY_SIZE(da7213_reg_defaults),
  1689. .volatile_reg = da7213_volatile_register,
  1690. .cache_type = REGCACHE_RBTREE,
  1691. };
  1692. static void da7213_power_off(void *data)
  1693. {
  1694. struct da7213_priv *da7213 = data;
  1695. regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies);
  1696. }
  1697. static const char *da7213_supply_names[DA7213_NUM_SUPPLIES] = {
  1698. [DA7213_SUPPLY_VDDA] = "VDDA",
  1699. [DA7213_SUPPLY_VDDIO] = "VDDIO",
  1700. };
  1701. static int da7213_i2c_probe(struct i2c_client *i2c)
  1702. {
  1703. struct da7213_priv *da7213;
  1704. int i, ret;
  1705. da7213 = devm_kzalloc(&i2c->dev, sizeof(*da7213), GFP_KERNEL);
  1706. if (!da7213)
  1707. return -ENOMEM;
  1708. i2c_set_clientdata(i2c, da7213);
  1709. /* Get required supplies */
  1710. for (i = 0; i < DA7213_NUM_SUPPLIES; ++i)
  1711. da7213->supplies[i].supply = da7213_supply_names[i];
  1712. ret = devm_regulator_bulk_get(&i2c->dev, DA7213_NUM_SUPPLIES,
  1713. da7213->supplies);
  1714. if (ret) {
  1715. dev_err(&i2c->dev, "Failed to get supplies: %d\n", ret);
  1716. return ret;
  1717. }
  1718. ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies);
  1719. if (ret < 0)
  1720. return ret;
  1721. ret = devm_add_action_or_reset(&i2c->dev, da7213_power_off, da7213);
  1722. if (ret < 0)
  1723. return ret;
  1724. da7213->regmap = devm_regmap_init_i2c(i2c, &da7213_regmap_config);
  1725. if (IS_ERR(da7213->regmap)) {
  1726. ret = PTR_ERR(da7213->regmap);
  1727. dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
  1728. return ret;
  1729. }
  1730. pm_runtime_set_autosuspend_delay(&i2c->dev, 100);
  1731. pm_runtime_use_autosuspend(&i2c->dev);
  1732. pm_runtime_set_active(&i2c->dev);
  1733. pm_runtime_enable(&i2c->dev);
  1734. ret = devm_snd_soc_register_component(&i2c->dev,
  1735. &soc_component_dev_da7213, &da7213_dai, 1);
  1736. if (ret < 0) {
  1737. dev_err(&i2c->dev, "Failed to register da7213 component: %d\n",
  1738. ret);
  1739. }
  1740. return ret;
  1741. }
  1742. static void da7213_i2c_remove(struct i2c_client *i2c)
  1743. {
  1744. pm_runtime_disable(&i2c->dev);
  1745. }
  1746. static int __maybe_unused da7213_runtime_suspend(struct device *dev)
  1747. {
  1748. struct da7213_priv *da7213 = dev_get_drvdata(dev);
  1749. regcache_cache_only(da7213->regmap, true);
  1750. regcache_mark_dirty(da7213->regmap);
  1751. regulator_bulk_disable(DA7213_NUM_SUPPLIES, da7213->supplies);
  1752. return 0;
  1753. }
  1754. static int __maybe_unused da7213_runtime_resume(struct device *dev)
  1755. {
  1756. struct da7213_priv *da7213 = dev_get_drvdata(dev);
  1757. int ret;
  1758. ret = regulator_bulk_enable(DA7213_NUM_SUPPLIES, da7213->supplies);
  1759. if (ret < 0)
  1760. return ret;
  1761. regcache_cache_only(da7213->regmap, false);
  1762. regcache_sync(da7213->regmap);
  1763. return 0;
  1764. }
  1765. static const struct dev_pm_ops da7213_pm = {
  1766. SET_RUNTIME_PM_OPS(da7213_runtime_suspend, da7213_runtime_resume, NULL)
  1767. };
  1768. static const struct i2c_device_id da7213_i2c_id[] = {
  1769. { "da7213", 0 },
  1770. { }
  1771. };
  1772. MODULE_DEVICE_TABLE(i2c, da7213_i2c_id);
  1773. /* I2C codec control layer */
  1774. static struct i2c_driver da7213_i2c_driver = {
  1775. .driver = {
  1776. .name = "da7213",
  1777. .of_match_table = of_match_ptr(da7213_of_match),
  1778. .acpi_match_table = ACPI_PTR(da7213_acpi_match),
  1779. .pm = &da7213_pm,
  1780. },
  1781. .probe_new = da7213_i2c_probe,
  1782. .remove = da7213_i2c_remove,
  1783. .id_table = da7213_i2c_id,
  1784. };
  1785. module_i2c_driver(da7213_i2c_driver);
  1786. MODULE_DESCRIPTION("ASoC DA7213 Codec driver");
  1787. MODULE_AUTHOR("Adam Thomson <[email protected]>");
  1788. MODULE_LICENSE("GPL");