ak4613.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // ak4613.c -- Asahi Kasei ALSA Soc Audio driver
  4. //
  5. // Copyright (C) 2015 Renesas Electronics Corporation
  6. // Kuninori Morimoto <[email protected]>
  7. //
  8. // Based on ak4642.c by Kuninori Morimoto
  9. // Based on wm8731.c by Richard Purdie
  10. // Based on ak4535.c by Richard Purdie
  11. // Based on wm8753.c by Liam Girdwood
  12. /*
  13. * +-------+
  14. * |AK4613 |
  15. * SDTO1 <-| |
  16. * | |
  17. * SDTI1 ->| |
  18. * SDTI2 ->| |
  19. * SDTI3 ->| |
  20. * +-------+
  21. *
  22. * +---+
  23. * clk | |___________________________________________...
  24. *
  25. * [TDM512]
  26. * SDTO1 [L1][R1][L2][R2]
  27. * SDTI1 [L1][R1][L2][R2][L3][R3][L4][R4][L5][R5][L6][R6]
  28. *
  29. * [TDM256]
  30. * SDTO1 [L1][R1][L2][R2]
  31. * SDTI1 [L1][R1][L2][R2][L3][R3][L4][R4]
  32. * SDTI2 [L5][R5][L6][R6]
  33. *
  34. * [TDM128]
  35. * SDTO1 [L1][R1][L2][R2]
  36. * SDTI1 [L1][R1][L2][R2]
  37. * SDTI2 [L3][R3][L4][R4]
  38. * SDTI3 [L5][R5][L6][R6]
  39. *
  40. * [STEREO]
  41. * Playback 2ch : SDTI1
  42. * Capture 2ch : SDTO1
  43. *
  44. * [TDM512]
  45. * Playback 12ch : SDTI1
  46. * Capture 4ch : SDTO1
  47. *
  48. * [TDM256]
  49. * Playback 12ch : SDTI1 + SDTI2
  50. * Playback 8ch : SDTI1
  51. * Capture 4ch : SDTO1
  52. *
  53. * [TDM128]
  54. * Playback 12ch : SDTI1 + SDTI2 + SDTI3
  55. * Playback 8ch : SDTI1 + SDTI2
  56. * Playback 4ch : SDTI1
  57. * Capture 4ch : SDTO1
  58. *
  59. *
  60. * !!! NOTE !!!
  61. *
  62. * Renesas is the only user of ak4613 on upstream so far,
  63. * but the chip connection is like below.
  64. * Thus, Renesas can't test all connection case.
  65. * Tested TDM is very limited.
  66. *
  67. * +-----+ +-----------+
  68. * | SoC | | AK4613 |
  69. * | |<-----|SDTO1 IN1|<-- Mic
  70. * | | | IN2|
  71. * | | | |
  72. * | |----->|SDTI1 OUT1|--> Headphone
  73. * +-----+ |SDTI2 OUT2|
  74. * |SDTI3 OUT3|
  75. * | OUT4|
  76. * | OUT5|
  77. * | OUT6|
  78. * +-----------+
  79. *
  80. * Renesas SoC can handle [2, 6,8] channels.
  81. * Ak4613 can handle [2,4, 8,12] channels.
  82. *
  83. * Because of above HW connection and available channels number,
  84. * Renesas could test are ...
  85. *
  86. * [STEREO] Playback 2ch : SDTI1
  87. * Capture 2ch : SDTO1
  88. * [TDM256] Playback 8ch : SDTI1 (*)
  89. *
  90. * (*) it used 8ch data between SoC <-> AK4613 on TDM256 mode,
  91. * but could confirm is only first 2ch because only 1
  92. * Headphone is connected.
  93. *
  94. * see
  95. * AK4613_ENABLE_TDM_TEST
  96. */
  97. #include <linux/clk.h>
  98. #include <linux/delay.h>
  99. #include <linux/i2c.h>
  100. #include <linux/slab.h>
  101. #include <linux/of_device.h>
  102. #include <linux/of_graph.h>
  103. #include <linux/module.h>
  104. #include <linux/regmap.h>
  105. #include <sound/soc.h>
  106. #include <sound/pcm_params.h>
  107. #include <sound/tlv.h>
  108. #define PW_MGMT1 0x00 /* Power Management 1 */
  109. #define PW_MGMT2 0x01 /* Power Management 2 */
  110. #define PW_MGMT3 0x02 /* Power Management 3 */
  111. #define CTRL1 0x03 /* Control 1 */
  112. #define CTRL2 0x04 /* Control 2 */
  113. #define DEMP1 0x05 /* De-emphasis1 */
  114. #define DEMP2 0x06 /* De-emphasis2 */
  115. #define OFD 0x07 /* Overflow Detect */
  116. #define ZRD 0x08 /* Zero Detect */
  117. #define ICTRL 0x09 /* Input Control */
  118. #define OCTRL 0x0a /* Output Control */
  119. #define LOUT1 0x0b /* LOUT1 Volume Control */
  120. #define ROUT1 0x0c /* ROUT1 Volume Control */
  121. #define LOUT2 0x0d /* LOUT2 Volume Control */
  122. #define ROUT2 0x0e /* ROUT2 Volume Control */
  123. #define LOUT3 0x0f /* LOUT3 Volume Control */
  124. #define ROUT3 0x10 /* ROUT3 Volume Control */
  125. #define LOUT4 0x11 /* LOUT4 Volume Control */
  126. #define ROUT4 0x12 /* ROUT4 Volume Control */
  127. #define LOUT5 0x13 /* LOUT5 Volume Control */
  128. #define ROUT5 0x14 /* ROUT5 Volume Control */
  129. #define LOUT6 0x15 /* LOUT6 Volume Control */
  130. #define ROUT6 0x16 /* ROUT6 Volume Control */
  131. /* PW_MGMT1 */
  132. #define RSTN BIT(0)
  133. #define PMDAC BIT(1)
  134. #define PMADC BIT(2)
  135. #define PMVR BIT(3)
  136. /* PW_MGMT2 */
  137. #define PMAD_ALL 0x7
  138. /* PW_MGMT3 */
  139. #define PMDA_ALL 0x3f
  140. /* CTRL1 */
  141. #define DIF0 BIT(3)
  142. #define DIF1 BIT(4)
  143. #define DIF2 BIT(5)
  144. #define TDM0 BIT(6)
  145. #define TDM1 BIT(7)
  146. #define NO_FMT (0xff)
  147. #define FMT_MASK (0xf8)
  148. /* CTRL2 */
  149. #define DFS_MASK (3 << 2)
  150. #define DFS_NORMAL_SPEED (0 << 2)
  151. #define DFS_DOUBLE_SPEED (1 << 2)
  152. #define DFS_QUAD_SPEED (2 << 2)
  153. /* ICTRL */
  154. #define ICTRL_MASK (0x3)
  155. /* OCTRL */
  156. #define OCTRL_MASK (0x3F)
  157. /*
  158. * configs
  159. *
  160. * 0x000000BA
  161. *
  162. * B : AK4613_CONFIG_SDTI_x
  163. * A : AK4613_CONFIG_MODE_x
  164. */
  165. #define AK4613_CONFIG_SET(priv, x) priv->configs |= AK4613_CONFIG_##x
  166. #define AK4613_CONFIG_GET(priv, x) (priv->configs & AK4613_CONFIG_##x##_MASK)
  167. /*
  168. * AK4613_CONFIG_SDTI_x
  169. *
  170. * It indicates how many SDTIx is connected.
  171. */
  172. #define AK4613_CONFIG_SDTI_MASK (0xF << 4)
  173. #define AK4613_CONFIG_SDTI(x) (((x) & 0xF) << 4)
  174. #define AK4613_CONFIG_SDTI_set(priv, x) AK4613_CONFIG_SET(priv, SDTI(x))
  175. #define AK4613_CONFIG_SDTI_get(priv) ((AK4613_CONFIG_GET(priv, SDTI) >> 4) & 0xF)
  176. /*
  177. * AK4613_CONFIG_MODE_x
  178. *
  179. * Same as Ctrl1 :: TDM1/TDM0
  180. * No shift is requested
  181. * see
  182. * AK4613_CTRL1_TO_MODE()
  183. * Table 11/12/13/14
  184. */
  185. #define AK4613_CONFIG_MODE_MASK (0xF)
  186. #define AK4613_CONFIG_MODE_STEREO (0x0)
  187. #define AK4613_CONFIG_MODE_TDM512 (0x1)
  188. #define AK4613_CONFIG_MODE_TDM256 (0x2)
  189. #define AK4613_CONFIG_MODE_TDM128 (0x3)
  190. /*
  191. * !!!! FIXME !!!!
  192. *
  193. * Because of testable HW limitation, TDM256 8ch TDM was only tested.
  194. * This driver uses AK4613_ENABLE_TDM_TEST instead of new DT property so far.
  195. * Don't hesitate to update driver, you don't need to care compatible
  196. * with Renesas.
  197. *
  198. * #define AK4613_ENABLE_TDM_TEST
  199. */
  200. struct ak4613_interface {
  201. unsigned int width;
  202. unsigned int fmt;
  203. u8 dif;
  204. };
  205. struct ak4613_priv {
  206. struct mutex lock;
  207. struct snd_pcm_hw_constraint_list constraint_rates;
  208. struct snd_pcm_hw_constraint_list constraint_channels;
  209. struct work_struct dummy_write_work;
  210. struct snd_soc_component *component;
  211. unsigned int rate;
  212. unsigned int sysclk;
  213. unsigned int fmt;
  214. unsigned int configs;
  215. int cnt;
  216. u8 ctrl1;
  217. u8 oc;
  218. u8 ic;
  219. };
  220. /*
  221. * Playback Volume
  222. *
  223. * max : 0x00 : 0 dB
  224. * ( 0.5 dB step )
  225. * min : 0xFE : -127.0 dB
  226. * mute: 0xFF
  227. */
  228. static const DECLARE_TLV_DB_SCALE(out_tlv, -12750, 50, 1);
  229. static const struct snd_kcontrol_new ak4613_snd_controls[] = {
  230. SOC_DOUBLE_R_TLV("Digital Playback Volume1", LOUT1, ROUT1,
  231. 0, 0xFF, 1, out_tlv),
  232. SOC_DOUBLE_R_TLV("Digital Playback Volume2", LOUT2, ROUT2,
  233. 0, 0xFF, 1, out_tlv),
  234. SOC_DOUBLE_R_TLV("Digital Playback Volume3", LOUT3, ROUT3,
  235. 0, 0xFF, 1, out_tlv),
  236. SOC_DOUBLE_R_TLV("Digital Playback Volume4", LOUT4, ROUT4,
  237. 0, 0xFF, 1, out_tlv),
  238. SOC_DOUBLE_R_TLV("Digital Playback Volume5", LOUT5, ROUT5,
  239. 0, 0xFF, 1, out_tlv),
  240. SOC_DOUBLE_R_TLV("Digital Playback Volume6", LOUT6, ROUT6,
  241. 0, 0xFF, 1, out_tlv),
  242. };
  243. static const struct reg_default ak4613_reg[] = {
  244. { 0x0, 0x0f }, { 0x1, 0x07 }, { 0x2, 0x3f }, { 0x3, 0x20 },
  245. { 0x4, 0x20 }, { 0x5, 0x55 }, { 0x6, 0x05 }, { 0x7, 0x07 },
  246. { 0x8, 0x0f }, { 0x9, 0x07 }, { 0xa, 0x3f }, { 0xb, 0x00 },
  247. { 0xc, 0x00 }, { 0xd, 0x00 }, { 0xe, 0x00 }, { 0xf, 0x00 },
  248. { 0x10, 0x00 }, { 0x11, 0x00 }, { 0x12, 0x00 }, { 0x13, 0x00 },
  249. { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0x00 },
  250. };
  251. /*
  252. * CTRL1 register
  253. * see
  254. * Table 11/12/13/14
  255. */
  256. #define AUDIO_IFACE(_dif, _width, _fmt) \
  257. { \
  258. .dif = _dif, \
  259. .width = _width, \
  260. .fmt = SND_SOC_DAIFMT_##_fmt,\
  261. }
  262. static const struct ak4613_interface ak4613_iface[] = {
  263. /* It doesn't support asymmetric format */
  264. AUDIO_IFACE(0x03, 24, LEFT_J),
  265. AUDIO_IFACE(0x04, 24, I2S),
  266. };
  267. #define AK4613_CTRL1_TO_MODE(priv) ((priv)->ctrl1 >> 6) /* AK4613_CONFIG_MODE_x */
  268. static const struct regmap_config ak4613_regmap_cfg = {
  269. .reg_bits = 8,
  270. .val_bits = 8,
  271. .max_register = 0x16,
  272. .reg_defaults = ak4613_reg,
  273. .num_reg_defaults = ARRAY_SIZE(ak4613_reg),
  274. .cache_type = REGCACHE_RBTREE,
  275. };
  276. static const struct of_device_id ak4613_of_match[] = {
  277. { .compatible = "asahi-kasei,ak4613", .data = &ak4613_regmap_cfg },
  278. {},
  279. };
  280. MODULE_DEVICE_TABLE(of, ak4613_of_match);
  281. static const struct i2c_device_id ak4613_i2c_id[] = {
  282. { "ak4613", (kernel_ulong_t)&ak4613_regmap_cfg },
  283. { }
  284. };
  285. MODULE_DEVICE_TABLE(i2c, ak4613_i2c_id);
  286. static const struct snd_soc_dapm_widget ak4613_dapm_widgets[] = {
  287. /* Outputs */
  288. SND_SOC_DAPM_OUTPUT("LOUT1"),
  289. SND_SOC_DAPM_OUTPUT("LOUT2"),
  290. SND_SOC_DAPM_OUTPUT("LOUT3"),
  291. SND_SOC_DAPM_OUTPUT("LOUT4"),
  292. SND_SOC_DAPM_OUTPUT("LOUT5"),
  293. SND_SOC_DAPM_OUTPUT("LOUT6"),
  294. SND_SOC_DAPM_OUTPUT("ROUT1"),
  295. SND_SOC_DAPM_OUTPUT("ROUT2"),
  296. SND_SOC_DAPM_OUTPUT("ROUT3"),
  297. SND_SOC_DAPM_OUTPUT("ROUT4"),
  298. SND_SOC_DAPM_OUTPUT("ROUT5"),
  299. SND_SOC_DAPM_OUTPUT("ROUT6"),
  300. /* Inputs */
  301. SND_SOC_DAPM_INPUT("LIN1"),
  302. SND_SOC_DAPM_INPUT("LIN2"),
  303. SND_SOC_DAPM_INPUT("RIN1"),
  304. SND_SOC_DAPM_INPUT("RIN2"),
  305. /* DAC */
  306. SND_SOC_DAPM_DAC("DAC1", NULL, PW_MGMT3, 0, 0),
  307. SND_SOC_DAPM_DAC("DAC2", NULL, PW_MGMT3, 1, 0),
  308. SND_SOC_DAPM_DAC("DAC3", NULL, PW_MGMT3, 2, 0),
  309. SND_SOC_DAPM_DAC("DAC4", NULL, PW_MGMT3, 3, 0),
  310. SND_SOC_DAPM_DAC("DAC5", NULL, PW_MGMT3, 4, 0),
  311. SND_SOC_DAPM_DAC("DAC6", NULL, PW_MGMT3, 5, 0),
  312. /* ADC */
  313. SND_SOC_DAPM_ADC("ADC1", NULL, PW_MGMT2, 0, 0),
  314. SND_SOC_DAPM_ADC("ADC2", NULL, PW_MGMT2, 1, 0),
  315. };
  316. static const struct snd_soc_dapm_route ak4613_intercon[] = {
  317. {"LOUT1", NULL, "DAC1"},
  318. {"LOUT2", NULL, "DAC2"},
  319. {"LOUT3", NULL, "DAC3"},
  320. {"LOUT4", NULL, "DAC4"},
  321. {"LOUT5", NULL, "DAC5"},
  322. {"LOUT6", NULL, "DAC6"},
  323. {"ROUT1", NULL, "DAC1"},
  324. {"ROUT2", NULL, "DAC2"},
  325. {"ROUT3", NULL, "DAC3"},
  326. {"ROUT4", NULL, "DAC4"},
  327. {"ROUT5", NULL, "DAC5"},
  328. {"ROUT6", NULL, "DAC6"},
  329. {"DAC1", NULL, "Playback"},
  330. {"DAC2", NULL, "Playback"},
  331. {"DAC3", NULL, "Playback"},
  332. {"DAC4", NULL, "Playback"},
  333. {"DAC5", NULL, "Playback"},
  334. {"DAC6", NULL, "Playback"},
  335. {"Capture", NULL, "ADC1"},
  336. {"Capture", NULL, "ADC2"},
  337. {"ADC1", NULL, "LIN1"},
  338. {"ADC2", NULL, "LIN2"},
  339. {"ADC1", NULL, "RIN1"},
  340. {"ADC2", NULL, "RIN2"},
  341. };
  342. static void ak4613_dai_shutdown(struct snd_pcm_substream *substream,
  343. struct snd_soc_dai *dai)
  344. {
  345. struct snd_soc_component *component = dai->component;
  346. struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
  347. struct device *dev = component->dev;
  348. mutex_lock(&priv->lock);
  349. priv->cnt--;
  350. if (priv->cnt < 0) {
  351. dev_err(dev, "unexpected counter error\n");
  352. priv->cnt = 0;
  353. }
  354. if (!priv->cnt)
  355. priv->ctrl1 = 0;
  356. mutex_unlock(&priv->lock);
  357. }
  358. static void ak4613_hw_constraints(struct ak4613_priv *priv,
  359. struct snd_pcm_substream *substream)
  360. {
  361. struct snd_pcm_runtime *runtime = substream->runtime;
  362. static const unsigned int ak4613_rates[] = {
  363. 32000,
  364. 44100,
  365. 48000,
  366. 64000,
  367. 88200,
  368. 96000,
  369. 176400,
  370. 192000,
  371. };
  372. #define AK4613_CHANNEL_2 0
  373. #define AK4613_CHANNEL_4 1
  374. #define AK4613_CHANNEL_8 2
  375. #define AK4613_CHANNEL_12 3
  376. #define AK4613_CHANNEL_NONE -1
  377. static const unsigned int ak4613_channels[] = {
  378. [AK4613_CHANNEL_2] = 2,
  379. [AK4613_CHANNEL_4] = 4,
  380. [AK4613_CHANNEL_8] = 8,
  381. [AK4613_CHANNEL_12] = 12,
  382. };
  383. #define MODE_MAX 4
  384. #define SDTx_MAX 4
  385. #define MASK(x) (1 << AK4613_CHANNEL_##x)
  386. static const int mask_list[MODE_MAX][SDTx_MAX] = {
  387. /* SDTO SDTIx1 SDTIx2 SDTIx3 */
  388. [AK4613_CONFIG_MODE_STEREO] = { MASK(2), MASK(2), MASK(2), MASK(2)},
  389. [AK4613_CONFIG_MODE_TDM512] = { MASK(4), MASK(12), MASK(12), MASK(12)},
  390. [AK4613_CONFIG_MODE_TDM256] = { MASK(4), MASK(8), MASK(8)|MASK(12), MASK(8)|MASK(12)},
  391. [AK4613_CONFIG_MODE_TDM128] = { MASK(4), MASK(4), MASK(4)|MASK(8), MASK(4)|MASK(8)|MASK(12)},
  392. };
  393. struct snd_pcm_hw_constraint_list *constraint;
  394. unsigned int mask;
  395. unsigned int mode;
  396. unsigned int fs;
  397. int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  398. int sdti_num;
  399. int i;
  400. constraint = &priv->constraint_rates;
  401. constraint->list = ak4613_rates;
  402. constraint->mask = 0;
  403. constraint->count = 0;
  404. /*
  405. * Slave Mode
  406. * Normal: [32kHz, 48kHz] : 256fs,384fs or 512fs
  407. * Double: [64kHz, 96kHz] : 256fs
  408. * Quad : [128kHz,192kHz]: 128fs
  409. *
  410. * Master mode
  411. * Normal: [32kHz, 48kHz] : 256fs or 512fs
  412. * Double: [64kHz, 96kHz] : 256fs
  413. * Quad : [128kHz,192kHz]: 128fs
  414. */
  415. for (i = 0; i < ARRAY_SIZE(ak4613_rates); i++) {
  416. /* minimum fs on each range */
  417. fs = (ak4613_rates[i] <= 96000) ? 256 : 128;
  418. if (priv->sysclk >= ak4613_rates[i] * fs)
  419. constraint->count = i + 1;
  420. }
  421. snd_pcm_hw_constraint_list(runtime, 0,
  422. SNDRV_PCM_HW_PARAM_RATE, constraint);
  423. sdti_num = AK4613_CONFIG_SDTI_get(priv);
  424. if (WARN_ON(sdti_num >= SDTx_MAX))
  425. return;
  426. if (priv->cnt) {
  427. /*
  428. * If it was already working,
  429. * the constraint is same as working mode.
  430. */
  431. mode = AK4613_CTRL1_TO_MODE(priv);
  432. mask = 0; /* no default */
  433. } else {
  434. /*
  435. * It is not yet working,
  436. * the constraint is based on board configs.
  437. * STEREO mask is default
  438. */
  439. mode = AK4613_CONFIG_GET(priv, MODE);
  440. mask = mask_list[AK4613_CONFIG_MODE_STEREO][is_play * sdti_num];
  441. }
  442. if (WARN_ON(mode >= MODE_MAX))
  443. return;
  444. /* add each mode mask */
  445. mask |= mask_list[mode][is_play * sdti_num];
  446. constraint = &priv->constraint_channels;
  447. constraint->list = ak4613_channels;
  448. constraint->mask = mask;
  449. constraint->count = sizeof(ak4613_channels);
  450. snd_pcm_hw_constraint_list(runtime, 0,
  451. SNDRV_PCM_HW_PARAM_CHANNELS, constraint);
  452. }
  453. static int ak4613_dai_startup(struct snd_pcm_substream *substream,
  454. struct snd_soc_dai *dai)
  455. {
  456. struct snd_soc_component *component = dai->component;
  457. struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
  458. mutex_lock(&priv->lock);
  459. ak4613_hw_constraints(priv, substream);
  460. priv->cnt++;
  461. mutex_unlock(&priv->lock);
  462. return 0;
  463. }
  464. static int ak4613_dai_set_sysclk(struct snd_soc_dai *codec_dai,
  465. int clk_id, unsigned int freq, int dir)
  466. {
  467. struct snd_soc_component *component = codec_dai->component;
  468. struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
  469. priv->sysclk = freq;
  470. return 0;
  471. }
  472. static int ak4613_dai_set_fmt(struct snd_soc_dai *dai, unsigned int format)
  473. {
  474. struct snd_soc_component *component = dai->component;
  475. struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
  476. unsigned int fmt;
  477. fmt = format & SND_SOC_DAIFMT_FORMAT_MASK;
  478. switch (fmt) {
  479. case SND_SOC_DAIFMT_LEFT_J:
  480. case SND_SOC_DAIFMT_I2S:
  481. priv->fmt = fmt;
  482. break;
  483. default:
  484. return -EINVAL;
  485. }
  486. fmt = format & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK;
  487. switch (fmt) {
  488. case SND_SOC_DAIFMT_CBC_CFC:
  489. break;
  490. default:
  491. /*
  492. * SUPPORTME
  493. *
  494. * "clock provider" is not yet supperted
  495. */
  496. return -EINVAL;
  497. }
  498. return 0;
  499. }
  500. static int ak4613_dai_hw_params(struct snd_pcm_substream *substream,
  501. struct snd_pcm_hw_params *params,
  502. struct snd_soc_dai *dai)
  503. {
  504. struct snd_soc_component *component = dai->component;
  505. struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
  506. struct device *dev = component->dev;
  507. unsigned int width = params_width(params);
  508. unsigned int fmt = priv->fmt;
  509. unsigned int rate;
  510. int i, ret;
  511. u8 ctrl2;
  512. rate = params_rate(params);
  513. switch (rate) {
  514. case 32000:
  515. case 44100:
  516. case 48000:
  517. ctrl2 = DFS_NORMAL_SPEED;
  518. break;
  519. case 64000:
  520. case 88200:
  521. case 96000:
  522. ctrl2 = DFS_DOUBLE_SPEED;
  523. break;
  524. case 176400:
  525. case 192000:
  526. ctrl2 = DFS_QUAD_SPEED;
  527. break;
  528. default:
  529. return -EINVAL;
  530. }
  531. priv->rate = rate;
  532. /*
  533. * FIXME
  534. *
  535. * It doesn't have full TDM suppert yet
  536. */
  537. ret = -EINVAL;
  538. mutex_lock(&priv->lock);
  539. if (priv->cnt > 1) {
  540. /*
  541. * If it was already working, use current priv->ctrl1
  542. */
  543. ret = 0;
  544. } else {
  545. /*
  546. * It is not yet working,
  547. */
  548. unsigned int channel = params_channels(params);
  549. u8 tdm;
  550. /* STEREO or TDM */
  551. if (channel == 2)
  552. tdm = AK4613_CONFIG_MODE_STEREO;
  553. else
  554. tdm = AK4613_CONFIG_GET(priv, MODE);
  555. for (i = ARRAY_SIZE(ak4613_iface) - 1; i >= 0; i--) {
  556. const struct ak4613_interface *iface = ak4613_iface + i;
  557. if ((iface->fmt == fmt) && (iface->width == width)) {
  558. /*
  559. * Ctrl1
  560. * | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
  561. * |TDM1|TDM0|DIF2|DIF1|DIF0|ATS1|ATS0|SMUTE|
  562. * < tdm > < iface->dif >
  563. */
  564. priv->ctrl1 = (tdm << 6) | (iface->dif << 3);
  565. ret = 0;
  566. break;
  567. }
  568. }
  569. }
  570. mutex_unlock(&priv->lock);
  571. if (ret < 0)
  572. goto hw_params_end;
  573. snd_soc_component_update_bits(component, CTRL1, FMT_MASK, priv->ctrl1);
  574. snd_soc_component_update_bits(component, CTRL2, DFS_MASK, ctrl2);
  575. snd_soc_component_update_bits(component, ICTRL, ICTRL_MASK, priv->ic);
  576. snd_soc_component_update_bits(component, OCTRL, OCTRL_MASK, priv->oc);
  577. hw_params_end:
  578. if (ret < 0)
  579. dev_warn(dev, "unsupported data width/format combination\n");
  580. return ret;
  581. }
  582. static int ak4613_set_bias_level(struct snd_soc_component *component,
  583. enum snd_soc_bias_level level)
  584. {
  585. u8 mgmt1 = 0;
  586. switch (level) {
  587. case SND_SOC_BIAS_ON:
  588. mgmt1 |= RSTN;
  589. fallthrough;
  590. case SND_SOC_BIAS_PREPARE:
  591. mgmt1 |= PMADC | PMDAC;
  592. fallthrough;
  593. case SND_SOC_BIAS_STANDBY:
  594. mgmt1 |= PMVR;
  595. fallthrough;
  596. case SND_SOC_BIAS_OFF:
  597. default:
  598. break;
  599. }
  600. snd_soc_component_write(component, PW_MGMT1, mgmt1);
  601. return 0;
  602. }
  603. static void ak4613_dummy_write(struct work_struct *work)
  604. {
  605. struct ak4613_priv *priv = container_of(work,
  606. struct ak4613_priv,
  607. dummy_write_work);
  608. struct snd_soc_component *component = priv->component;
  609. unsigned int mgmt1;
  610. unsigned int mgmt3;
  611. /*
  612. * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
  613. *
  614. * Note
  615. *
  616. * To avoid extra delay, we want to avoid preemption here,
  617. * but we can't. Because it uses I2C access which is using IRQ
  618. * and sleep. Thus, delay might be more than 5 LR clocks
  619. * see also
  620. * ak4613_dai_trigger()
  621. */
  622. udelay(5000000 / priv->rate);
  623. mgmt1 = snd_soc_component_read(component, PW_MGMT1);
  624. mgmt3 = snd_soc_component_read(component, PW_MGMT3);
  625. snd_soc_component_write(component, PW_MGMT1, mgmt1);
  626. snd_soc_component_write(component, PW_MGMT3, mgmt3);
  627. }
  628. static int ak4613_dai_trigger(struct snd_pcm_substream *substream, int cmd,
  629. struct snd_soc_dai *dai)
  630. {
  631. struct snd_soc_component *component = dai->component;
  632. struct ak4613_priv *priv = snd_soc_component_get_drvdata(component);
  633. /*
  634. * FIXME
  635. *
  636. * PW_MGMT1 / PW_MGMT3 needs dummy write at least after 5 LR clocks
  637. * from Power Down Release. Otherwise, Playback volume will be 0dB.
  638. * To avoid complex multiple delay/dummy_write method from
  639. * ak4613_set_bias_level() / SND_SOC_DAPM_DAC_E("DACx", ...),
  640. * call it once here.
  641. *
  642. * But, unfortunately, we can't "write" here because here is atomic
  643. * context (It uses I2C access for writing).
  644. * Thus, use schedule_work() to switching to normal context
  645. * immediately.
  646. *
  647. * Note
  648. *
  649. * Calling ak4613_dummy_write() function might be delayed.
  650. * In such case, ak4613 volume might be temporarily 0dB when
  651. * beggining of playback.
  652. * see also
  653. * ak4613_dummy_write()
  654. */
  655. if ((cmd != SNDRV_PCM_TRIGGER_START) &&
  656. (cmd != SNDRV_PCM_TRIGGER_RESUME))
  657. return 0;
  658. if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
  659. return 0;
  660. priv->component = component;
  661. schedule_work(&priv->dummy_write_work);
  662. return 0;
  663. }
  664. /*
  665. * Select below from Sound Card, not Auto
  666. * SND_SOC_DAIFMT_CBC_CFC
  667. * SND_SOC_DAIFMT_CBP_CFP
  668. */
  669. static u64 ak4613_dai_formats =
  670. SND_SOC_POSSIBLE_DAIFMT_I2S |
  671. SND_SOC_POSSIBLE_DAIFMT_LEFT_J;
  672. static const struct snd_soc_dai_ops ak4613_dai_ops = {
  673. .startup = ak4613_dai_startup,
  674. .shutdown = ak4613_dai_shutdown,
  675. .set_sysclk = ak4613_dai_set_sysclk,
  676. .set_fmt = ak4613_dai_set_fmt,
  677. .trigger = ak4613_dai_trigger,
  678. .hw_params = ak4613_dai_hw_params,
  679. .auto_selectable_formats = &ak4613_dai_formats,
  680. .num_auto_selectable_formats = 1,
  681. };
  682. #define AK4613_PCM_RATE (SNDRV_PCM_RATE_32000 |\
  683. SNDRV_PCM_RATE_44100 |\
  684. SNDRV_PCM_RATE_48000 |\
  685. SNDRV_PCM_RATE_64000 |\
  686. SNDRV_PCM_RATE_88200 |\
  687. SNDRV_PCM_RATE_96000 |\
  688. SNDRV_PCM_RATE_176400 |\
  689. SNDRV_PCM_RATE_192000)
  690. #define AK4613_PCM_FMTBIT (SNDRV_PCM_FMTBIT_S24_LE)
  691. static struct snd_soc_dai_driver ak4613_dai = {
  692. .name = "ak4613-hifi",
  693. .playback = {
  694. .stream_name = "Playback",
  695. .channels_min = 2,
  696. .channels_max = 12,
  697. .rates = AK4613_PCM_RATE,
  698. .formats = AK4613_PCM_FMTBIT,
  699. },
  700. .capture = {
  701. .stream_name = "Capture",
  702. .channels_min = 2,
  703. .channels_max = 4,
  704. .rates = AK4613_PCM_RATE,
  705. .formats = AK4613_PCM_FMTBIT,
  706. },
  707. .ops = &ak4613_dai_ops,
  708. .symmetric_rate = 1,
  709. };
  710. static int ak4613_suspend(struct snd_soc_component *component)
  711. {
  712. struct regmap *regmap = dev_get_regmap(component->dev, NULL);
  713. regcache_cache_only(regmap, true);
  714. regcache_mark_dirty(regmap);
  715. return 0;
  716. }
  717. static int ak4613_resume(struct snd_soc_component *component)
  718. {
  719. struct regmap *regmap = dev_get_regmap(component->dev, NULL);
  720. regcache_cache_only(regmap, false);
  721. return regcache_sync(regmap);
  722. }
  723. static const struct snd_soc_component_driver soc_component_dev_ak4613 = {
  724. .suspend = ak4613_suspend,
  725. .resume = ak4613_resume,
  726. .set_bias_level = ak4613_set_bias_level,
  727. .controls = ak4613_snd_controls,
  728. .num_controls = ARRAY_SIZE(ak4613_snd_controls),
  729. .dapm_widgets = ak4613_dapm_widgets,
  730. .num_dapm_widgets = ARRAY_SIZE(ak4613_dapm_widgets),
  731. .dapm_routes = ak4613_intercon,
  732. .num_dapm_routes = ARRAY_SIZE(ak4613_intercon),
  733. .idle_bias_on = 1,
  734. .endianness = 1,
  735. };
  736. static void ak4613_parse_of(struct ak4613_priv *priv,
  737. struct device *dev)
  738. {
  739. struct device_node *np = dev->of_node;
  740. char prop[32];
  741. int sdti_num;
  742. int i;
  743. /* Input 1 - 2 */
  744. for (i = 0; i < 2; i++) {
  745. snprintf(prop, sizeof(prop), "asahi-kasei,in%d-single-end", i + 1);
  746. if (!of_get_property(np, prop, NULL))
  747. priv->ic |= 1 << i;
  748. }
  749. /* Output 1 - 6 */
  750. for (i = 0; i < 6; i++) {
  751. snprintf(prop, sizeof(prop), "asahi-kasei,out%d-single-end", i + 1);
  752. if (!of_get_property(np, prop, NULL))
  753. priv->oc |= 1 << i;
  754. }
  755. /*
  756. * enable TDM256 test
  757. *
  758. * !!! FIXME !!!
  759. *
  760. * It should be configured by DT or other way
  761. * if it was full supported.
  762. * But it is using ifdef style for now for test
  763. * purpose.
  764. */
  765. #if defined(AK4613_ENABLE_TDM_TEST)
  766. AK4613_CONFIG_SET(priv, MODE_TDM256);
  767. #endif
  768. /*
  769. * connected STDI
  770. * TDM support is assuming it is probed via Audio-Graph-Card style here.
  771. * Default is SDTIx1 if it was probed via Simple-Audio-Card for now.
  772. */
  773. sdti_num = of_graph_get_endpoint_count(np);
  774. if ((sdti_num >= SDTx_MAX) || (sdti_num < 1))
  775. sdti_num = 1;
  776. AK4613_CONFIG_SDTI_set(priv, sdti_num);
  777. }
  778. static int ak4613_i2c_probe(struct i2c_client *i2c)
  779. {
  780. struct device *dev = &i2c->dev;
  781. struct device_node *np = dev->of_node;
  782. const struct regmap_config *regmap_cfg;
  783. struct regmap *regmap;
  784. struct ak4613_priv *priv;
  785. regmap_cfg = NULL;
  786. if (np)
  787. regmap_cfg = of_device_get_match_data(dev);
  788. else {
  789. const struct i2c_device_id *id =
  790. i2c_match_id(ak4613_i2c_id, i2c);
  791. regmap_cfg = (const struct regmap_config *)id->driver_data;
  792. }
  793. if (!regmap_cfg)
  794. return -EINVAL;
  795. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  796. if (!priv)
  797. return -ENOMEM;
  798. ak4613_parse_of(priv, dev);
  799. priv->ctrl1 = 0;
  800. priv->cnt = 0;
  801. priv->sysclk = 0;
  802. INIT_WORK(&priv->dummy_write_work, ak4613_dummy_write);
  803. mutex_init(&priv->lock);
  804. i2c_set_clientdata(i2c, priv);
  805. regmap = devm_regmap_init_i2c(i2c, regmap_cfg);
  806. if (IS_ERR(regmap))
  807. return PTR_ERR(regmap);
  808. return devm_snd_soc_register_component(dev, &soc_component_dev_ak4613,
  809. &ak4613_dai, 1);
  810. }
  811. static struct i2c_driver ak4613_i2c_driver = {
  812. .driver = {
  813. .name = "ak4613-codec",
  814. .of_match_table = ak4613_of_match,
  815. },
  816. .probe_new = ak4613_i2c_probe,
  817. .id_table = ak4613_i2c_id,
  818. };
  819. module_i2c_driver(ak4613_i2c_driver);
  820. MODULE_DESCRIPTION("Soc AK4613 driver");
  821. MODULE_AUTHOR("Kuninori Morimoto <[email protected]>");
  822. MODULE_LICENSE("GPL v2");