psc-ac97.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Au12x0/Au1550 PSC ALSA ASoC audio support.
  4. *
  5. * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
  6. * Manuel Lauss <[email protected]>
  7. *
  8. * Au1xxx-PSC AC97 glue.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <linux/device.h>
  14. #include <linux/delay.h>
  15. #include <linux/mutex.h>
  16. #include <linux/suspend.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/initval.h>
  20. #include <sound/soc.h>
  21. #include <asm/mach-au1x00/au1000.h>
  22. #include <asm/mach-au1x00/au1xxx_psc.h>
  23. #include "psc.h"
  24. /* how often to retry failed codec register reads/writes */
  25. #define AC97_RW_RETRIES 5
  26. #define AC97_DIR \
  27. (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  28. #define AC97_RATES \
  29. SNDRV_PCM_RATE_8000_48000
  30. #define AC97_FMTS \
  31. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
  32. #define AC97PCR_START(stype) \
  33. ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
  34. #define AC97PCR_STOP(stype) \
  35. ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
  36. #define AC97PCR_CLRFIFO(stype) \
  37. ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
  38. #define AC97STAT_BUSY(stype) \
  39. ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
  40. /* instance data. There can be only one, MacLeod!!!! */
  41. static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
  42. #if 0
  43. /* this could theoretically work, but ac97->bus->card->private_data can be NULL
  44. * when snd_ac97_mixer() is called; I don't know if the rest further down the
  45. * chain are always valid either.
  46. */
  47. static inline struct au1xpsc_audio_data *ac97_to_pscdata(struct snd_ac97 *x)
  48. {
  49. struct snd_soc_card *c = x->bus->card->private_data;
  50. return snd_soc_dai_get_drvdata(c->asoc_rtd_to_cpu(rtd, 0));
  51. }
  52. #else
  53. #define ac97_to_pscdata(x) au1xpsc_ac97_workdata
  54. #endif
  55. /* AC97 controller reads codec register */
  56. static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
  57. unsigned short reg)
  58. {
  59. struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
  60. unsigned short retry, tmo;
  61. unsigned long data;
  62. __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  63. wmb(); /* drain writebuffer */
  64. retry = AC97_RW_RETRIES;
  65. do {
  66. mutex_lock(&pscdata->lock);
  67. __raw_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
  68. AC97_CDC(pscdata));
  69. wmb(); /* drain writebuffer */
  70. tmo = 20;
  71. do {
  72. udelay(21);
  73. if (__raw_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
  74. break;
  75. } while (--tmo);
  76. data = __raw_readl(AC97_CDC(pscdata));
  77. __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  78. wmb(); /* drain writebuffer */
  79. mutex_unlock(&pscdata->lock);
  80. if (reg != ((data >> 16) & 0x7f))
  81. tmo = 1; /* wrong register, try again */
  82. } while (--retry && !tmo);
  83. return retry ? data & 0xffff : 0xffff;
  84. }
  85. /* AC97 controller writes to codec register */
  86. static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  87. unsigned short val)
  88. {
  89. struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
  90. unsigned int tmo, retry;
  91. __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  92. wmb(); /* drain writebuffer */
  93. retry = AC97_RW_RETRIES;
  94. do {
  95. mutex_lock(&pscdata->lock);
  96. __raw_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
  97. AC97_CDC(pscdata));
  98. wmb(); /* drain writebuffer */
  99. tmo = 20;
  100. do {
  101. udelay(21);
  102. if (__raw_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
  103. break;
  104. } while (--tmo);
  105. __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  106. wmb(); /* drain writebuffer */
  107. mutex_unlock(&pscdata->lock);
  108. } while (--retry && !tmo);
  109. }
  110. /* AC97 controller asserts a warm reset */
  111. static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
  112. {
  113. struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
  114. __raw_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
  115. wmb(); /* drain writebuffer */
  116. msleep(10);
  117. __raw_writel(0, AC97_RST(pscdata));
  118. wmb(); /* drain writebuffer */
  119. }
  120. static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
  121. {
  122. struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
  123. int i;
  124. /* disable PSC during cold reset */
  125. __raw_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
  126. wmb(); /* drain writebuffer */
  127. __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
  128. wmb(); /* drain writebuffer */
  129. /* issue cold reset */
  130. __raw_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
  131. wmb(); /* drain writebuffer */
  132. msleep(500);
  133. __raw_writel(0, AC97_RST(pscdata));
  134. wmb(); /* drain writebuffer */
  135. /* enable PSC */
  136. __raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
  137. wmb(); /* drain writebuffer */
  138. /* wait for PSC to indicate it's ready */
  139. i = 1000;
  140. while (!((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
  141. msleep(1);
  142. if (i == 0) {
  143. printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
  144. return;
  145. }
  146. /* enable the ac97 function */
  147. __raw_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
  148. wmb(); /* drain writebuffer */
  149. /* wait for AC97 core to become ready */
  150. i = 1000;
  151. while (!((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
  152. msleep(1);
  153. if (i == 0)
  154. printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
  155. }
  156. /* AC97 controller operations */
  157. static struct snd_ac97_bus_ops psc_ac97_ops = {
  158. .read = au1xpsc_ac97_read,
  159. .write = au1xpsc_ac97_write,
  160. .reset = au1xpsc_ac97_cold_reset,
  161. .warm_reset = au1xpsc_ac97_warm_reset,
  162. };
  163. static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
  164. struct snd_pcm_hw_params *params,
  165. struct snd_soc_dai *dai)
  166. {
  167. struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
  168. unsigned long r, ro, stat;
  169. int chans, t, stype = substream->stream;
  170. chans = params_channels(params);
  171. r = ro = __raw_readl(AC97_CFG(pscdata));
  172. stat = __raw_readl(AC97_STAT(pscdata));
  173. /* already active? */
  174. if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
  175. /* reject parameters not currently set up */
  176. if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
  177. (pscdata->rate != params_rate(params)))
  178. return -EINVAL;
  179. } else {
  180. /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
  181. r &= ~PSC_AC97CFG_LEN_MASK;
  182. r |= PSC_AC97CFG_SET_LEN(params->msbits);
  183. /* channels: enable slots for front L/R channel */
  184. if (stype == SNDRV_PCM_STREAM_PLAYBACK) {
  185. r &= ~PSC_AC97CFG_TXSLOT_MASK;
  186. r |= PSC_AC97CFG_TXSLOT_ENA(3);
  187. r |= PSC_AC97CFG_TXSLOT_ENA(4);
  188. } else {
  189. r &= ~PSC_AC97CFG_RXSLOT_MASK;
  190. r |= PSC_AC97CFG_RXSLOT_ENA(3);
  191. r |= PSC_AC97CFG_RXSLOT_ENA(4);
  192. }
  193. /* do we need to poke the hardware? */
  194. if (!(r ^ ro))
  195. goto out;
  196. /* ac97 engine is about to be disabled */
  197. mutex_lock(&pscdata->lock);
  198. /* disable AC97 device controller first... */
  199. __raw_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
  200. wmb(); /* drain writebuffer */
  201. /* ...wait for it... */
  202. t = 100;
  203. while ((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t)
  204. msleep(1);
  205. if (!t)
  206. printk(KERN_ERR "PSC-AC97: can't disable!\n");
  207. /* ...write config... */
  208. __raw_writel(r, AC97_CFG(pscdata));
  209. wmb(); /* drain writebuffer */
  210. /* ...enable the AC97 controller again... */
  211. __raw_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
  212. wmb(); /* drain writebuffer */
  213. /* ...and wait for ready bit */
  214. t = 100;
  215. while ((!(__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t)
  216. msleep(1);
  217. if (!t)
  218. printk(KERN_ERR "PSC-AC97: can't enable!\n");
  219. mutex_unlock(&pscdata->lock);
  220. pscdata->cfg = r;
  221. pscdata->rate = params_rate(params);
  222. }
  223. out:
  224. return 0;
  225. }
  226. static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
  227. int cmd, struct snd_soc_dai *dai)
  228. {
  229. struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
  230. int ret, stype = substream->stream;
  231. ret = 0;
  232. switch (cmd) {
  233. case SNDRV_PCM_TRIGGER_START:
  234. case SNDRV_PCM_TRIGGER_RESUME:
  235. __raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
  236. wmb(); /* drain writebuffer */
  237. __raw_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
  238. wmb(); /* drain writebuffer */
  239. break;
  240. case SNDRV_PCM_TRIGGER_STOP:
  241. case SNDRV_PCM_TRIGGER_SUSPEND:
  242. __raw_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
  243. wmb(); /* drain writebuffer */
  244. while (__raw_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
  245. asm volatile ("nop");
  246. __raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
  247. wmb(); /* drain writebuffer */
  248. break;
  249. default:
  250. ret = -EINVAL;
  251. }
  252. return ret;
  253. }
  254. static int au1xpsc_ac97_startup(struct snd_pcm_substream *substream,
  255. struct snd_soc_dai *dai)
  256. {
  257. struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
  258. snd_soc_dai_set_dma_data(dai, substream, &pscdata->dmaids[0]);
  259. return 0;
  260. }
  261. static int au1xpsc_ac97_probe(struct snd_soc_dai *dai)
  262. {
  263. return au1xpsc_ac97_workdata ? 0 : -ENODEV;
  264. }
  265. static const struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
  266. .startup = au1xpsc_ac97_startup,
  267. .trigger = au1xpsc_ac97_trigger,
  268. .hw_params = au1xpsc_ac97_hw_params,
  269. };
  270. static const struct snd_soc_dai_driver au1xpsc_ac97_dai_template = {
  271. .probe = au1xpsc_ac97_probe,
  272. .playback = {
  273. .rates = AC97_RATES,
  274. .formats = AC97_FMTS,
  275. .channels_min = 2,
  276. .channels_max = 2,
  277. },
  278. .capture = {
  279. .rates = AC97_RATES,
  280. .formats = AC97_FMTS,
  281. .channels_min = 2,
  282. .channels_max = 2,
  283. },
  284. .ops = &au1xpsc_ac97_dai_ops,
  285. };
  286. static const struct snd_soc_component_driver au1xpsc_ac97_component = {
  287. .name = "au1xpsc-ac97",
  288. .legacy_dai_naming = 1,
  289. };
  290. static int au1xpsc_ac97_drvprobe(struct platform_device *pdev)
  291. {
  292. int ret;
  293. struct resource *dmares;
  294. unsigned long sel;
  295. struct au1xpsc_audio_data *wd;
  296. wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data),
  297. GFP_KERNEL);
  298. if (!wd)
  299. return -ENOMEM;
  300. mutex_init(&wd->lock);
  301. wd->mmio = devm_platform_ioremap_resource(pdev, 0);
  302. if (IS_ERR(wd->mmio))
  303. return PTR_ERR(wd->mmio);
  304. dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  305. if (!dmares)
  306. return -EBUSY;
  307. wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start;
  308. dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  309. if (!dmares)
  310. return -EBUSY;
  311. wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start;
  312. /* configuration: max dma trigger threshold, enable ac97 */
  313. wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 |
  314. PSC_AC97CFG_DE_ENABLE;
  315. /* preserve PSC clock source set up by platform */
  316. sel = __raw_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
  317. __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  318. wmb(); /* drain writebuffer */
  319. __raw_writel(0, PSC_SEL(wd));
  320. wmb(); /* drain writebuffer */
  321. __raw_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd));
  322. wmb(); /* drain writebuffer */
  323. /* name the DAI like this device instance ("au1xpsc-ac97.PSCINDEX") */
  324. memcpy(&wd->dai_drv, &au1xpsc_ac97_dai_template,
  325. sizeof(struct snd_soc_dai_driver));
  326. wd->dai_drv.name = dev_name(&pdev->dev);
  327. platform_set_drvdata(pdev, wd);
  328. ret = snd_soc_set_ac97_ops(&psc_ac97_ops);
  329. if (ret)
  330. return ret;
  331. ret = snd_soc_register_component(&pdev->dev, &au1xpsc_ac97_component,
  332. &wd->dai_drv, 1);
  333. if (ret)
  334. return ret;
  335. au1xpsc_ac97_workdata = wd;
  336. return 0;
  337. }
  338. static int au1xpsc_ac97_drvremove(struct platform_device *pdev)
  339. {
  340. struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
  341. snd_soc_unregister_component(&pdev->dev);
  342. /* disable PSC completely */
  343. __raw_writel(0, AC97_CFG(wd));
  344. wmb(); /* drain writebuffer */
  345. __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  346. wmb(); /* drain writebuffer */
  347. au1xpsc_ac97_workdata = NULL; /* MDEV */
  348. return 0;
  349. }
  350. #ifdef CONFIG_PM
  351. static int au1xpsc_ac97_drvsuspend(struct device *dev)
  352. {
  353. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  354. /* save interesting registers and disable PSC */
  355. wd->pm[0] = __raw_readl(PSC_SEL(wd));
  356. __raw_writel(0, AC97_CFG(wd));
  357. wmb(); /* drain writebuffer */
  358. __raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  359. wmb(); /* drain writebuffer */
  360. return 0;
  361. }
  362. static int au1xpsc_ac97_drvresume(struct device *dev)
  363. {
  364. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  365. /* restore PSC clock config */
  366. __raw_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd));
  367. wmb(); /* drain writebuffer */
  368. /* after this point the ac97 core will cold-reset the codec.
  369. * During cold-reset the PSC is reinitialized and the last
  370. * configuration set up in hw_params() is restored.
  371. */
  372. return 0;
  373. }
  374. static const struct dev_pm_ops au1xpscac97_pmops = {
  375. .suspend = au1xpsc_ac97_drvsuspend,
  376. .resume = au1xpsc_ac97_drvresume,
  377. };
  378. #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
  379. #else
  380. #define AU1XPSCAC97_PMOPS NULL
  381. #endif
  382. static struct platform_driver au1xpsc_ac97_driver = {
  383. .driver = {
  384. .name = "au1xpsc_ac97",
  385. .pm = AU1XPSCAC97_PMOPS,
  386. },
  387. .probe = au1xpsc_ac97_drvprobe,
  388. .remove = au1xpsc_ac97_drvremove,
  389. };
  390. module_platform_driver(au1xpsc_ac97_driver);
  391. MODULE_LICENSE("GPL");
  392. MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
  393. MODULE_AUTHOR("Manuel Lauss");