via82xx.c 75 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for VIA VT82xx (South Bridge)
  4. *
  5. * VT82C686A/B/C, VT8233A/C, VT8235
  6. *
  7. * Copyright (c) 2000 Jaroslav Kysela <[email protected]>
  8. * Tjeerd.Mulder <[email protected]>
  9. * 2002 Takashi Iwai <[email protected]>
  10. */
  11. /*
  12. * Changes:
  13. *
  14. * Dec. 19, 2002 Takashi Iwai <[email protected]>
  15. * - use the DSX channels for the first pcm playback.
  16. * (on VIA8233, 8233C and 8235 only)
  17. * this will allow you play simultaneously up to 4 streams.
  18. * multi-channel playback is assigned to the second device
  19. * on these chips.
  20. * - support the secondary capture (on VIA8233/C,8235)
  21. * - SPDIF support
  22. * the DSX3 channel can be used for SPDIF output.
  23. * on VIA8233A, this channel is assigned to the second pcm
  24. * playback.
  25. * the card config of alsa-lib will assign the correct
  26. * device for applications.
  27. * - clean up the code, separate low-level initialization
  28. * routines for each chipset.
  29. *
  30. * Sep. 26, 2005 Karsten Wiese <[email protected]>
  31. * - Optimize position calculation for the 823x chips.
  32. */
  33. #include <linux/io.h>
  34. #include <linux/delay.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/init.h>
  37. #include <linux/pci.h>
  38. #include <linux/slab.h>
  39. #include <linux/gameport.h>
  40. #include <linux/module.h>
  41. #include <sound/core.h>
  42. #include <sound/pcm.h>
  43. #include <sound/pcm_params.h>
  44. #include <sound/info.h>
  45. #include <sound/tlv.h>
  46. #include <sound/ac97_codec.h>
  47. #include <sound/mpu401.h>
  48. #include <sound/initval.h>
  49. #if 0
  50. #define POINTER_DEBUG
  51. #endif
  52. MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
  53. MODULE_DESCRIPTION("VIA VT82xx audio");
  54. MODULE_LICENSE("GPL");
  55. #if IS_REACHABLE(CONFIG_GAMEPORT)
  56. #define SUPPORT_JOYSTICK 1
  57. #endif
  58. static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
  59. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  60. static long mpu_port;
  61. #ifdef SUPPORT_JOYSTICK
  62. static bool joystick;
  63. #endif
  64. static int ac97_clock = 48000;
  65. static char *ac97_quirk;
  66. static int dxs_support;
  67. static int dxs_init_volume = 31;
  68. static int nodelay;
  69. module_param(index, int, 0444);
  70. MODULE_PARM_DESC(index, "Index value for VIA 82xx bridge.");
  71. module_param(id, charp, 0444);
  72. MODULE_PARM_DESC(id, "ID string for VIA 82xx bridge.");
  73. module_param_hw(mpu_port, long, ioport, 0444);
  74. MODULE_PARM_DESC(mpu_port, "MPU-401 port. (VT82C686x only)");
  75. #ifdef SUPPORT_JOYSTICK
  76. module_param(joystick, bool, 0444);
  77. MODULE_PARM_DESC(joystick, "Enable joystick. (VT82C686x only)");
  78. #endif
  79. module_param(ac97_clock, int, 0444);
  80. MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
  81. module_param(ac97_quirk, charp, 0444);
  82. MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
  83. module_param(dxs_support, int, 0444);
  84. MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k only, 4 = no VRA, 5 = enable any sample rate)");
  85. module_param(dxs_init_volume, int, 0644);
  86. MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
  87. module_param(nodelay, int, 0444);
  88. MODULE_PARM_DESC(nodelay, "Disable 500ms init delay");
  89. /* just for backward compatibility */
  90. static bool enable;
  91. module_param(enable, bool, 0444);
  92. /* revision numbers for via686 */
  93. #define VIA_REV_686_A 0x10
  94. #define VIA_REV_686_B 0x11
  95. #define VIA_REV_686_C 0x12
  96. #define VIA_REV_686_D 0x13
  97. #define VIA_REV_686_E 0x14
  98. #define VIA_REV_686_H 0x20
  99. /* revision numbers for via8233 */
  100. #define VIA_REV_PRE_8233 0x10 /* not in market */
  101. #define VIA_REV_8233C 0x20 /* 2 rec, 4 pb, 1 multi-pb */
  102. #define VIA_REV_8233 0x30 /* 2 rec, 4 pb, 1 multi-pb, spdif */
  103. #define VIA_REV_8233A 0x40 /* 1 rec, 1 multi-pb, spdf */
  104. #define VIA_REV_8235 0x50 /* 2 rec, 4 pb, 1 multi-pb, spdif */
  105. #define VIA_REV_8237 0x60
  106. #define VIA_REV_8251 0x70
  107. /*
  108. * Direct registers
  109. */
  110. #define VIAREG(via, x) ((via)->port + VIA_REG_##x)
  111. #define VIADEV_REG(viadev, x) ((viadev)->port + VIA_REG_##x)
  112. /* common offsets */
  113. #define VIA_REG_OFFSET_STATUS 0x00 /* byte - channel status */
  114. #define VIA_REG_STAT_ACTIVE 0x80 /* RO */
  115. #define VIA8233_SHADOW_STAT_ACTIVE 0x08 /* RO */
  116. #define VIA_REG_STAT_PAUSED 0x40 /* RO */
  117. #define VIA_REG_STAT_TRIGGER_QUEUED 0x08 /* RO */
  118. #define VIA_REG_STAT_STOPPED 0x04 /* RWC */
  119. #define VIA_REG_STAT_EOL 0x02 /* RWC */
  120. #define VIA_REG_STAT_FLAG 0x01 /* RWC */
  121. #define VIA_REG_OFFSET_CONTROL 0x01 /* byte - channel control */
  122. #define VIA_REG_CTRL_START 0x80 /* WO */
  123. #define VIA_REG_CTRL_TERMINATE 0x40 /* WO */
  124. #define VIA_REG_CTRL_AUTOSTART 0x20
  125. #define VIA_REG_CTRL_PAUSE 0x08 /* RW */
  126. #define VIA_REG_CTRL_INT_STOP 0x04
  127. #define VIA_REG_CTRL_INT_EOL 0x02
  128. #define VIA_REG_CTRL_INT_FLAG 0x01
  129. #define VIA_REG_CTRL_RESET 0x01 /* RW - probably reset? undocumented */
  130. #define VIA_REG_CTRL_INT (VIA_REG_CTRL_INT_FLAG | VIA_REG_CTRL_INT_EOL | VIA_REG_CTRL_AUTOSTART)
  131. #define VIA_REG_OFFSET_TYPE 0x02 /* byte - channel type (686 only) */
  132. #define VIA_REG_TYPE_AUTOSTART 0x80 /* RW - autostart at EOL */
  133. #define VIA_REG_TYPE_16BIT 0x20 /* RW */
  134. #define VIA_REG_TYPE_STEREO 0x10 /* RW */
  135. #define VIA_REG_TYPE_INT_LLINE 0x00
  136. #define VIA_REG_TYPE_INT_LSAMPLE 0x04
  137. #define VIA_REG_TYPE_INT_LESSONE 0x08
  138. #define VIA_REG_TYPE_INT_MASK 0x0c
  139. #define VIA_REG_TYPE_INT_EOL 0x02
  140. #define VIA_REG_TYPE_INT_FLAG 0x01
  141. #define VIA_REG_OFFSET_TABLE_PTR 0x04 /* dword - channel table pointer */
  142. #define VIA_REG_OFFSET_CURR_PTR 0x04 /* dword - channel current pointer */
  143. #define VIA_REG_OFFSET_STOP_IDX 0x08 /* dword - stop index, channel type, sample rate */
  144. #define VIA8233_REG_TYPE_16BIT 0x00200000 /* RW */
  145. #define VIA8233_REG_TYPE_STEREO 0x00100000 /* RW */
  146. #define VIA_REG_OFFSET_CURR_COUNT 0x0c /* dword - channel current count (24 bit) */
  147. #define VIA_REG_OFFSET_CURR_INDEX 0x0f /* byte - channel current index (for via8233 only) */
  148. #define DEFINE_VIA_REGSET(name,val) \
  149. enum {\
  150. VIA_REG_##name##_STATUS = (val),\
  151. VIA_REG_##name##_CONTROL = (val) + 0x01,\
  152. VIA_REG_##name##_TYPE = (val) + 0x02,\
  153. VIA_REG_##name##_TABLE_PTR = (val) + 0x04,\
  154. VIA_REG_##name##_CURR_PTR = (val) + 0x04,\
  155. VIA_REG_##name##_STOP_IDX = (val) + 0x08,\
  156. VIA_REG_##name##_CURR_COUNT = (val) + 0x0c,\
  157. }
  158. /* playback block */
  159. DEFINE_VIA_REGSET(PLAYBACK, 0x00);
  160. DEFINE_VIA_REGSET(CAPTURE, 0x10);
  161. DEFINE_VIA_REGSET(FM, 0x20);
  162. /* AC'97 */
  163. #define VIA_REG_AC97 0x80 /* dword */
  164. #define VIA_REG_AC97_CODEC_ID_MASK (3<<30)
  165. #define VIA_REG_AC97_CODEC_ID_SHIFT 30
  166. #define VIA_REG_AC97_CODEC_ID_PRIMARY 0x00
  167. #define VIA_REG_AC97_CODEC_ID_SECONDARY 0x01
  168. #define VIA_REG_AC97_SECONDARY_VALID (1<<27)
  169. #define VIA_REG_AC97_PRIMARY_VALID (1<<25)
  170. #define VIA_REG_AC97_BUSY (1<<24)
  171. #define VIA_REG_AC97_READ (1<<23)
  172. #define VIA_REG_AC97_CMD_SHIFT 16
  173. #define VIA_REG_AC97_CMD_MASK 0x7e
  174. #define VIA_REG_AC97_DATA_SHIFT 0
  175. #define VIA_REG_AC97_DATA_MASK 0xffff
  176. #define VIA_REG_SGD_SHADOW 0x84 /* dword */
  177. /* via686 */
  178. #define VIA_REG_SGD_STAT_PB_FLAG (1<<0)
  179. #define VIA_REG_SGD_STAT_CP_FLAG (1<<1)
  180. #define VIA_REG_SGD_STAT_FM_FLAG (1<<2)
  181. #define VIA_REG_SGD_STAT_PB_EOL (1<<4)
  182. #define VIA_REG_SGD_STAT_CP_EOL (1<<5)
  183. #define VIA_REG_SGD_STAT_FM_EOL (1<<6)
  184. #define VIA_REG_SGD_STAT_PB_STOP (1<<8)
  185. #define VIA_REG_SGD_STAT_CP_STOP (1<<9)
  186. #define VIA_REG_SGD_STAT_FM_STOP (1<<10)
  187. #define VIA_REG_SGD_STAT_PB_ACTIVE (1<<12)
  188. #define VIA_REG_SGD_STAT_CP_ACTIVE (1<<13)
  189. #define VIA_REG_SGD_STAT_FM_ACTIVE (1<<14)
  190. /* via8233 */
  191. #define VIA8233_REG_SGD_STAT_FLAG (1<<0)
  192. #define VIA8233_REG_SGD_STAT_EOL (1<<1)
  193. #define VIA8233_REG_SGD_STAT_STOP (1<<2)
  194. #define VIA8233_REG_SGD_STAT_ACTIVE (1<<3)
  195. #define VIA8233_INTR_MASK(chan) ((VIA8233_REG_SGD_STAT_FLAG|VIA8233_REG_SGD_STAT_EOL) << ((chan) * 4))
  196. #define VIA8233_REG_SGD_CHAN_SDX 0
  197. #define VIA8233_REG_SGD_CHAN_MULTI 4
  198. #define VIA8233_REG_SGD_CHAN_REC 6
  199. #define VIA8233_REG_SGD_CHAN_REC1 7
  200. #define VIA_REG_GPI_STATUS 0x88
  201. #define VIA_REG_GPI_INTR 0x8c
  202. /* multi-channel and capture registers for via8233 */
  203. DEFINE_VIA_REGSET(MULTPLAY, 0x40);
  204. DEFINE_VIA_REGSET(CAPTURE_8233, 0x60);
  205. /* via8233-specific registers */
  206. #define VIA_REG_OFS_PLAYBACK_VOLUME_L 0x02 /* byte */
  207. #define VIA_REG_OFS_PLAYBACK_VOLUME_R 0x03 /* byte */
  208. #define VIA_REG_OFS_MULTPLAY_FORMAT 0x02 /* byte - format and channels */
  209. #define VIA_REG_MULTPLAY_FMT_8BIT 0x00
  210. #define VIA_REG_MULTPLAY_FMT_16BIT 0x80
  211. #define VIA_REG_MULTPLAY_FMT_CH_MASK 0x70 /* # channels << 4 (valid = 1,2,4,6) */
  212. #define VIA_REG_OFS_CAPTURE_FIFO 0x02 /* byte - bit 6 = fifo enable */
  213. #define VIA_REG_CAPTURE_FIFO_ENABLE 0x40
  214. #define VIA_DXS_MAX_VOLUME 31 /* max. volume (attenuation) of reg 0x32/33 */
  215. #define VIA_REG_CAPTURE_CHANNEL 0x63 /* byte - input select */
  216. #define VIA_REG_CAPTURE_CHANNEL_MIC 0x4
  217. #define VIA_REG_CAPTURE_CHANNEL_LINE 0
  218. #define VIA_REG_CAPTURE_SELECT_CODEC 0x03 /* recording source codec (0 = primary) */
  219. #define VIA_TBL_BIT_FLAG 0x40000000
  220. #define VIA_TBL_BIT_EOL 0x80000000
  221. /* pci space */
  222. #define VIA_ACLINK_STAT 0x40
  223. #define VIA_ACLINK_C11_READY 0x20
  224. #define VIA_ACLINK_C10_READY 0x10
  225. #define VIA_ACLINK_C01_READY 0x04 /* secondary codec ready */
  226. #define VIA_ACLINK_LOWPOWER 0x02 /* low-power state */
  227. #define VIA_ACLINK_C00_READY 0x01 /* primary codec ready */
  228. #define VIA_ACLINK_CTRL 0x41
  229. #define VIA_ACLINK_CTRL_ENABLE 0x80 /* 0: disable, 1: enable */
  230. #define VIA_ACLINK_CTRL_RESET 0x40 /* 0: assert, 1: de-assert */
  231. #define VIA_ACLINK_CTRL_SYNC 0x20 /* 0: release SYNC, 1: force SYNC hi */
  232. #define VIA_ACLINK_CTRL_SDO 0x10 /* 0: release SDO, 1: force SDO hi */
  233. #define VIA_ACLINK_CTRL_VRA 0x08 /* 0: disable VRA, 1: enable VRA */
  234. #define VIA_ACLINK_CTRL_PCM 0x04 /* 0: disable PCM, 1: enable PCM */
  235. #define VIA_ACLINK_CTRL_FM 0x02 /* via686 only */
  236. #define VIA_ACLINK_CTRL_SB 0x01 /* via686 only */
  237. #define VIA_ACLINK_CTRL_INIT (VIA_ACLINK_CTRL_ENABLE|\
  238. VIA_ACLINK_CTRL_RESET|\
  239. VIA_ACLINK_CTRL_PCM|\
  240. VIA_ACLINK_CTRL_VRA)
  241. #define VIA_FUNC_ENABLE 0x42
  242. #define VIA_FUNC_MIDI_PNP 0x80 /* FIXME: it's 0x40 in the datasheet! */
  243. #define VIA_FUNC_MIDI_IRQMASK 0x40 /* FIXME: not documented! */
  244. #define VIA_FUNC_RX2C_WRITE 0x20
  245. #define VIA_FUNC_SB_FIFO_EMPTY 0x10
  246. #define VIA_FUNC_ENABLE_GAME 0x08
  247. #define VIA_FUNC_ENABLE_FM 0x04
  248. #define VIA_FUNC_ENABLE_MIDI 0x02
  249. #define VIA_FUNC_ENABLE_SB 0x01
  250. #define VIA_PNP_CONTROL 0x43
  251. #define VIA_FM_NMI_CTRL 0x48
  252. #define VIA8233_VOLCHG_CTRL 0x48
  253. #define VIA8233_SPDIF_CTRL 0x49
  254. #define VIA8233_SPDIF_DX3 0x08
  255. #define VIA8233_SPDIF_SLOT_MASK 0x03
  256. #define VIA8233_SPDIF_SLOT_1011 0x00
  257. #define VIA8233_SPDIF_SLOT_34 0x01
  258. #define VIA8233_SPDIF_SLOT_78 0x02
  259. #define VIA8233_SPDIF_SLOT_69 0x03
  260. /*
  261. */
  262. #define VIA_DXS_AUTO 0
  263. #define VIA_DXS_ENABLE 1
  264. #define VIA_DXS_DISABLE 2
  265. #define VIA_DXS_48K 3
  266. #define VIA_DXS_NO_VRA 4
  267. #define VIA_DXS_SRC 5
  268. /*
  269. * pcm stream
  270. */
  271. struct snd_via_sg_table {
  272. unsigned int offset;
  273. unsigned int size;
  274. } ;
  275. #define VIA_TABLE_SIZE 255
  276. #define VIA_MAX_BUFSIZE (1<<24)
  277. struct viadev {
  278. unsigned int reg_offset;
  279. unsigned long port;
  280. int direction; /* playback = 0, capture = 1 */
  281. struct snd_pcm_substream *substream;
  282. int running;
  283. unsigned int tbl_entries; /* # descriptors */
  284. struct snd_dma_buffer table;
  285. struct snd_via_sg_table *idx_table;
  286. /* for recovery from the unexpected pointer */
  287. unsigned int lastpos;
  288. unsigned int fragsize;
  289. unsigned int bufsize;
  290. unsigned int bufsize2;
  291. int hwptr_done; /* processed frame position in the buffer */
  292. int in_interrupt;
  293. int shadow_shift;
  294. };
  295. enum { TYPE_CARD_VIA686 = 1, TYPE_CARD_VIA8233 };
  296. enum { TYPE_VIA686, TYPE_VIA8233, TYPE_VIA8233A };
  297. #define VIA_MAX_DEVS 7 /* 4 playback, 1 multi, 2 capture */
  298. struct via_rate_lock {
  299. spinlock_t lock;
  300. int rate;
  301. int used;
  302. };
  303. struct via82xx {
  304. int irq;
  305. unsigned long port;
  306. struct resource *mpu_res;
  307. int chip_type;
  308. unsigned char revision;
  309. unsigned char old_legacy;
  310. unsigned char old_legacy_cfg;
  311. #ifdef CONFIG_PM_SLEEP
  312. unsigned char legacy_saved;
  313. unsigned char legacy_cfg_saved;
  314. unsigned char spdif_ctrl_saved;
  315. unsigned char capture_src_saved[2];
  316. unsigned int mpu_port_saved;
  317. #endif
  318. unsigned char playback_volume[4][2]; /* for VIA8233/C/8235; default = 0 */
  319. unsigned char playback_volume_c[2]; /* for VIA8233/C/8235; default = 0 */
  320. unsigned int intr_mask; /* SGD_SHADOW mask to check interrupts */
  321. struct pci_dev *pci;
  322. struct snd_card *card;
  323. unsigned int num_devs;
  324. unsigned int playback_devno, multi_devno, capture_devno;
  325. struct viadev devs[VIA_MAX_DEVS];
  326. struct via_rate_lock rates[2]; /* playback and capture */
  327. unsigned int dxs_fixed: 1; /* DXS channel accepts only 48kHz */
  328. unsigned int no_vra: 1; /* no need to set VRA on DXS channels */
  329. unsigned int dxs_src: 1; /* use full SRC capabilities of DXS */
  330. unsigned int spdif_on: 1; /* only spdif rates work to external DACs */
  331. struct snd_pcm *pcms[2];
  332. struct snd_rawmidi *rmidi;
  333. struct snd_kcontrol *dxs_controls[4];
  334. struct snd_ac97_bus *ac97_bus;
  335. struct snd_ac97 *ac97;
  336. unsigned int ac97_clock;
  337. unsigned int ac97_secondary; /* secondary AC'97 codec is present */
  338. spinlock_t reg_lock;
  339. struct snd_info_entry *proc_entry;
  340. #ifdef SUPPORT_JOYSTICK
  341. struct gameport *gameport;
  342. #endif
  343. };
  344. static const struct pci_device_id snd_via82xx_ids[] = {
  345. /* 0x1106, 0x3058 */
  346. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C686_5), TYPE_CARD_VIA686, }, /* 686A */
  347. /* 0x1106, 0x3059 */
  348. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_8233_5), TYPE_CARD_VIA8233, }, /* VT8233 */
  349. { 0, }
  350. };
  351. MODULE_DEVICE_TABLE(pci, snd_via82xx_ids);
  352. /*
  353. */
  354. /*
  355. * allocate and initialize the descriptor buffers
  356. * periods = number of periods
  357. * fragsize = period size in bytes
  358. */
  359. static int build_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
  360. struct pci_dev *pci,
  361. unsigned int periods, unsigned int fragsize)
  362. {
  363. unsigned int i, idx, ofs, rest;
  364. struct via82xx *chip = snd_pcm_substream_chip(substream);
  365. __le32 *pgtbl;
  366. if (dev->table.area == NULL) {
  367. /* the start of each lists must be aligned to 8 bytes,
  368. * but the kernel pages are much bigger, so we don't care
  369. */
  370. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
  371. PAGE_ALIGN(VIA_TABLE_SIZE * 2 * 8),
  372. &dev->table) < 0)
  373. return -ENOMEM;
  374. }
  375. if (! dev->idx_table) {
  376. dev->idx_table = kmalloc_array(VIA_TABLE_SIZE,
  377. sizeof(*dev->idx_table),
  378. GFP_KERNEL);
  379. if (! dev->idx_table)
  380. return -ENOMEM;
  381. }
  382. /* fill the entries */
  383. idx = 0;
  384. ofs = 0;
  385. pgtbl = (__le32 *)dev->table.area;
  386. for (i = 0; i < periods; i++) {
  387. rest = fragsize;
  388. /* fill descriptors for a period.
  389. * a period can be split to several descriptors if it's
  390. * over page boundary.
  391. */
  392. do {
  393. unsigned int r;
  394. unsigned int flag;
  395. unsigned int addr;
  396. if (idx >= VIA_TABLE_SIZE) {
  397. dev_err(&pci->dev, "too much table size!\n");
  398. return -EINVAL;
  399. }
  400. addr = snd_pcm_sgbuf_get_addr(substream, ofs);
  401. pgtbl[idx << 1] = cpu_to_le32(addr);
  402. r = snd_pcm_sgbuf_get_chunk_size(substream, ofs, rest);
  403. rest -= r;
  404. if (! rest) {
  405. if (i == periods - 1)
  406. flag = VIA_TBL_BIT_EOL; /* buffer boundary */
  407. else
  408. flag = VIA_TBL_BIT_FLAG; /* period boundary */
  409. } else
  410. flag = 0; /* period continues to the next */
  411. /*
  412. dev_dbg(&pci->dev,
  413. "tbl %d: at %d size %d (rest %d)\n",
  414. idx, ofs, r, rest);
  415. */
  416. pgtbl[(idx<<1) + 1] = cpu_to_le32(r | flag);
  417. dev->idx_table[idx].offset = ofs;
  418. dev->idx_table[idx].size = r;
  419. ofs += r;
  420. idx++;
  421. } while (rest > 0);
  422. }
  423. dev->tbl_entries = idx;
  424. dev->bufsize = periods * fragsize;
  425. dev->bufsize2 = dev->bufsize / 2;
  426. dev->fragsize = fragsize;
  427. return 0;
  428. }
  429. static int clean_via_table(struct viadev *dev, struct snd_pcm_substream *substream,
  430. struct pci_dev *pci)
  431. {
  432. if (dev->table.area) {
  433. snd_dma_free_pages(&dev->table);
  434. dev->table.area = NULL;
  435. }
  436. kfree(dev->idx_table);
  437. dev->idx_table = NULL;
  438. return 0;
  439. }
  440. /*
  441. * Basic I/O
  442. */
  443. static inline unsigned int snd_via82xx_codec_xread(struct via82xx *chip)
  444. {
  445. return inl(VIAREG(chip, AC97));
  446. }
  447. static inline void snd_via82xx_codec_xwrite(struct via82xx *chip, unsigned int val)
  448. {
  449. outl(val, VIAREG(chip, AC97));
  450. }
  451. static int snd_via82xx_codec_ready(struct via82xx *chip, int secondary)
  452. {
  453. unsigned int timeout = 1000; /* 1ms */
  454. unsigned int val;
  455. while (timeout-- > 0) {
  456. udelay(1);
  457. val = snd_via82xx_codec_xread(chip);
  458. if (!(val & VIA_REG_AC97_BUSY))
  459. return val & 0xffff;
  460. }
  461. dev_err(chip->card->dev, "codec_ready: codec %i is not ready [0x%x]\n",
  462. secondary, snd_via82xx_codec_xread(chip));
  463. return -EIO;
  464. }
  465. static int snd_via82xx_codec_valid(struct via82xx *chip, int secondary)
  466. {
  467. unsigned int timeout = 1000; /* 1ms */
  468. unsigned int val, val1;
  469. unsigned int stat = !secondary ? VIA_REG_AC97_PRIMARY_VALID :
  470. VIA_REG_AC97_SECONDARY_VALID;
  471. while (timeout-- > 0) {
  472. val = snd_via82xx_codec_xread(chip);
  473. val1 = val & (VIA_REG_AC97_BUSY | stat);
  474. if (val1 == stat)
  475. return val & 0xffff;
  476. udelay(1);
  477. }
  478. return -EIO;
  479. }
  480. static void snd_via82xx_codec_wait(struct snd_ac97 *ac97)
  481. {
  482. struct via82xx *chip = ac97->private_data;
  483. __always_unused int err;
  484. err = snd_via82xx_codec_ready(chip, ac97->num);
  485. /* here we need to wait fairly for long time.. */
  486. if (!nodelay)
  487. msleep(500);
  488. }
  489. static void snd_via82xx_codec_write(struct snd_ac97 *ac97,
  490. unsigned short reg,
  491. unsigned short val)
  492. {
  493. struct via82xx *chip = ac97->private_data;
  494. unsigned int xval;
  495. xval = !ac97->num ? VIA_REG_AC97_CODEC_ID_PRIMARY : VIA_REG_AC97_CODEC_ID_SECONDARY;
  496. xval <<= VIA_REG_AC97_CODEC_ID_SHIFT;
  497. xval |= reg << VIA_REG_AC97_CMD_SHIFT;
  498. xval |= val << VIA_REG_AC97_DATA_SHIFT;
  499. snd_via82xx_codec_xwrite(chip, xval);
  500. snd_via82xx_codec_ready(chip, ac97->num);
  501. }
  502. static unsigned short snd_via82xx_codec_read(struct snd_ac97 *ac97, unsigned short reg)
  503. {
  504. struct via82xx *chip = ac97->private_data;
  505. unsigned int xval, val = 0xffff;
  506. int again = 0;
  507. xval = ac97->num << VIA_REG_AC97_CODEC_ID_SHIFT;
  508. xval |= ac97->num ? VIA_REG_AC97_SECONDARY_VALID : VIA_REG_AC97_PRIMARY_VALID;
  509. xval |= VIA_REG_AC97_READ;
  510. xval |= (reg & 0x7f) << VIA_REG_AC97_CMD_SHIFT;
  511. while (1) {
  512. if (again++ > 3) {
  513. dev_err(chip->card->dev,
  514. "codec_read: codec %i is not valid [0x%x]\n",
  515. ac97->num, snd_via82xx_codec_xread(chip));
  516. return 0xffff;
  517. }
  518. snd_via82xx_codec_xwrite(chip, xval);
  519. udelay (20);
  520. if (snd_via82xx_codec_valid(chip, ac97->num) >= 0) {
  521. udelay(25);
  522. val = snd_via82xx_codec_xread(chip);
  523. break;
  524. }
  525. }
  526. return val & 0xffff;
  527. }
  528. static void snd_via82xx_channel_reset(struct via82xx *chip, struct viadev *viadev)
  529. {
  530. outb(VIA_REG_CTRL_PAUSE | VIA_REG_CTRL_TERMINATE | VIA_REG_CTRL_RESET,
  531. VIADEV_REG(viadev, OFFSET_CONTROL));
  532. inb(VIADEV_REG(viadev, OFFSET_CONTROL));
  533. udelay(50);
  534. /* disable interrupts */
  535. outb(0x00, VIADEV_REG(viadev, OFFSET_CONTROL));
  536. /* clear interrupts */
  537. outb(0x03, VIADEV_REG(viadev, OFFSET_STATUS));
  538. outb(0x00, VIADEV_REG(viadev, OFFSET_TYPE)); /* for via686 */
  539. // outl(0, VIADEV_REG(viadev, OFFSET_CURR_PTR));
  540. viadev->lastpos = 0;
  541. viadev->hwptr_done = 0;
  542. }
  543. /*
  544. * Interrupt handler
  545. * Used for 686 and 8233A
  546. */
  547. static irqreturn_t snd_via686_interrupt(int irq, void *dev_id)
  548. {
  549. struct via82xx *chip = dev_id;
  550. unsigned int status;
  551. unsigned int i;
  552. status = inl(VIAREG(chip, SGD_SHADOW));
  553. if (! (status & chip->intr_mask)) {
  554. if (chip->rmidi)
  555. /* check mpu401 interrupt */
  556. return snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
  557. return IRQ_NONE;
  558. }
  559. /* check status for each stream */
  560. spin_lock(&chip->reg_lock);
  561. for (i = 0; i < chip->num_devs; i++) {
  562. struct viadev *viadev = &chip->devs[i];
  563. unsigned char c_status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
  564. if (! (c_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG|VIA_REG_STAT_STOPPED)))
  565. continue;
  566. if (viadev->substream && viadev->running) {
  567. /*
  568. * Update hwptr_done based on 'period elapsed'
  569. * interrupts. We'll use it, when the chip returns 0
  570. * for OFFSET_CURR_COUNT.
  571. */
  572. if (c_status & VIA_REG_STAT_EOL)
  573. viadev->hwptr_done = 0;
  574. else
  575. viadev->hwptr_done += viadev->fragsize;
  576. viadev->in_interrupt = c_status;
  577. spin_unlock(&chip->reg_lock);
  578. snd_pcm_period_elapsed(viadev->substream);
  579. spin_lock(&chip->reg_lock);
  580. viadev->in_interrupt = 0;
  581. }
  582. outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
  583. }
  584. spin_unlock(&chip->reg_lock);
  585. return IRQ_HANDLED;
  586. }
  587. /*
  588. * Interrupt handler
  589. */
  590. static irqreturn_t snd_via8233_interrupt(int irq, void *dev_id)
  591. {
  592. struct via82xx *chip = dev_id;
  593. unsigned int status;
  594. unsigned int i;
  595. int irqreturn = 0;
  596. /* check status for each stream */
  597. spin_lock(&chip->reg_lock);
  598. status = inl(VIAREG(chip, SGD_SHADOW));
  599. for (i = 0; i < chip->num_devs; i++) {
  600. struct viadev *viadev = &chip->devs[i];
  601. struct snd_pcm_substream *substream;
  602. unsigned char c_status, shadow_status;
  603. shadow_status = (status >> viadev->shadow_shift) &
  604. (VIA8233_SHADOW_STAT_ACTIVE|VIA_REG_STAT_EOL|
  605. VIA_REG_STAT_FLAG);
  606. c_status = shadow_status & (VIA_REG_STAT_EOL|VIA_REG_STAT_FLAG);
  607. if (!c_status)
  608. continue;
  609. substream = viadev->substream;
  610. if (substream && viadev->running) {
  611. /*
  612. * Update hwptr_done based on 'period elapsed'
  613. * interrupts. We'll use it, when the chip returns 0
  614. * for OFFSET_CURR_COUNT.
  615. */
  616. if (c_status & VIA_REG_STAT_EOL)
  617. viadev->hwptr_done = 0;
  618. else
  619. viadev->hwptr_done += viadev->fragsize;
  620. viadev->in_interrupt = c_status;
  621. if (shadow_status & VIA8233_SHADOW_STAT_ACTIVE)
  622. viadev->in_interrupt |= VIA_REG_STAT_ACTIVE;
  623. spin_unlock(&chip->reg_lock);
  624. snd_pcm_period_elapsed(substream);
  625. spin_lock(&chip->reg_lock);
  626. viadev->in_interrupt = 0;
  627. }
  628. outb(c_status, VIADEV_REG(viadev, OFFSET_STATUS)); /* ack */
  629. irqreturn = 1;
  630. }
  631. spin_unlock(&chip->reg_lock);
  632. return IRQ_RETVAL(irqreturn);
  633. }
  634. /*
  635. * PCM callbacks
  636. */
  637. /*
  638. * trigger callback
  639. */
  640. static int snd_via82xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  641. {
  642. struct via82xx *chip = snd_pcm_substream_chip(substream);
  643. struct viadev *viadev = substream->runtime->private_data;
  644. unsigned char val;
  645. if (chip->chip_type != TYPE_VIA686)
  646. val = VIA_REG_CTRL_INT;
  647. else
  648. val = 0;
  649. switch (cmd) {
  650. case SNDRV_PCM_TRIGGER_START:
  651. case SNDRV_PCM_TRIGGER_RESUME:
  652. val |= VIA_REG_CTRL_START;
  653. viadev->running = 1;
  654. break;
  655. case SNDRV_PCM_TRIGGER_STOP:
  656. case SNDRV_PCM_TRIGGER_SUSPEND:
  657. val = VIA_REG_CTRL_TERMINATE;
  658. viadev->running = 0;
  659. break;
  660. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  661. val |= VIA_REG_CTRL_PAUSE;
  662. viadev->running = 0;
  663. break;
  664. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  665. viadev->running = 1;
  666. break;
  667. default:
  668. return -EINVAL;
  669. }
  670. outb(val, VIADEV_REG(viadev, OFFSET_CONTROL));
  671. if (cmd == SNDRV_PCM_TRIGGER_STOP)
  672. snd_via82xx_channel_reset(chip, viadev);
  673. return 0;
  674. }
  675. /*
  676. * pointer callbacks
  677. */
  678. /*
  679. * calculate the linear position at the given sg-buffer index and the rest count
  680. */
  681. #define check_invalid_pos(viadev,pos) \
  682. ((pos) < viadev->lastpos && ((pos) >= viadev->bufsize2 ||\
  683. viadev->lastpos < viadev->bufsize2))
  684. static inline unsigned int calc_linear_pos(struct via82xx *chip,
  685. struct viadev *viadev,
  686. unsigned int idx,
  687. unsigned int count)
  688. {
  689. unsigned int size, base, res;
  690. size = viadev->idx_table[idx].size;
  691. base = viadev->idx_table[idx].offset;
  692. res = base + size - count;
  693. if (res >= viadev->bufsize)
  694. res -= viadev->bufsize;
  695. /* check the validity of the calculated position */
  696. if (size < count) {
  697. dev_dbg(chip->card->dev,
  698. "invalid via82xx_cur_ptr (size = %d, count = %d)\n",
  699. (int)size, (int)count);
  700. res = viadev->lastpos;
  701. } else {
  702. if (! count) {
  703. /* Some mobos report count = 0 on the DMA boundary,
  704. * i.e. count = size indeed.
  705. * Let's check whether this step is above the expected size.
  706. */
  707. int delta = res - viadev->lastpos;
  708. if (delta < 0)
  709. delta += viadev->bufsize;
  710. if ((unsigned int)delta > viadev->fragsize)
  711. res = base;
  712. }
  713. if (check_invalid_pos(viadev, res)) {
  714. #ifdef POINTER_DEBUG
  715. dev_dbg(chip->card->dev,
  716. "fail: idx = %i/%i, lastpos = 0x%x, bufsize2 = 0x%x, offsize = 0x%x, size = 0x%x, count = 0x%x\n",
  717. idx, viadev->tbl_entries,
  718. viadev->lastpos, viadev->bufsize2,
  719. viadev->idx_table[idx].offset,
  720. viadev->idx_table[idx].size, count);
  721. #endif
  722. /* count register returns full size when end of buffer is reached */
  723. res = base + size;
  724. if (check_invalid_pos(viadev, res)) {
  725. dev_dbg(chip->card->dev,
  726. "invalid via82xx_cur_ptr (2), using last valid pointer\n");
  727. res = viadev->lastpos;
  728. }
  729. }
  730. }
  731. return res;
  732. }
  733. /*
  734. * get the current pointer on via686
  735. */
  736. static snd_pcm_uframes_t snd_via686_pcm_pointer(struct snd_pcm_substream *substream)
  737. {
  738. struct via82xx *chip = snd_pcm_substream_chip(substream);
  739. struct viadev *viadev = substream->runtime->private_data;
  740. unsigned int idx, ptr, count, res;
  741. if (snd_BUG_ON(!viadev->tbl_entries))
  742. return 0;
  743. if (!(inb(VIADEV_REG(viadev, OFFSET_STATUS)) & VIA_REG_STAT_ACTIVE))
  744. return 0;
  745. spin_lock(&chip->reg_lock);
  746. count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT)) & 0xffffff;
  747. /* The via686a does not have the current index register,
  748. * so we need to calculate the index from CURR_PTR.
  749. */
  750. ptr = inl(VIADEV_REG(viadev, OFFSET_CURR_PTR));
  751. if (ptr <= (unsigned int)viadev->table.addr)
  752. idx = 0;
  753. else /* CURR_PTR holds the address + 8 */
  754. idx = ((ptr - (unsigned int)viadev->table.addr) / 8 - 1) % viadev->tbl_entries;
  755. res = calc_linear_pos(chip, viadev, idx, count);
  756. viadev->lastpos = res; /* remember the last position */
  757. spin_unlock(&chip->reg_lock);
  758. return bytes_to_frames(substream->runtime, res);
  759. }
  760. /*
  761. * get the current pointer on via823x
  762. */
  763. static snd_pcm_uframes_t snd_via8233_pcm_pointer(struct snd_pcm_substream *substream)
  764. {
  765. struct via82xx *chip = snd_pcm_substream_chip(substream);
  766. struct viadev *viadev = substream->runtime->private_data;
  767. unsigned int idx, count, res;
  768. int status;
  769. if (snd_BUG_ON(!viadev->tbl_entries))
  770. return 0;
  771. spin_lock(&chip->reg_lock);
  772. count = inl(VIADEV_REG(viadev, OFFSET_CURR_COUNT));
  773. status = viadev->in_interrupt;
  774. if (!status)
  775. status = inb(VIADEV_REG(viadev, OFFSET_STATUS));
  776. /* An apparent bug in the 8251 is worked around by sending a
  777. * REG_CTRL_START. */
  778. if (chip->revision == VIA_REV_8251 && (status & VIA_REG_STAT_EOL))
  779. snd_via82xx_pcm_trigger(substream, SNDRV_PCM_TRIGGER_START);
  780. if (!(status & VIA_REG_STAT_ACTIVE)) {
  781. res = 0;
  782. goto unlock;
  783. }
  784. if (count & 0xffffff) {
  785. idx = count >> 24;
  786. if (idx >= viadev->tbl_entries) {
  787. #ifdef POINTER_DEBUG
  788. dev_dbg(chip->card->dev,
  789. "fail: invalid idx = %i/%i\n", idx,
  790. viadev->tbl_entries);
  791. #endif
  792. res = viadev->lastpos;
  793. } else {
  794. count &= 0xffffff;
  795. res = calc_linear_pos(chip, viadev, idx, count);
  796. }
  797. } else {
  798. res = viadev->hwptr_done;
  799. if (!viadev->in_interrupt) {
  800. if (status & VIA_REG_STAT_EOL) {
  801. res = 0;
  802. } else
  803. if (status & VIA_REG_STAT_FLAG) {
  804. res += viadev->fragsize;
  805. }
  806. }
  807. }
  808. unlock:
  809. viadev->lastpos = res;
  810. spin_unlock(&chip->reg_lock);
  811. return bytes_to_frames(substream->runtime, res);
  812. }
  813. /*
  814. * hw_params callback:
  815. * allocate the buffer and build up the buffer description table
  816. */
  817. static int snd_via82xx_hw_params(struct snd_pcm_substream *substream,
  818. struct snd_pcm_hw_params *hw_params)
  819. {
  820. struct via82xx *chip = snd_pcm_substream_chip(substream);
  821. struct viadev *viadev = substream->runtime->private_data;
  822. return build_via_table(viadev, substream, chip->pci,
  823. params_periods(hw_params),
  824. params_period_bytes(hw_params));
  825. }
  826. /*
  827. * hw_free callback:
  828. * clean up the buffer description table and release the buffer
  829. */
  830. static int snd_via82xx_hw_free(struct snd_pcm_substream *substream)
  831. {
  832. struct via82xx *chip = snd_pcm_substream_chip(substream);
  833. struct viadev *viadev = substream->runtime->private_data;
  834. clean_via_table(viadev, substream, chip->pci);
  835. return 0;
  836. }
  837. /*
  838. * set up the table pointer
  839. */
  840. static void snd_via82xx_set_table_ptr(struct via82xx *chip, struct viadev *viadev)
  841. {
  842. snd_via82xx_codec_ready(chip, 0);
  843. outl((u32)viadev->table.addr, VIADEV_REG(viadev, OFFSET_TABLE_PTR));
  844. udelay(20);
  845. snd_via82xx_codec_ready(chip, 0);
  846. }
  847. /*
  848. * prepare callback for playback and capture on via686
  849. */
  850. static void via686_setup_format(struct via82xx *chip, struct viadev *viadev,
  851. struct snd_pcm_runtime *runtime)
  852. {
  853. snd_via82xx_channel_reset(chip, viadev);
  854. /* this must be set after channel_reset */
  855. snd_via82xx_set_table_ptr(chip, viadev);
  856. outb(VIA_REG_TYPE_AUTOSTART |
  857. (runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA_REG_TYPE_16BIT : 0) |
  858. (runtime->channels > 1 ? VIA_REG_TYPE_STEREO : 0) |
  859. ((viadev->reg_offset & 0x10) == 0 ? VIA_REG_TYPE_INT_LSAMPLE : 0) |
  860. VIA_REG_TYPE_INT_EOL |
  861. VIA_REG_TYPE_INT_FLAG, VIADEV_REG(viadev, OFFSET_TYPE));
  862. }
  863. static int snd_via686_playback_prepare(struct snd_pcm_substream *substream)
  864. {
  865. struct via82xx *chip = snd_pcm_substream_chip(substream);
  866. struct viadev *viadev = substream->runtime->private_data;
  867. struct snd_pcm_runtime *runtime = substream->runtime;
  868. snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
  869. snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
  870. via686_setup_format(chip, viadev, runtime);
  871. return 0;
  872. }
  873. static int snd_via686_capture_prepare(struct snd_pcm_substream *substream)
  874. {
  875. struct via82xx *chip = snd_pcm_substream_chip(substream);
  876. struct viadev *viadev = substream->runtime->private_data;
  877. struct snd_pcm_runtime *runtime = substream->runtime;
  878. snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  879. via686_setup_format(chip, viadev, runtime);
  880. return 0;
  881. }
  882. /*
  883. * lock the current rate
  884. */
  885. static int via_lock_rate(struct via_rate_lock *rec, int rate)
  886. {
  887. int changed = 0;
  888. spin_lock_irq(&rec->lock);
  889. if (rec->rate != rate) {
  890. if (rec->rate && rec->used > 1) /* already set */
  891. changed = -EINVAL;
  892. else {
  893. rec->rate = rate;
  894. changed = 1;
  895. }
  896. }
  897. spin_unlock_irq(&rec->lock);
  898. return changed;
  899. }
  900. /*
  901. * prepare callback for DSX playback on via823x
  902. */
  903. static int snd_via8233_playback_prepare(struct snd_pcm_substream *substream)
  904. {
  905. struct via82xx *chip = snd_pcm_substream_chip(substream);
  906. struct viadev *viadev = substream->runtime->private_data;
  907. struct snd_pcm_runtime *runtime = substream->runtime;
  908. int ac97_rate = chip->dxs_src ? 48000 : runtime->rate;
  909. int rate_changed;
  910. u32 rbits;
  911. rate_changed = via_lock_rate(&chip->rates[0], ac97_rate);
  912. if (rate_changed < 0)
  913. return rate_changed;
  914. if (rate_changed)
  915. snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
  916. chip->no_vra ? 48000 : runtime->rate);
  917. if (chip->spdif_on && viadev->reg_offset == 0x30)
  918. snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
  919. if (runtime->rate == 48000)
  920. rbits = 0xfffff;
  921. else
  922. rbits = (0x100000 / 48000) * runtime->rate +
  923. ((0x100000 % 48000) * runtime->rate) / 48000;
  924. snd_BUG_ON(rbits & ~0xfffff);
  925. snd_via82xx_channel_reset(chip, viadev);
  926. snd_via82xx_set_table_ptr(chip, viadev);
  927. outb(chip->playback_volume[viadev->reg_offset / 0x10][0],
  928. VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_L));
  929. outb(chip->playback_volume[viadev->reg_offset / 0x10][1],
  930. VIADEV_REG(viadev, OFS_PLAYBACK_VOLUME_R));
  931. outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) | /* format */
  932. (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) | /* stereo */
  933. rbits | /* rate */
  934. 0xff000000, /* STOP index is never reached */
  935. VIADEV_REG(viadev, OFFSET_STOP_IDX));
  936. udelay(20);
  937. snd_via82xx_codec_ready(chip, 0);
  938. return 0;
  939. }
  940. /*
  941. * prepare callback for multi-channel playback on via823x
  942. */
  943. static int snd_via8233_multi_prepare(struct snd_pcm_substream *substream)
  944. {
  945. struct via82xx *chip = snd_pcm_substream_chip(substream);
  946. struct viadev *viadev = substream->runtime->private_data;
  947. struct snd_pcm_runtime *runtime = substream->runtime;
  948. unsigned int slots;
  949. int fmt;
  950. if (via_lock_rate(&chip->rates[0], runtime->rate) < 0)
  951. return -EINVAL;
  952. snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
  953. snd_ac97_set_rate(chip->ac97, AC97_PCM_SURR_DAC_RATE, runtime->rate);
  954. snd_ac97_set_rate(chip->ac97, AC97_PCM_LFE_DAC_RATE, runtime->rate);
  955. snd_ac97_set_rate(chip->ac97, AC97_SPDIF, runtime->rate);
  956. snd_via82xx_channel_reset(chip, viadev);
  957. snd_via82xx_set_table_ptr(chip, viadev);
  958. fmt = (runtime->format == SNDRV_PCM_FORMAT_S16_LE) ?
  959. VIA_REG_MULTPLAY_FMT_16BIT : VIA_REG_MULTPLAY_FMT_8BIT;
  960. fmt |= runtime->channels << 4;
  961. outb(fmt, VIADEV_REG(viadev, OFS_MULTPLAY_FORMAT));
  962. #if 0
  963. if (chip->revision == VIA_REV_8233A)
  964. slots = 0;
  965. else
  966. #endif
  967. {
  968. /* set sample number to slot 3, 4, 7, 8, 6, 9 (for VIA8233/C,8235) */
  969. /* corresponding to FL, FR, RL, RR, C, LFE ?? */
  970. switch (runtime->channels) {
  971. case 1: slots = (1<<0) | (1<<4); break;
  972. case 2: slots = (1<<0) | (2<<4); break;
  973. case 3: slots = (1<<0) | (2<<4) | (5<<8); break;
  974. case 4: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12); break;
  975. case 5: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16); break;
  976. case 6: slots = (1<<0) | (2<<4) | (3<<8) | (4<<12) | (5<<16) | (6<<20); break;
  977. default: slots = 0; break;
  978. }
  979. }
  980. /* STOP index is never reached */
  981. outl(0xff000000 | slots, VIADEV_REG(viadev, OFFSET_STOP_IDX));
  982. udelay(20);
  983. snd_via82xx_codec_ready(chip, 0);
  984. return 0;
  985. }
  986. /*
  987. * prepare callback for capture on via823x
  988. */
  989. static int snd_via8233_capture_prepare(struct snd_pcm_substream *substream)
  990. {
  991. struct via82xx *chip = snd_pcm_substream_chip(substream);
  992. struct viadev *viadev = substream->runtime->private_data;
  993. struct snd_pcm_runtime *runtime = substream->runtime;
  994. if (via_lock_rate(&chip->rates[1], runtime->rate) < 0)
  995. return -EINVAL;
  996. snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  997. snd_via82xx_channel_reset(chip, viadev);
  998. snd_via82xx_set_table_ptr(chip, viadev);
  999. outb(VIA_REG_CAPTURE_FIFO_ENABLE, VIADEV_REG(viadev, OFS_CAPTURE_FIFO));
  1000. outl((runtime->format == SNDRV_PCM_FORMAT_S16_LE ? VIA8233_REG_TYPE_16BIT : 0) |
  1001. (runtime->channels > 1 ? VIA8233_REG_TYPE_STEREO : 0) |
  1002. 0xff000000, /* STOP index is never reached */
  1003. VIADEV_REG(viadev, OFFSET_STOP_IDX));
  1004. udelay(20);
  1005. snd_via82xx_codec_ready(chip, 0);
  1006. return 0;
  1007. }
  1008. /*
  1009. * pcm hardware definition, identical for both playback and capture
  1010. */
  1011. static const struct snd_pcm_hardware snd_via82xx_hw =
  1012. {
  1013. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1014. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1015. SNDRV_PCM_INFO_MMAP_VALID |
  1016. /* SNDRV_PCM_INFO_RESUME | */
  1017. SNDRV_PCM_INFO_PAUSE),
  1018. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  1019. .rates = SNDRV_PCM_RATE_48000,
  1020. .rate_min = 48000,
  1021. .rate_max = 48000,
  1022. .channels_min = 1,
  1023. .channels_max = 2,
  1024. .buffer_bytes_max = VIA_MAX_BUFSIZE,
  1025. .period_bytes_min = 32,
  1026. .period_bytes_max = VIA_MAX_BUFSIZE / 2,
  1027. .periods_min = 2,
  1028. .periods_max = VIA_TABLE_SIZE / 2,
  1029. .fifo_size = 0,
  1030. };
  1031. /*
  1032. * open callback skeleton
  1033. */
  1034. static int snd_via82xx_pcm_open(struct via82xx *chip, struct viadev *viadev,
  1035. struct snd_pcm_substream *substream)
  1036. {
  1037. struct snd_pcm_runtime *runtime = substream->runtime;
  1038. int err;
  1039. struct via_rate_lock *ratep;
  1040. bool use_src = false;
  1041. runtime->hw = snd_via82xx_hw;
  1042. /* set the hw rate condition */
  1043. ratep = &chip->rates[viadev->direction];
  1044. spin_lock_irq(&ratep->lock);
  1045. ratep->used++;
  1046. if (chip->spdif_on && viadev->reg_offset == 0x30) {
  1047. /* DXS#3 and spdif is on */
  1048. runtime->hw.rates = chip->ac97->rates[AC97_RATES_SPDIF];
  1049. snd_pcm_limit_hw_rates(runtime);
  1050. } else if (chip->dxs_fixed && viadev->reg_offset < 0x40) {
  1051. /* fixed DXS playback rate */
  1052. runtime->hw.rates = SNDRV_PCM_RATE_48000;
  1053. runtime->hw.rate_min = runtime->hw.rate_max = 48000;
  1054. } else if (chip->dxs_src && viadev->reg_offset < 0x40) {
  1055. /* use full SRC capabilities of DXS */
  1056. runtime->hw.rates = (SNDRV_PCM_RATE_CONTINUOUS |
  1057. SNDRV_PCM_RATE_8000_48000);
  1058. runtime->hw.rate_min = 8000;
  1059. runtime->hw.rate_max = 48000;
  1060. use_src = true;
  1061. } else if (! ratep->rate) {
  1062. int idx = viadev->direction ? AC97_RATES_ADC : AC97_RATES_FRONT_DAC;
  1063. runtime->hw.rates = chip->ac97->rates[idx];
  1064. snd_pcm_limit_hw_rates(runtime);
  1065. } else {
  1066. /* a fixed rate */
  1067. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  1068. runtime->hw.rate_max = runtime->hw.rate_min = ratep->rate;
  1069. }
  1070. spin_unlock_irq(&ratep->lock);
  1071. /* we may remove following constaint when we modify table entries
  1072. in interrupt */
  1073. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  1074. if (err < 0)
  1075. return err;
  1076. if (use_src) {
  1077. err = snd_pcm_hw_rule_noresample(runtime, 48000);
  1078. if (err < 0)
  1079. return err;
  1080. }
  1081. runtime->private_data = viadev;
  1082. viadev->substream = substream;
  1083. return 0;
  1084. }
  1085. /*
  1086. * open callback for playback on via686
  1087. */
  1088. static int snd_via686_playback_open(struct snd_pcm_substream *substream)
  1089. {
  1090. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1091. struct viadev *viadev = &chip->devs[chip->playback_devno + substream->number];
  1092. int err;
  1093. err = snd_via82xx_pcm_open(chip, viadev, substream);
  1094. if (err < 0)
  1095. return err;
  1096. return 0;
  1097. }
  1098. /*
  1099. * open callback for playback on via823x DXS
  1100. */
  1101. static int snd_via8233_playback_open(struct snd_pcm_substream *substream)
  1102. {
  1103. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1104. struct viadev *viadev;
  1105. unsigned int stream;
  1106. int err;
  1107. viadev = &chip->devs[chip->playback_devno + substream->number];
  1108. err = snd_via82xx_pcm_open(chip, viadev, substream);
  1109. if (err < 0)
  1110. return err;
  1111. stream = viadev->reg_offset / 0x10;
  1112. if (chip->dxs_controls[stream]) {
  1113. chip->playback_volume[stream][0] =
  1114. VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
  1115. chip->playback_volume[stream][1] =
  1116. VIA_DXS_MAX_VOLUME - (dxs_init_volume & 31);
  1117. chip->dxs_controls[stream]->vd[0].access &=
  1118. ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  1119. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  1120. SNDRV_CTL_EVENT_MASK_INFO,
  1121. &chip->dxs_controls[stream]->id);
  1122. }
  1123. return 0;
  1124. }
  1125. /*
  1126. * open callback for playback on via823x multi-channel
  1127. */
  1128. static int snd_via8233_multi_open(struct snd_pcm_substream *substream)
  1129. {
  1130. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1131. struct viadev *viadev = &chip->devs[chip->multi_devno];
  1132. int err;
  1133. /* channels constraint for VIA8233A
  1134. * 3 and 5 channels are not supported
  1135. */
  1136. static const unsigned int channels[] = {
  1137. 1, 2, 4, 6
  1138. };
  1139. static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
  1140. .count = ARRAY_SIZE(channels),
  1141. .list = channels,
  1142. .mask = 0,
  1143. };
  1144. err = snd_via82xx_pcm_open(chip, viadev, substream);
  1145. if (err < 0)
  1146. return err;
  1147. substream->runtime->hw.channels_max = 6;
  1148. if (chip->revision == VIA_REV_8233A)
  1149. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1150. SNDRV_PCM_HW_PARAM_CHANNELS,
  1151. &hw_constraints_channels);
  1152. return 0;
  1153. }
  1154. /*
  1155. * open callback for capture on via686 and via823x
  1156. */
  1157. static int snd_via82xx_capture_open(struct snd_pcm_substream *substream)
  1158. {
  1159. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1160. struct viadev *viadev = &chip->devs[chip->capture_devno + substream->pcm->device];
  1161. return snd_via82xx_pcm_open(chip, viadev, substream);
  1162. }
  1163. /*
  1164. * close callback
  1165. */
  1166. static int snd_via82xx_pcm_close(struct snd_pcm_substream *substream)
  1167. {
  1168. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1169. struct viadev *viadev = substream->runtime->private_data;
  1170. struct via_rate_lock *ratep;
  1171. /* release the rate lock */
  1172. ratep = &chip->rates[viadev->direction];
  1173. spin_lock_irq(&ratep->lock);
  1174. ratep->used--;
  1175. if (! ratep->used)
  1176. ratep->rate = 0;
  1177. spin_unlock_irq(&ratep->lock);
  1178. if (! ratep->rate) {
  1179. if (! viadev->direction) {
  1180. snd_ac97_update_power(chip->ac97,
  1181. AC97_PCM_FRONT_DAC_RATE, 0);
  1182. snd_ac97_update_power(chip->ac97,
  1183. AC97_PCM_SURR_DAC_RATE, 0);
  1184. snd_ac97_update_power(chip->ac97,
  1185. AC97_PCM_LFE_DAC_RATE, 0);
  1186. } else
  1187. snd_ac97_update_power(chip->ac97,
  1188. AC97_PCM_LR_ADC_RATE, 0);
  1189. }
  1190. viadev->substream = NULL;
  1191. return 0;
  1192. }
  1193. static int snd_via8233_playback_close(struct snd_pcm_substream *substream)
  1194. {
  1195. struct via82xx *chip = snd_pcm_substream_chip(substream);
  1196. struct viadev *viadev = substream->runtime->private_data;
  1197. unsigned int stream;
  1198. stream = viadev->reg_offset / 0x10;
  1199. if (chip->dxs_controls[stream]) {
  1200. chip->dxs_controls[stream]->vd[0].access |=
  1201. SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  1202. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO,
  1203. &chip->dxs_controls[stream]->id);
  1204. }
  1205. return snd_via82xx_pcm_close(substream);
  1206. }
  1207. /* via686 playback callbacks */
  1208. static const struct snd_pcm_ops snd_via686_playback_ops = {
  1209. .open = snd_via686_playback_open,
  1210. .close = snd_via82xx_pcm_close,
  1211. .hw_params = snd_via82xx_hw_params,
  1212. .hw_free = snd_via82xx_hw_free,
  1213. .prepare = snd_via686_playback_prepare,
  1214. .trigger = snd_via82xx_pcm_trigger,
  1215. .pointer = snd_via686_pcm_pointer,
  1216. };
  1217. /* via686 capture callbacks */
  1218. static const struct snd_pcm_ops snd_via686_capture_ops = {
  1219. .open = snd_via82xx_capture_open,
  1220. .close = snd_via82xx_pcm_close,
  1221. .hw_params = snd_via82xx_hw_params,
  1222. .hw_free = snd_via82xx_hw_free,
  1223. .prepare = snd_via686_capture_prepare,
  1224. .trigger = snd_via82xx_pcm_trigger,
  1225. .pointer = snd_via686_pcm_pointer,
  1226. };
  1227. /* via823x DSX playback callbacks */
  1228. static const struct snd_pcm_ops snd_via8233_playback_ops = {
  1229. .open = snd_via8233_playback_open,
  1230. .close = snd_via8233_playback_close,
  1231. .hw_params = snd_via82xx_hw_params,
  1232. .hw_free = snd_via82xx_hw_free,
  1233. .prepare = snd_via8233_playback_prepare,
  1234. .trigger = snd_via82xx_pcm_trigger,
  1235. .pointer = snd_via8233_pcm_pointer,
  1236. };
  1237. /* via823x multi-channel playback callbacks */
  1238. static const struct snd_pcm_ops snd_via8233_multi_ops = {
  1239. .open = snd_via8233_multi_open,
  1240. .close = snd_via82xx_pcm_close,
  1241. .hw_params = snd_via82xx_hw_params,
  1242. .hw_free = snd_via82xx_hw_free,
  1243. .prepare = snd_via8233_multi_prepare,
  1244. .trigger = snd_via82xx_pcm_trigger,
  1245. .pointer = snd_via8233_pcm_pointer,
  1246. };
  1247. /* via823x capture callbacks */
  1248. static const struct snd_pcm_ops snd_via8233_capture_ops = {
  1249. .open = snd_via82xx_capture_open,
  1250. .close = snd_via82xx_pcm_close,
  1251. .hw_params = snd_via82xx_hw_params,
  1252. .hw_free = snd_via82xx_hw_free,
  1253. .prepare = snd_via8233_capture_prepare,
  1254. .trigger = snd_via82xx_pcm_trigger,
  1255. .pointer = snd_via8233_pcm_pointer,
  1256. };
  1257. static void init_viadev(struct via82xx *chip, int idx, unsigned int reg_offset,
  1258. int shadow_pos, int direction)
  1259. {
  1260. chip->devs[idx].reg_offset = reg_offset;
  1261. chip->devs[idx].shadow_shift = shadow_pos * 4;
  1262. chip->devs[idx].direction = direction;
  1263. chip->devs[idx].port = chip->port + reg_offset;
  1264. }
  1265. /*
  1266. * create pcm instances for VIA8233, 8233C and 8235 (not 8233A)
  1267. */
  1268. static int snd_via8233_pcm_new(struct via82xx *chip)
  1269. {
  1270. struct snd_pcm *pcm;
  1271. struct snd_pcm_chmap *chmap;
  1272. int i, err;
  1273. chip->playback_devno = 0; /* x 4 */
  1274. chip->multi_devno = 4; /* x 1 */
  1275. chip->capture_devno = 5; /* x 2 */
  1276. chip->num_devs = 7;
  1277. chip->intr_mask = 0x33033333; /* FLAG|EOL for rec0-1, mc, sdx0-3 */
  1278. /* PCM #0: 4 DSX playbacks and 1 capture */
  1279. err = snd_pcm_new(chip->card, chip->card->shortname, 0, 4, 1, &pcm);
  1280. if (err < 0)
  1281. return err;
  1282. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
  1283. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
  1284. pcm->private_data = chip;
  1285. strcpy(pcm->name, chip->card->shortname);
  1286. chip->pcms[0] = pcm;
  1287. /* set up playbacks */
  1288. for (i = 0; i < 4; i++)
  1289. init_viadev(chip, i, 0x10 * i, i, 0);
  1290. /* capture */
  1291. init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
  1292. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1293. &chip->pci->dev,
  1294. 64*1024, VIA_MAX_BUFSIZE);
  1295. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1296. snd_pcm_std_chmaps, 2, 0,
  1297. &chmap);
  1298. if (err < 0)
  1299. return err;
  1300. /* PCM #1: multi-channel playback and 2nd capture */
  1301. err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 1, &pcm);
  1302. if (err < 0)
  1303. return err;
  1304. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
  1305. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
  1306. pcm->private_data = chip;
  1307. strcpy(pcm->name, chip->card->shortname);
  1308. chip->pcms[1] = pcm;
  1309. /* set up playback */
  1310. init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
  1311. /* set up capture */
  1312. init_viadev(chip, chip->capture_devno + 1, VIA_REG_CAPTURE_8233_STATUS + 0x10, 7, 1);
  1313. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1314. &chip->pci->dev,
  1315. 64*1024, VIA_MAX_BUFSIZE);
  1316. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1317. snd_pcm_alt_chmaps, 6, 0,
  1318. &chmap);
  1319. if (err < 0)
  1320. return err;
  1321. chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
  1322. return 0;
  1323. }
  1324. /*
  1325. * create pcm instances for VIA8233A
  1326. */
  1327. static int snd_via8233a_pcm_new(struct via82xx *chip)
  1328. {
  1329. struct snd_pcm *pcm;
  1330. struct snd_pcm_chmap *chmap;
  1331. int err;
  1332. chip->multi_devno = 0;
  1333. chip->playback_devno = 1;
  1334. chip->capture_devno = 2;
  1335. chip->num_devs = 3;
  1336. chip->intr_mask = 0x03033000; /* FLAG|EOL for rec0, mc, sdx3 */
  1337. /* PCM #0: multi-channel playback and capture */
  1338. err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
  1339. if (err < 0)
  1340. return err;
  1341. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_multi_ops);
  1342. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via8233_capture_ops);
  1343. pcm->private_data = chip;
  1344. strcpy(pcm->name, chip->card->shortname);
  1345. chip->pcms[0] = pcm;
  1346. /* set up playback */
  1347. init_viadev(chip, chip->multi_devno, VIA_REG_MULTPLAY_STATUS, 4, 0);
  1348. /* capture */
  1349. init_viadev(chip, chip->capture_devno, VIA_REG_CAPTURE_8233_STATUS, 6, 1);
  1350. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1351. &chip->pci->dev,
  1352. 64*1024, VIA_MAX_BUFSIZE);
  1353. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1354. snd_pcm_alt_chmaps, 6, 0,
  1355. &chmap);
  1356. if (err < 0)
  1357. return err;
  1358. chip->ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
  1359. /* SPDIF supported? */
  1360. if (! ac97_can_spdif(chip->ac97))
  1361. return 0;
  1362. /* PCM #1: DXS3 playback (for spdif) */
  1363. err = snd_pcm_new(chip->card, chip->card->shortname, 1, 1, 0, &pcm);
  1364. if (err < 0)
  1365. return err;
  1366. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via8233_playback_ops);
  1367. pcm->private_data = chip;
  1368. strcpy(pcm->name, chip->card->shortname);
  1369. chip->pcms[1] = pcm;
  1370. /* set up playback */
  1371. init_viadev(chip, chip->playback_devno, 0x30, 3, 0);
  1372. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1373. &chip->pci->dev,
  1374. 64*1024, VIA_MAX_BUFSIZE);
  1375. return 0;
  1376. }
  1377. /*
  1378. * create a pcm instance for via686a/b
  1379. */
  1380. static int snd_via686_pcm_new(struct via82xx *chip)
  1381. {
  1382. struct snd_pcm *pcm;
  1383. int err;
  1384. chip->playback_devno = 0;
  1385. chip->capture_devno = 1;
  1386. chip->num_devs = 2;
  1387. chip->intr_mask = 0x77; /* FLAG | EOL for PB, CP, FM */
  1388. err = snd_pcm_new(chip->card, chip->card->shortname, 0, 1, 1, &pcm);
  1389. if (err < 0)
  1390. return err;
  1391. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_via686_playback_ops);
  1392. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_via686_capture_ops);
  1393. pcm->private_data = chip;
  1394. strcpy(pcm->name, chip->card->shortname);
  1395. chip->pcms[0] = pcm;
  1396. init_viadev(chip, 0, VIA_REG_PLAYBACK_STATUS, 0, 0);
  1397. init_viadev(chip, 1, VIA_REG_CAPTURE_STATUS, 0, 1);
  1398. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  1399. &chip->pci->dev,
  1400. 64*1024, VIA_MAX_BUFSIZE);
  1401. return 0;
  1402. }
  1403. /*
  1404. * Mixer part
  1405. */
  1406. static int snd_via8233_capture_source_info(struct snd_kcontrol *kcontrol,
  1407. struct snd_ctl_elem_info *uinfo)
  1408. {
  1409. /* formerly they were "Line" and "Mic", but it looks like that they
  1410. * have nothing to do with the actual physical connections...
  1411. */
  1412. static const char * const texts[2] = {
  1413. "Input1", "Input2"
  1414. };
  1415. return snd_ctl_enum_info(uinfo, 1, 2, texts);
  1416. }
  1417. static int snd_via8233_capture_source_get(struct snd_kcontrol *kcontrol,
  1418. struct snd_ctl_elem_value *ucontrol)
  1419. {
  1420. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1421. unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
  1422. ucontrol->value.enumerated.item[0] = inb(port) & VIA_REG_CAPTURE_CHANNEL_MIC ? 1 : 0;
  1423. return 0;
  1424. }
  1425. static int snd_via8233_capture_source_put(struct snd_kcontrol *kcontrol,
  1426. struct snd_ctl_elem_value *ucontrol)
  1427. {
  1428. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1429. unsigned long port = chip->port + (kcontrol->id.index ? (VIA_REG_CAPTURE_CHANNEL + 0x10) : VIA_REG_CAPTURE_CHANNEL);
  1430. u8 val, oval;
  1431. spin_lock_irq(&chip->reg_lock);
  1432. oval = inb(port);
  1433. val = oval & ~VIA_REG_CAPTURE_CHANNEL_MIC;
  1434. if (ucontrol->value.enumerated.item[0])
  1435. val |= VIA_REG_CAPTURE_CHANNEL_MIC;
  1436. if (val != oval)
  1437. outb(val, port);
  1438. spin_unlock_irq(&chip->reg_lock);
  1439. return val != oval;
  1440. }
  1441. static struct snd_kcontrol_new snd_via8233_capture_source = {
  1442. .name = "Input Source Select",
  1443. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1444. .info = snd_via8233_capture_source_info,
  1445. .get = snd_via8233_capture_source_get,
  1446. .put = snd_via8233_capture_source_put,
  1447. };
  1448. #define snd_via8233_dxs3_spdif_info snd_ctl_boolean_mono_info
  1449. static int snd_via8233_dxs3_spdif_get(struct snd_kcontrol *kcontrol,
  1450. struct snd_ctl_elem_value *ucontrol)
  1451. {
  1452. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1453. u8 val;
  1454. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
  1455. ucontrol->value.integer.value[0] = (val & VIA8233_SPDIF_DX3) ? 1 : 0;
  1456. return 0;
  1457. }
  1458. static int snd_via8233_dxs3_spdif_put(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1462. u8 val, oval;
  1463. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &oval);
  1464. val = oval & ~VIA8233_SPDIF_DX3;
  1465. if (ucontrol->value.integer.value[0])
  1466. val |= VIA8233_SPDIF_DX3;
  1467. /* save the spdif flag for rate filtering */
  1468. chip->spdif_on = ucontrol->value.integer.value[0] ? 1 : 0;
  1469. if (val != oval) {
  1470. pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
  1471. return 1;
  1472. }
  1473. return 0;
  1474. }
  1475. static const struct snd_kcontrol_new snd_via8233_dxs3_spdif_control = {
  1476. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1477. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1478. .info = snd_via8233_dxs3_spdif_info,
  1479. .get = snd_via8233_dxs3_spdif_get,
  1480. .put = snd_via8233_dxs3_spdif_put,
  1481. };
  1482. static int snd_via8233_dxs_volume_info(struct snd_kcontrol *kcontrol,
  1483. struct snd_ctl_elem_info *uinfo)
  1484. {
  1485. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1486. uinfo->count = 2;
  1487. uinfo->value.integer.min = 0;
  1488. uinfo->value.integer.max = VIA_DXS_MAX_VOLUME;
  1489. return 0;
  1490. }
  1491. static int snd_via8233_dxs_volume_get(struct snd_kcontrol *kcontrol,
  1492. struct snd_ctl_elem_value *ucontrol)
  1493. {
  1494. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1495. unsigned int idx = kcontrol->id.subdevice;
  1496. ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][0];
  1497. ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume[idx][1];
  1498. return 0;
  1499. }
  1500. static int snd_via8233_pcmdxs_volume_get(struct snd_kcontrol *kcontrol,
  1501. struct snd_ctl_elem_value *ucontrol)
  1502. {
  1503. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1504. ucontrol->value.integer.value[0] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[0];
  1505. ucontrol->value.integer.value[1] = VIA_DXS_MAX_VOLUME - chip->playback_volume_c[1];
  1506. return 0;
  1507. }
  1508. static int snd_via8233_dxs_volume_put(struct snd_kcontrol *kcontrol,
  1509. struct snd_ctl_elem_value *ucontrol)
  1510. {
  1511. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1512. unsigned int idx = kcontrol->id.subdevice;
  1513. unsigned long port = chip->port + 0x10 * idx;
  1514. unsigned char val;
  1515. int i, change = 0;
  1516. for (i = 0; i < 2; i++) {
  1517. val = ucontrol->value.integer.value[i];
  1518. if (val > VIA_DXS_MAX_VOLUME)
  1519. val = VIA_DXS_MAX_VOLUME;
  1520. val = VIA_DXS_MAX_VOLUME - val;
  1521. change |= val != chip->playback_volume[idx][i];
  1522. if (change) {
  1523. chip->playback_volume[idx][i] = val;
  1524. outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
  1525. }
  1526. }
  1527. return change;
  1528. }
  1529. static int snd_via8233_pcmdxs_volume_put(struct snd_kcontrol *kcontrol,
  1530. struct snd_ctl_elem_value *ucontrol)
  1531. {
  1532. struct via82xx *chip = snd_kcontrol_chip(kcontrol);
  1533. unsigned int idx;
  1534. unsigned char val;
  1535. int i, change = 0;
  1536. for (i = 0; i < 2; i++) {
  1537. val = ucontrol->value.integer.value[i];
  1538. if (val > VIA_DXS_MAX_VOLUME)
  1539. val = VIA_DXS_MAX_VOLUME;
  1540. val = VIA_DXS_MAX_VOLUME - val;
  1541. if (val != chip->playback_volume_c[i]) {
  1542. change = 1;
  1543. chip->playback_volume_c[i] = val;
  1544. for (idx = 0; idx < 4; idx++) {
  1545. unsigned long port = chip->port + 0x10 * idx;
  1546. chip->playback_volume[idx][i] = val;
  1547. outb(val, port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
  1548. }
  1549. }
  1550. }
  1551. return change;
  1552. }
  1553. static const DECLARE_TLV_DB_SCALE(db_scale_dxs, -4650, 150, 1);
  1554. static const struct snd_kcontrol_new snd_via8233_pcmdxs_volume_control = {
  1555. .name = "PCM Playback Volume",
  1556. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1557. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1558. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1559. .info = snd_via8233_dxs_volume_info,
  1560. .get = snd_via8233_pcmdxs_volume_get,
  1561. .put = snd_via8233_pcmdxs_volume_put,
  1562. .tlv = { .p = db_scale_dxs }
  1563. };
  1564. static const struct snd_kcontrol_new snd_via8233_dxs_volume_control = {
  1565. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1566. .device = 0,
  1567. /* .subdevice set later */
  1568. .name = "PCM Playback Volume",
  1569. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1570. SNDRV_CTL_ELEM_ACCESS_TLV_READ |
  1571. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1572. .info = snd_via8233_dxs_volume_info,
  1573. .get = snd_via8233_dxs_volume_get,
  1574. .put = snd_via8233_dxs_volume_put,
  1575. .tlv = { .p = db_scale_dxs }
  1576. };
  1577. /*
  1578. */
  1579. static void snd_via82xx_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1580. {
  1581. struct via82xx *chip = bus->private_data;
  1582. chip->ac97_bus = NULL;
  1583. }
  1584. static void snd_via82xx_mixer_free_ac97(struct snd_ac97 *ac97)
  1585. {
  1586. struct via82xx *chip = ac97->private_data;
  1587. chip->ac97 = NULL;
  1588. }
  1589. static const struct ac97_quirk ac97_quirks[] = {
  1590. {
  1591. .subvendor = 0x1106,
  1592. .subdevice = 0x4161,
  1593. .codec_id = 0x56494161, /* VT1612A */
  1594. .name = "Soltek SL-75DRV5",
  1595. .type = AC97_TUNE_NONE
  1596. },
  1597. { /* FIXME: which codec? */
  1598. .subvendor = 0x1106,
  1599. .subdevice = 0x4161,
  1600. .name = "ASRock K7VT2",
  1601. .type = AC97_TUNE_HP_ONLY
  1602. },
  1603. {
  1604. .subvendor = 0x110a,
  1605. .subdevice = 0x0079,
  1606. .name = "Fujitsu Siemens D1289",
  1607. .type = AC97_TUNE_HP_ONLY
  1608. },
  1609. {
  1610. .subvendor = 0x1019,
  1611. .subdevice = 0x0a81,
  1612. .name = "ECS K7VTA3",
  1613. .type = AC97_TUNE_HP_ONLY
  1614. },
  1615. {
  1616. .subvendor = 0x1019,
  1617. .subdevice = 0x0a85,
  1618. .name = "ECS L7VMM2",
  1619. .type = AC97_TUNE_HP_ONLY
  1620. },
  1621. {
  1622. .subvendor = 0x1019,
  1623. .subdevice = 0x1841,
  1624. .name = "ECS K7VTA3",
  1625. .type = AC97_TUNE_HP_ONLY
  1626. },
  1627. {
  1628. .subvendor = 0x1849,
  1629. .subdevice = 0x3059,
  1630. .name = "ASRock K7VM2",
  1631. .type = AC97_TUNE_HP_ONLY /* VT1616 */
  1632. },
  1633. {
  1634. .subvendor = 0x14cd,
  1635. .subdevice = 0x7002,
  1636. .name = "Unknown",
  1637. .type = AC97_TUNE_ALC_JACK
  1638. },
  1639. {
  1640. .subvendor = 0x1071,
  1641. .subdevice = 0x8590,
  1642. .name = "Mitac Mobo",
  1643. .type = AC97_TUNE_ALC_JACK
  1644. },
  1645. {
  1646. .subvendor = 0x161f,
  1647. .subdevice = 0x202b,
  1648. .name = "Arima Notebook",
  1649. .type = AC97_TUNE_HP_ONLY,
  1650. },
  1651. {
  1652. .subvendor = 0x161f,
  1653. .subdevice = 0x2032,
  1654. .name = "Targa Traveller 811",
  1655. .type = AC97_TUNE_HP_ONLY,
  1656. },
  1657. {
  1658. .subvendor = 0x161f,
  1659. .subdevice = 0x2032,
  1660. .name = "m680x",
  1661. .type = AC97_TUNE_HP_ONLY, /* http://launchpad.net/bugs/38546 */
  1662. },
  1663. {
  1664. .subvendor = 0x1297,
  1665. .subdevice = 0xa232,
  1666. .name = "Shuttle AK32VN",
  1667. .type = AC97_TUNE_HP_ONLY
  1668. },
  1669. { } /* terminator */
  1670. };
  1671. static int snd_via82xx_mixer_new(struct via82xx *chip, const char *quirk_override)
  1672. {
  1673. struct snd_ac97_template ac97;
  1674. int err;
  1675. static const struct snd_ac97_bus_ops ops = {
  1676. .write = snd_via82xx_codec_write,
  1677. .read = snd_via82xx_codec_read,
  1678. .wait = snd_via82xx_codec_wait,
  1679. };
  1680. err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
  1681. if (err < 0)
  1682. return err;
  1683. chip->ac97_bus->private_free = snd_via82xx_mixer_free_ac97_bus;
  1684. chip->ac97_bus->clock = chip->ac97_clock;
  1685. memset(&ac97, 0, sizeof(ac97));
  1686. ac97.private_data = chip;
  1687. ac97.private_free = snd_via82xx_mixer_free_ac97;
  1688. ac97.pci = chip->pci;
  1689. ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
  1690. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
  1691. if (err < 0)
  1692. return err;
  1693. snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
  1694. if (chip->chip_type != TYPE_VIA686) {
  1695. /* use slot 10/11 */
  1696. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
  1697. }
  1698. return 0;
  1699. }
  1700. #ifdef SUPPORT_JOYSTICK
  1701. #define JOYSTICK_ADDR 0x200
  1702. static int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
  1703. {
  1704. struct gameport *gp;
  1705. if (!joystick)
  1706. return -ENODEV;
  1707. if (!devm_request_region(chip->card->dev, JOYSTICK_ADDR, 8,
  1708. "VIA686 gameport")) {
  1709. dev_warn(chip->card->dev, "cannot reserve joystick port %#x\n",
  1710. JOYSTICK_ADDR);
  1711. return -EBUSY;
  1712. }
  1713. chip->gameport = gp = gameport_allocate_port();
  1714. if (!gp) {
  1715. dev_err(chip->card->dev,
  1716. "cannot allocate memory for gameport\n");
  1717. return -ENOMEM;
  1718. }
  1719. gameport_set_name(gp, "VIA686 Gameport");
  1720. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1721. gameport_set_dev_parent(gp, &chip->pci->dev);
  1722. gp->io = JOYSTICK_ADDR;
  1723. /* Enable legacy joystick port */
  1724. *legacy |= VIA_FUNC_ENABLE_GAME;
  1725. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, *legacy);
  1726. gameport_register_port(chip->gameport);
  1727. return 0;
  1728. }
  1729. static void snd_via686_free_gameport(struct via82xx *chip)
  1730. {
  1731. if (chip->gameport) {
  1732. gameport_unregister_port(chip->gameport);
  1733. chip->gameport = NULL;
  1734. }
  1735. }
  1736. #else
  1737. static inline int snd_via686_create_gameport(struct via82xx *chip, unsigned char *legacy)
  1738. {
  1739. return -ENOSYS;
  1740. }
  1741. static inline void snd_via686_free_gameport(struct via82xx *chip) { }
  1742. #endif
  1743. /*
  1744. *
  1745. */
  1746. static int snd_via8233_init_misc(struct via82xx *chip)
  1747. {
  1748. int i, err, caps;
  1749. unsigned char val;
  1750. caps = chip->chip_type == TYPE_VIA8233A ? 1 : 2;
  1751. for (i = 0; i < caps; i++) {
  1752. snd_via8233_capture_source.index = i;
  1753. err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_capture_source, chip));
  1754. if (err < 0)
  1755. return err;
  1756. }
  1757. if (ac97_can_spdif(chip->ac97)) {
  1758. err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_dxs3_spdif_control, chip));
  1759. if (err < 0)
  1760. return err;
  1761. }
  1762. if (chip->chip_type != TYPE_VIA8233A) {
  1763. /* when no h/w PCM volume control is found, use DXS volume control
  1764. * as the PCM vol control
  1765. */
  1766. struct snd_ctl_elem_id sid;
  1767. memset(&sid, 0, sizeof(sid));
  1768. strcpy(sid.name, "PCM Playback Volume");
  1769. sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1770. if (! snd_ctl_find_id(chip->card, &sid)) {
  1771. dev_info(chip->card->dev,
  1772. "Using DXS as PCM Playback\n");
  1773. err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_via8233_pcmdxs_volume_control, chip));
  1774. if (err < 0)
  1775. return err;
  1776. }
  1777. else /* Using DXS when PCM emulation is enabled is really weird */
  1778. {
  1779. for (i = 0; i < 4; ++i) {
  1780. struct snd_kcontrol *kctl;
  1781. kctl = snd_ctl_new1(
  1782. &snd_via8233_dxs_volume_control, chip);
  1783. if (!kctl)
  1784. return -ENOMEM;
  1785. kctl->id.subdevice = i;
  1786. err = snd_ctl_add(chip->card, kctl);
  1787. if (err < 0)
  1788. return err;
  1789. chip->dxs_controls[i] = kctl;
  1790. }
  1791. }
  1792. }
  1793. /* select spdif data slot 10/11 */
  1794. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &val);
  1795. val = (val & ~VIA8233_SPDIF_SLOT_MASK) | VIA8233_SPDIF_SLOT_1011;
  1796. val &= ~VIA8233_SPDIF_DX3; /* SPDIF off as default */
  1797. pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, val);
  1798. return 0;
  1799. }
  1800. static int snd_via686_init_misc(struct via82xx *chip)
  1801. {
  1802. unsigned char legacy, legacy_cfg;
  1803. int rev_h = 0;
  1804. legacy = chip->old_legacy;
  1805. legacy_cfg = chip->old_legacy_cfg;
  1806. legacy |= VIA_FUNC_MIDI_IRQMASK; /* FIXME: correct? (disable MIDI) */
  1807. legacy &= ~VIA_FUNC_ENABLE_GAME; /* disable joystick */
  1808. if (chip->revision >= VIA_REV_686_H) {
  1809. rev_h = 1;
  1810. if (mpu_port >= 0x200) { /* force MIDI */
  1811. mpu_port &= 0xfffc;
  1812. pci_write_config_dword(chip->pci, 0x18, mpu_port | 0x01);
  1813. #ifdef CONFIG_PM_SLEEP
  1814. chip->mpu_port_saved = mpu_port;
  1815. #endif
  1816. } else {
  1817. mpu_port = pci_resource_start(chip->pci, 2);
  1818. }
  1819. } else {
  1820. switch (mpu_port) { /* force MIDI */
  1821. case 0x300:
  1822. case 0x310:
  1823. case 0x320:
  1824. case 0x330:
  1825. legacy_cfg &= ~(3 << 2);
  1826. legacy_cfg |= (mpu_port & 0x0030) >> 2;
  1827. break;
  1828. default: /* no, use BIOS settings */
  1829. if (legacy & VIA_FUNC_ENABLE_MIDI)
  1830. mpu_port = 0x300 + ((legacy_cfg & 0x000c) << 2);
  1831. break;
  1832. }
  1833. }
  1834. if (mpu_port >= 0x200)
  1835. chip->mpu_res = devm_request_region(&chip->pci->dev, mpu_port,
  1836. 2, "VIA82xx MPU401");
  1837. if (chip->mpu_res) {
  1838. if (rev_h)
  1839. legacy |= VIA_FUNC_MIDI_PNP; /* enable PCI I/O 2 */
  1840. legacy |= VIA_FUNC_ENABLE_MIDI;
  1841. } else {
  1842. if (rev_h)
  1843. legacy &= ~VIA_FUNC_MIDI_PNP; /* disable PCI I/O 2 */
  1844. legacy &= ~VIA_FUNC_ENABLE_MIDI;
  1845. mpu_port = 0;
  1846. }
  1847. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
  1848. pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, legacy_cfg);
  1849. if (chip->mpu_res) {
  1850. if (snd_mpu401_uart_new(chip->card, 0, MPU401_HW_VIA686A,
  1851. mpu_port, MPU401_INFO_INTEGRATED |
  1852. MPU401_INFO_IRQ_HOOK, -1,
  1853. &chip->rmidi) < 0) {
  1854. dev_warn(chip->card->dev,
  1855. "unable to initialize MPU-401 at 0x%lx, skipping\n",
  1856. mpu_port);
  1857. legacy &= ~VIA_FUNC_ENABLE_MIDI;
  1858. } else {
  1859. legacy &= ~VIA_FUNC_MIDI_IRQMASK; /* enable MIDI interrupt */
  1860. }
  1861. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, legacy);
  1862. }
  1863. snd_via686_create_gameport(chip, &legacy);
  1864. #ifdef CONFIG_PM_SLEEP
  1865. chip->legacy_saved = legacy;
  1866. chip->legacy_cfg_saved = legacy_cfg;
  1867. #endif
  1868. return 0;
  1869. }
  1870. /*
  1871. * proc interface
  1872. */
  1873. static void snd_via82xx_proc_read(struct snd_info_entry *entry,
  1874. struct snd_info_buffer *buffer)
  1875. {
  1876. struct via82xx *chip = entry->private_data;
  1877. int i;
  1878. snd_iprintf(buffer, "%s\n\n", chip->card->longname);
  1879. for (i = 0; i < 0xa0; i += 4) {
  1880. snd_iprintf(buffer, "%02x: %08x\n", i, inl(chip->port + i));
  1881. }
  1882. }
  1883. static void snd_via82xx_proc_init(struct via82xx *chip)
  1884. {
  1885. snd_card_ro_proc_new(chip->card, "via82xx", chip,
  1886. snd_via82xx_proc_read);
  1887. }
  1888. /*
  1889. *
  1890. */
  1891. static int snd_via82xx_chip_init(struct via82xx *chip)
  1892. {
  1893. unsigned int val;
  1894. unsigned long end_time;
  1895. unsigned char pval;
  1896. #if 0 /* broken on K7M? */
  1897. if (chip->chip_type == TYPE_VIA686)
  1898. /* disable all legacy ports */
  1899. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, 0);
  1900. #endif
  1901. pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
  1902. if (! (pval & VIA_ACLINK_C00_READY)) { /* codec not ready? */
  1903. /* deassert ACLink reset, force SYNC */
  1904. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
  1905. VIA_ACLINK_CTRL_ENABLE |
  1906. VIA_ACLINK_CTRL_RESET |
  1907. VIA_ACLINK_CTRL_SYNC);
  1908. udelay(100);
  1909. #if 1 /* FIXME: should we do full reset here for all chip models? */
  1910. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, 0x00);
  1911. udelay(100);
  1912. #else
  1913. /* deassert ACLink reset, force SYNC (warm AC'97 reset) */
  1914. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL,
  1915. VIA_ACLINK_CTRL_RESET|VIA_ACLINK_CTRL_SYNC);
  1916. udelay(2);
  1917. #endif
  1918. /* ACLink on, deassert ACLink reset, VSR, SGD data out */
  1919. /* note - FM data out has trouble with non VRA codecs !! */
  1920. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
  1921. udelay(100);
  1922. }
  1923. /* Make sure VRA is enabled, in case we didn't do a
  1924. * complete codec reset, above */
  1925. pci_read_config_byte(chip->pci, VIA_ACLINK_CTRL, &pval);
  1926. if ((pval & VIA_ACLINK_CTRL_INIT) != VIA_ACLINK_CTRL_INIT) {
  1927. /* ACLink on, deassert ACLink reset, VSR, SGD data out */
  1928. /* note - FM data out has trouble with non VRA codecs !! */
  1929. pci_write_config_byte(chip->pci, VIA_ACLINK_CTRL, VIA_ACLINK_CTRL_INIT);
  1930. udelay(100);
  1931. }
  1932. /* wait until codec ready */
  1933. end_time = jiffies + msecs_to_jiffies(750);
  1934. do {
  1935. pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
  1936. if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
  1937. break;
  1938. schedule_timeout_uninterruptible(1);
  1939. } while (time_before(jiffies, end_time));
  1940. val = snd_via82xx_codec_xread(chip);
  1941. if (val & VIA_REG_AC97_BUSY)
  1942. dev_err(chip->card->dev,
  1943. "AC'97 codec is not ready [0x%x]\n", val);
  1944. #if 0 /* FIXME: we don't support the second codec yet so skip the detection now.. */
  1945. snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
  1946. VIA_REG_AC97_SECONDARY_VALID |
  1947. (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
  1948. end_time = jiffies + msecs_to_jiffies(750);
  1949. snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
  1950. VIA_REG_AC97_SECONDARY_VALID |
  1951. (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
  1952. do {
  1953. val = snd_via82xx_codec_xread(chip);
  1954. if (val & VIA_REG_AC97_SECONDARY_VALID) {
  1955. chip->ac97_secondary = 1;
  1956. goto __ac97_ok2;
  1957. }
  1958. schedule_timeout_uninterruptible(1);
  1959. } while (time_before(jiffies, end_time));
  1960. /* This is ok, the most of motherboards have only one codec */
  1961. __ac97_ok2:
  1962. #endif
  1963. if (chip->chip_type == TYPE_VIA686) {
  1964. /* route FM trap to IRQ, disable FM trap */
  1965. pci_write_config_byte(chip->pci, VIA_FM_NMI_CTRL, 0);
  1966. /* disable all GPI interrupts */
  1967. outl(0, VIAREG(chip, GPI_INTR));
  1968. }
  1969. if (chip->chip_type != TYPE_VIA686) {
  1970. /* Workaround for Award BIOS bug:
  1971. * DXS channels don't work properly with VRA if MC97 is disabled.
  1972. */
  1973. struct pci_dev *pci;
  1974. pci = pci_get_device(0x1106, 0x3068, NULL); /* MC97 */
  1975. if (pci) {
  1976. unsigned char data;
  1977. pci_read_config_byte(pci, 0x44, &data);
  1978. pci_write_config_byte(pci, 0x44, data | 0x40);
  1979. pci_dev_put(pci);
  1980. }
  1981. }
  1982. if (chip->chip_type != TYPE_VIA8233A) {
  1983. int i, idx;
  1984. for (idx = 0; idx < 4; idx++) {
  1985. unsigned long port = chip->port + 0x10 * idx;
  1986. for (i = 0; i < 2; i++) {
  1987. chip->playback_volume[idx][i]=chip->playback_volume_c[i];
  1988. outb(chip->playback_volume_c[i],
  1989. port + VIA_REG_OFS_PLAYBACK_VOLUME_L + i);
  1990. }
  1991. }
  1992. }
  1993. return 0;
  1994. }
  1995. #ifdef CONFIG_PM_SLEEP
  1996. /*
  1997. * power management
  1998. */
  1999. static int snd_via82xx_suspend(struct device *dev)
  2000. {
  2001. struct snd_card *card = dev_get_drvdata(dev);
  2002. struct via82xx *chip = card->private_data;
  2003. int i;
  2004. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2005. for (i = 0; i < chip->num_devs; i++)
  2006. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  2007. snd_ac97_suspend(chip->ac97);
  2008. /* save misc values */
  2009. if (chip->chip_type != TYPE_VIA686) {
  2010. pci_read_config_byte(chip->pci, VIA8233_SPDIF_CTRL, &chip->spdif_ctrl_saved);
  2011. chip->capture_src_saved[0] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL);
  2012. chip->capture_src_saved[1] = inb(chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
  2013. }
  2014. return 0;
  2015. }
  2016. static int snd_via82xx_resume(struct device *dev)
  2017. {
  2018. struct snd_card *card = dev_get_drvdata(dev);
  2019. struct via82xx *chip = card->private_data;
  2020. int i;
  2021. snd_via82xx_chip_init(chip);
  2022. if (chip->chip_type == TYPE_VIA686) {
  2023. if (chip->mpu_port_saved)
  2024. pci_write_config_dword(chip->pci, 0x18, chip->mpu_port_saved | 0x01);
  2025. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->legacy_saved);
  2026. pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->legacy_cfg_saved);
  2027. } else {
  2028. pci_write_config_byte(chip->pci, VIA8233_SPDIF_CTRL, chip->spdif_ctrl_saved);
  2029. outb(chip->capture_src_saved[0], chip->port + VIA_REG_CAPTURE_CHANNEL);
  2030. outb(chip->capture_src_saved[1], chip->port + VIA_REG_CAPTURE_CHANNEL + 0x10);
  2031. }
  2032. snd_ac97_resume(chip->ac97);
  2033. for (i = 0; i < chip->num_devs; i++)
  2034. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  2035. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2036. return 0;
  2037. }
  2038. static SIMPLE_DEV_PM_OPS(snd_via82xx_pm, snd_via82xx_suspend, snd_via82xx_resume);
  2039. #define SND_VIA82XX_PM_OPS &snd_via82xx_pm
  2040. #else
  2041. #define SND_VIA82XX_PM_OPS NULL
  2042. #endif /* CONFIG_PM_SLEEP */
  2043. static void snd_via82xx_free(struct snd_card *card)
  2044. {
  2045. struct via82xx *chip = card->private_data;
  2046. unsigned int i;
  2047. /* disable interrupts */
  2048. for (i = 0; i < chip->num_devs; i++)
  2049. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  2050. if (chip->chip_type == TYPE_VIA686) {
  2051. snd_via686_free_gameport(chip);
  2052. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE, chip->old_legacy);
  2053. pci_write_config_byte(chip->pci, VIA_PNP_CONTROL, chip->old_legacy_cfg);
  2054. }
  2055. }
  2056. static int snd_via82xx_create(struct snd_card *card,
  2057. struct pci_dev *pci,
  2058. int chip_type,
  2059. int revision,
  2060. unsigned int ac97_clock)
  2061. {
  2062. struct via82xx *chip = card->private_data;
  2063. int err;
  2064. err = pcim_enable_device(pci);
  2065. if (err < 0)
  2066. return err;
  2067. chip->chip_type = chip_type;
  2068. chip->revision = revision;
  2069. spin_lock_init(&chip->reg_lock);
  2070. spin_lock_init(&chip->rates[0].lock);
  2071. spin_lock_init(&chip->rates[1].lock);
  2072. chip->card = card;
  2073. chip->pci = pci;
  2074. chip->irq = -1;
  2075. pci_read_config_byte(pci, VIA_FUNC_ENABLE, &chip->old_legacy);
  2076. pci_read_config_byte(pci, VIA_PNP_CONTROL, &chip->old_legacy_cfg);
  2077. pci_write_config_byte(chip->pci, VIA_FUNC_ENABLE,
  2078. chip->old_legacy & ~(VIA_FUNC_ENABLE_SB|VIA_FUNC_ENABLE_FM));
  2079. err = pci_request_regions(pci, card->driver);
  2080. if (err < 0)
  2081. return err;
  2082. chip->port = pci_resource_start(pci, 0);
  2083. if (devm_request_irq(&pci->dev, pci->irq,
  2084. chip_type == TYPE_VIA8233 ?
  2085. snd_via8233_interrupt : snd_via686_interrupt,
  2086. IRQF_SHARED,
  2087. KBUILD_MODNAME, chip)) {
  2088. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  2089. return -EBUSY;
  2090. }
  2091. chip->irq = pci->irq;
  2092. card->sync_irq = chip->irq;
  2093. card->private_free = snd_via82xx_free;
  2094. if (ac97_clock >= 8000 && ac97_clock <= 48000)
  2095. chip->ac97_clock = ac97_clock;
  2096. err = snd_via82xx_chip_init(chip);
  2097. if (err < 0)
  2098. return err;
  2099. /* The 8233 ac97 controller does not implement the master bit
  2100. * in the pci command register. IMHO this is a violation of the PCI spec.
  2101. * We call pci_set_master here because it does not hurt. */
  2102. pci_set_master(pci);
  2103. return 0;
  2104. }
  2105. struct via823x_info {
  2106. int revision;
  2107. char *name;
  2108. int type;
  2109. };
  2110. static const struct via823x_info via823x_cards[] = {
  2111. { VIA_REV_PRE_8233, "VIA 8233-Pre", TYPE_VIA8233 },
  2112. { VIA_REV_8233C, "VIA 8233C", TYPE_VIA8233 },
  2113. { VIA_REV_8233, "VIA 8233", TYPE_VIA8233 },
  2114. { VIA_REV_8233A, "VIA 8233A", TYPE_VIA8233A },
  2115. { VIA_REV_8235, "VIA 8235", TYPE_VIA8233 },
  2116. { VIA_REV_8237, "VIA 8237", TYPE_VIA8233 },
  2117. { VIA_REV_8251, "VIA 8251", TYPE_VIA8233 },
  2118. };
  2119. /*
  2120. * auto detection of DXS channel supports.
  2121. */
  2122. static const struct snd_pci_quirk dxs_allowlist[] = {
  2123. SND_PCI_QUIRK(0x1005, 0x4710, "Avance Logic Mobo", VIA_DXS_ENABLE),
  2124. SND_PCI_QUIRK(0x1019, 0x0996, "ESC Mobo", VIA_DXS_48K),
  2125. SND_PCI_QUIRK(0x1019, 0x0a81, "ECS K7VTA3 v8.0", VIA_DXS_NO_VRA),
  2126. SND_PCI_QUIRK(0x1019, 0x0a85, "ECS L7VMM2", VIA_DXS_NO_VRA),
  2127. SND_PCI_QUIRK_VENDOR(0x1019, "ESC K8", VIA_DXS_SRC),
  2128. SND_PCI_QUIRK(0x1019, 0xaa01, "ESC K8T890-A", VIA_DXS_SRC),
  2129. SND_PCI_QUIRK(0x1025, 0x0033, "Acer Inspire 1353LM", VIA_DXS_NO_VRA),
  2130. SND_PCI_QUIRK(0x1025, 0x0046, "Acer Aspire 1524 WLMi", VIA_DXS_SRC),
  2131. SND_PCI_QUIRK_VENDOR(0x1043, "ASUS A7/A8", VIA_DXS_NO_VRA),
  2132. SND_PCI_QUIRK_VENDOR(0x1071, "Diverse Notebook", VIA_DXS_NO_VRA),
  2133. SND_PCI_QUIRK(0x10cf, 0x118e, "FSC Laptop", VIA_DXS_ENABLE),
  2134. SND_PCI_QUIRK_VENDOR(0x1106, "ASRock", VIA_DXS_SRC),
  2135. SND_PCI_QUIRK(0x1297, 0xa231, "Shuttle AK31v2", VIA_DXS_SRC),
  2136. SND_PCI_QUIRK(0x1297, 0xa232, "Shuttle", VIA_DXS_SRC),
  2137. SND_PCI_QUIRK(0x1297, 0xc160, "Shuttle Sk41G", VIA_DXS_SRC),
  2138. SND_PCI_QUIRK(0x1458, 0xa002, "Gigabyte GA-7VAXP", VIA_DXS_ENABLE),
  2139. SND_PCI_QUIRK(0x1462, 0x3800, "MSI KT266", VIA_DXS_ENABLE),
  2140. SND_PCI_QUIRK(0x1462, 0x7120, "MSI KT4V", VIA_DXS_ENABLE),
  2141. SND_PCI_QUIRK(0x1462, 0x7142, "MSI K8MM-V", VIA_DXS_ENABLE),
  2142. SND_PCI_QUIRK_VENDOR(0x1462, "MSI Mobo", VIA_DXS_SRC),
  2143. SND_PCI_QUIRK(0x147b, 0x1401, "ABIT KD7(-RAID)", VIA_DXS_ENABLE),
  2144. SND_PCI_QUIRK(0x147b, 0x1411, "ABIT VA-20", VIA_DXS_ENABLE),
  2145. SND_PCI_QUIRK(0x147b, 0x1413, "ABIT KV8 Pro", VIA_DXS_ENABLE),
  2146. SND_PCI_QUIRK(0x147b, 0x1415, "ABIT AV8", VIA_DXS_NO_VRA),
  2147. SND_PCI_QUIRK(0x14ff, 0x0403, "Twinhead mobo", VIA_DXS_ENABLE),
  2148. SND_PCI_QUIRK(0x14ff, 0x0408, "Twinhead laptop", VIA_DXS_SRC),
  2149. SND_PCI_QUIRK(0x1558, 0x4701, "Clevo D470", VIA_DXS_SRC),
  2150. SND_PCI_QUIRK(0x1584, 0x8120, "Diverse Laptop", VIA_DXS_ENABLE),
  2151. SND_PCI_QUIRK(0x1584, 0x8123, "Targa/Uniwill", VIA_DXS_NO_VRA),
  2152. SND_PCI_QUIRK(0x161f, 0x202b, "Amira Notebook", VIA_DXS_NO_VRA),
  2153. SND_PCI_QUIRK(0x161f, 0x2032, "m680x machines", VIA_DXS_48K),
  2154. SND_PCI_QUIRK(0x1631, 0xe004, "PB EasyNote 3174", VIA_DXS_ENABLE),
  2155. SND_PCI_QUIRK(0x1695, 0x3005, "EPoX EP-8K9A", VIA_DXS_ENABLE),
  2156. SND_PCI_QUIRK_VENDOR(0x1695, "EPoX mobo", VIA_DXS_SRC),
  2157. SND_PCI_QUIRK_VENDOR(0x16f3, "Jetway K8", VIA_DXS_SRC),
  2158. SND_PCI_QUIRK_VENDOR(0x1734, "FSC Laptop", VIA_DXS_SRC),
  2159. SND_PCI_QUIRK(0x1849, 0x3059, "ASRock K7VM2", VIA_DXS_NO_VRA),
  2160. SND_PCI_QUIRK_VENDOR(0x1849, "ASRock mobo", VIA_DXS_SRC),
  2161. SND_PCI_QUIRK(0x1919, 0x200a, "Soltek SL-K8", VIA_DXS_NO_VRA),
  2162. SND_PCI_QUIRK(0x4005, 0x4710, "MSI K7T266", VIA_DXS_SRC),
  2163. { } /* terminator */
  2164. };
  2165. static int check_dxs_list(struct pci_dev *pci, int revision)
  2166. {
  2167. const struct snd_pci_quirk *w;
  2168. w = snd_pci_quirk_lookup(pci, dxs_allowlist);
  2169. if (w) {
  2170. dev_dbg(&pci->dev, "DXS allow list for %s found\n",
  2171. snd_pci_quirk_name(w));
  2172. return w->value;
  2173. }
  2174. /* for newer revision, default to DXS_SRC */
  2175. if (revision >= VIA_REV_8235)
  2176. return VIA_DXS_SRC;
  2177. /*
  2178. * not detected, try 48k rate only to be sure.
  2179. */
  2180. dev_info(&pci->dev, "Assuming DXS channels with 48k fixed sample rate.\n");
  2181. dev_info(&pci->dev, " Please try dxs_support=5 option\n");
  2182. dev_info(&pci->dev, " and report if it works on your machine.\n");
  2183. dev_info(&pci->dev, " For more details, read ALSA-Configuration.txt.\n");
  2184. return VIA_DXS_48K;
  2185. };
  2186. static int __snd_via82xx_probe(struct pci_dev *pci,
  2187. const struct pci_device_id *pci_id)
  2188. {
  2189. struct snd_card *card;
  2190. struct via82xx *chip;
  2191. int chip_type = 0, card_type;
  2192. unsigned int i;
  2193. int err;
  2194. err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
  2195. sizeof(*chip), &card);
  2196. if (err < 0)
  2197. return err;
  2198. chip = card->private_data;
  2199. card_type = pci_id->driver_data;
  2200. switch (card_type) {
  2201. case TYPE_CARD_VIA686:
  2202. strcpy(card->driver, "VIA686A");
  2203. sprintf(card->shortname, "VIA 82C686A/B rev%x", pci->revision);
  2204. chip_type = TYPE_VIA686;
  2205. break;
  2206. case TYPE_CARD_VIA8233:
  2207. chip_type = TYPE_VIA8233;
  2208. sprintf(card->shortname, "VIA 823x rev%x", pci->revision);
  2209. for (i = 0; i < ARRAY_SIZE(via823x_cards); i++) {
  2210. if (pci->revision == via823x_cards[i].revision) {
  2211. chip_type = via823x_cards[i].type;
  2212. strcpy(card->shortname, via823x_cards[i].name);
  2213. break;
  2214. }
  2215. }
  2216. if (chip_type != TYPE_VIA8233A) {
  2217. if (dxs_support == VIA_DXS_AUTO)
  2218. dxs_support = check_dxs_list(pci, pci->revision);
  2219. /* force to use VIA8233 or 8233A model according to
  2220. * dxs_support module option
  2221. */
  2222. if (dxs_support == VIA_DXS_DISABLE)
  2223. chip_type = TYPE_VIA8233A;
  2224. else
  2225. chip_type = TYPE_VIA8233;
  2226. }
  2227. if (chip_type == TYPE_VIA8233A)
  2228. strcpy(card->driver, "VIA8233A");
  2229. else if (pci->revision >= VIA_REV_8237)
  2230. strcpy(card->driver, "VIA8237"); /* no slog assignment */
  2231. else
  2232. strcpy(card->driver, "VIA8233");
  2233. break;
  2234. default:
  2235. dev_err(card->dev, "invalid card type %d\n", card_type);
  2236. return -EINVAL;
  2237. }
  2238. err = snd_via82xx_create(card, pci, chip_type, pci->revision,
  2239. ac97_clock);
  2240. if (err < 0)
  2241. return err;
  2242. err = snd_via82xx_mixer_new(chip, ac97_quirk);
  2243. if (err < 0)
  2244. return err;
  2245. if (chip_type == TYPE_VIA686) {
  2246. err = snd_via686_pcm_new(chip);
  2247. if (err < 0)
  2248. return err;
  2249. err = snd_via686_init_misc(chip);
  2250. if (err < 0)
  2251. return err;
  2252. } else {
  2253. if (chip_type == TYPE_VIA8233A) {
  2254. err = snd_via8233a_pcm_new(chip);
  2255. if (err < 0)
  2256. return err;
  2257. // chip->dxs_fixed = 1; /* FIXME: use 48k for DXS #3? */
  2258. } else {
  2259. err = snd_via8233_pcm_new(chip);
  2260. if (err < 0)
  2261. return err;
  2262. if (dxs_support == VIA_DXS_48K)
  2263. chip->dxs_fixed = 1;
  2264. else if (dxs_support == VIA_DXS_NO_VRA)
  2265. chip->no_vra = 1;
  2266. else if (dxs_support == VIA_DXS_SRC) {
  2267. chip->no_vra = 1;
  2268. chip->dxs_src = 1;
  2269. }
  2270. }
  2271. err = snd_via8233_init_misc(chip);
  2272. if (err < 0)
  2273. return err;
  2274. }
  2275. /* disable interrupts */
  2276. for (i = 0; i < chip->num_devs; i++)
  2277. snd_via82xx_channel_reset(chip, &chip->devs[i]);
  2278. snprintf(card->longname, sizeof(card->longname),
  2279. "%s with %s at %#lx, irq %d", card->shortname,
  2280. snd_ac97_get_short_name(chip->ac97), chip->port, chip->irq);
  2281. snd_via82xx_proc_init(chip);
  2282. err = snd_card_register(card);
  2283. if (err < 0)
  2284. return err;
  2285. pci_set_drvdata(pci, card);
  2286. return 0;
  2287. }
  2288. static int snd_via82xx_probe(struct pci_dev *pci,
  2289. const struct pci_device_id *pci_id)
  2290. {
  2291. return snd_card_free_on_error(&pci->dev, __snd_via82xx_probe(pci, pci_id));
  2292. }
  2293. static struct pci_driver via82xx_driver = {
  2294. .name = KBUILD_MODNAME,
  2295. .id_table = snd_via82xx_ids,
  2296. .probe = snd_via82xx_probe,
  2297. .driver = {
  2298. .pm = SND_VIA82XX_PM_OPS,
  2299. },
  2300. };
  2301. module_pci_driver(via82xx_driver);