pcxhr_hwdep.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Driver for Digigram pcxhr compatible soundcards
  4. *
  5. * hwdep device manager
  6. *
  7. * Copyright (c) 2004 by Digigram <[email protected]>
  8. */
  9. #include <linux/interrupt.h>
  10. #include <linux/vmalloc.h>
  11. #include <linux/firmware.h>
  12. #include <linux/pci.h>
  13. #include <linux/module.h>
  14. #include <linux/io.h>
  15. #include <sound/core.h>
  16. #include <sound/hwdep.h>
  17. #include "pcxhr.h"
  18. #include "pcxhr_mixer.h"
  19. #include "pcxhr_hwdep.h"
  20. #include "pcxhr_core.h"
  21. #include "pcxhr_mix22.h"
  22. static int pcxhr_sub_init(struct pcxhr_mgr *mgr);
  23. /*
  24. * get basic information and init pcxhr card
  25. */
  26. static int pcxhr_init_board(struct pcxhr_mgr *mgr)
  27. {
  28. int err;
  29. struct pcxhr_rmh rmh;
  30. int card_streams;
  31. /* calc the number of all streams used */
  32. if (mgr->mono_capture)
  33. card_streams = mgr->capture_chips * 2;
  34. else
  35. card_streams = mgr->capture_chips;
  36. card_streams += mgr->playback_chips * PCXHR_PLAYBACK_STREAMS;
  37. /* enable interrupts */
  38. pcxhr_enable_dsp(mgr);
  39. pcxhr_init_rmh(&rmh, CMD_SUPPORTED);
  40. err = pcxhr_send_msg(mgr, &rmh);
  41. if (err)
  42. return err;
  43. /* test 4, 8 or 12 phys out */
  44. if ((rmh.stat[0] & MASK_FIRST_FIELD) < mgr->playback_chips * 2)
  45. return -EINVAL;
  46. /* test 4, 8 or 2 phys in */
  47. if (((rmh.stat[0] >> (2 * FIELD_SIZE)) & MASK_FIRST_FIELD) <
  48. mgr->capture_chips * 2)
  49. return -EINVAL;
  50. /* test max nb substream per board */
  51. if ((rmh.stat[1] & 0x5F) < card_streams)
  52. return -EINVAL;
  53. /* test max nb substream per pipe */
  54. if (((rmh.stat[1] >> 7) & 0x5F) < PCXHR_PLAYBACK_STREAMS)
  55. return -EINVAL;
  56. dev_dbg(&mgr->pci->dev,
  57. "supported formats : playback=%x capture=%x\n",
  58. rmh.stat[2], rmh.stat[3]);
  59. pcxhr_init_rmh(&rmh, CMD_VERSION);
  60. /* firmware num for DSP */
  61. rmh.cmd[0] |= mgr->firmware_num;
  62. /* transfer granularity in samples (should be multiple of 48) */
  63. rmh.cmd[1] = (1<<23) + mgr->granularity;
  64. rmh.cmd_len = 2;
  65. err = pcxhr_send_msg(mgr, &rmh);
  66. if (err)
  67. return err;
  68. dev_dbg(&mgr->pci->dev,
  69. "PCXHR DSP version is %d.%d.%d\n", (rmh.stat[0]>>16)&0xff,
  70. (rmh.stat[0]>>8)&0xff, rmh.stat[0]&0xff);
  71. mgr->dsp_version = rmh.stat[0];
  72. if (mgr->is_hr_stereo)
  73. err = hr222_sub_init(mgr);
  74. else
  75. err = pcxhr_sub_init(mgr);
  76. return err;
  77. }
  78. static int pcxhr_sub_init(struct pcxhr_mgr *mgr)
  79. {
  80. int err;
  81. struct pcxhr_rmh rmh;
  82. /* get options */
  83. pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
  84. rmh.cmd[0] |= IO_NUM_REG_STATUS;
  85. rmh.cmd[1] = REG_STATUS_OPTIONS;
  86. rmh.cmd_len = 2;
  87. err = pcxhr_send_msg(mgr, &rmh);
  88. if (err)
  89. return err;
  90. if ((rmh.stat[1] & REG_STATUS_OPT_DAUGHTER_MASK) ==
  91. REG_STATUS_OPT_ANALOG_BOARD)
  92. mgr->board_has_analog = 1; /* analog addon board found */
  93. /* unmute inputs */
  94. err = pcxhr_write_io_num_reg_cont(mgr, REG_CONT_UNMUTE_INPUTS,
  95. REG_CONT_UNMUTE_INPUTS, NULL);
  96. if (err)
  97. return err;
  98. /* unmute outputs (a write to IO_NUM_REG_MUTE_OUT mutes!) */
  99. pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
  100. rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
  101. if (DSP_EXT_CMD_SET(mgr)) {
  102. rmh.cmd[1] = 1; /* unmute digital plugs */
  103. rmh.cmd_len = 2;
  104. }
  105. err = pcxhr_send_msg(mgr, &rmh);
  106. return err;
  107. }
  108. void pcxhr_reset_board(struct pcxhr_mgr *mgr)
  109. {
  110. struct pcxhr_rmh rmh;
  111. if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
  112. /* mute outputs */
  113. if (!mgr->is_hr_stereo) {
  114. /* a read to IO_NUM_REG_MUTE_OUT register unmutes! */
  115. pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
  116. rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
  117. pcxhr_send_msg(mgr, &rmh);
  118. /* mute inputs */
  119. pcxhr_write_io_num_reg_cont(mgr, REG_CONT_UNMUTE_INPUTS,
  120. 0, NULL);
  121. }
  122. /* stereo cards mute with reset of dsp */
  123. }
  124. /* reset pcxhr dsp */
  125. if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_EPRM_INDEX))
  126. pcxhr_reset_dsp(mgr);
  127. /* reset second xilinx */
  128. if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_XLX_COM_INDEX)) {
  129. pcxhr_reset_xilinx_com(mgr);
  130. mgr->dsp_loaded = 1;
  131. }
  132. return;
  133. }
  134. /*
  135. * allocate a playback/capture pipe (pcmp0/pcmc0)
  136. */
  137. static int pcxhr_dsp_allocate_pipe(struct pcxhr_mgr *mgr,
  138. struct pcxhr_pipe *pipe,
  139. int is_capture, int pin)
  140. {
  141. int stream_count, audio_count;
  142. int err;
  143. struct pcxhr_rmh rmh;
  144. if (is_capture) {
  145. stream_count = 1;
  146. if (mgr->mono_capture)
  147. audio_count = 1;
  148. else
  149. audio_count = 2;
  150. } else {
  151. stream_count = PCXHR_PLAYBACK_STREAMS;
  152. audio_count = 2; /* always stereo */
  153. }
  154. dev_dbg(&mgr->pci->dev, "snd_add_ref_pipe pin(%d) pcm%c0\n",
  155. pin, is_capture ? 'c' : 'p');
  156. pipe->is_capture = is_capture;
  157. pipe->first_audio = pin;
  158. /* define pipe (P_PCM_ONLY_MASK (0x020000) is not necessary) */
  159. pcxhr_init_rmh(&rmh, CMD_RES_PIPE);
  160. pcxhr_set_pipe_cmd_params(&rmh, is_capture, pin,
  161. audio_count, stream_count);
  162. rmh.cmd[1] |= 0x020000; /* add P_PCM_ONLY_MASK */
  163. if (DSP_EXT_CMD_SET(mgr)) {
  164. /* add channel mask to command */
  165. rmh.cmd[rmh.cmd_len++] = (audio_count == 1) ? 0x01 : 0x03;
  166. }
  167. err = pcxhr_send_msg(mgr, &rmh);
  168. if (err < 0) {
  169. dev_err(&mgr->pci->dev, "error pipe allocation "
  170. "(CMD_RES_PIPE) err=%x!\n", err);
  171. return err;
  172. }
  173. pipe->status = PCXHR_PIPE_DEFINED;
  174. return 0;
  175. }
  176. /*
  177. * free playback/capture pipe (pcmp0/pcmc0)
  178. */
  179. #if 0
  180. static int pcxhr_dsp_free_pipe( struct pcxhr_mgr *mgr, struct pcxhr_pipe *pipe)
  181. {
  182. struct pcxhr_rmh rmh;
  183. int capture_mask = 0;
  184. int playback_mask = 0;
  185. int err = 0;
  186. if (pipe->is_capture)
  187. capture_mask = (1 << pipe->first_audio);
  188. else
  189. playback_mask = (1 << pipe->first_audio);
  190. /* stop one pipe */
  191. err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0);
  192. if (err < 0)
  193. dev_err(&mgr->pci->dev, "error stopping pipe!\n");
  194. /* release the pipe */
  195. pcxhr_init_rmh(&rmh, CMD_FREE_PIPE);
  196. pcxhr_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->first_audio,
  197. 0, 0);
  198. err = pcxhr_send_msg(mgr, &rmh);
  199. if (err < 0)
  200. dev_err(&mgr->pci->dev, "error pipe release "
  201. "(CMD_FREE_PIPE) err(%x)\n", err);
  202. pipe->status = PCXHR_PIPE_UNDEFINED;
  203. return err;
  204. }
  205. #endif
  206. static int pcxhr_config_pipes(struct pcxhr_mgr *mgr)
  207. {
  208. int err, i, j;
  209. struct snd_pcxhr *chip;
  210. struct pcxhr_pipe *pipe;
  211. /* allocate the pipes on the dsp */
  212. for (i = 0; i < mgr->num_cards; i++) {
  213. chip = mgr->chip[i];
  214. if (chip->nb_streams_play) {
  215. pipe = &chip->playback_pipe;
  216. err = pcxhr_dsp_allocate_pipe( mgr, pipe, 0, i*2);
  217. if (err)
  218. return err;
  219. for(j = 0; j < chip->nb_streams_play; j++)
  220. chip->playback_stream[j].pipe = pipe;
  221. }
  222. for (j = 0; j < chip->nb_streams_capt; j++) {
  223. pipe = &chip->capture_pipe[j];
  224. err = pcxhr_dsp_allocate_pipe(mgr, pipe, 1, i*2 + j);
  225. if (err)
  226. return err;
  227. chip->capture_stream[j].pipe = pipe;
  228. }
  229. }
  230. return 0;
  231. }
  232. static int pcxhr_start_pipes(struct pcxhr_mgr *mgr)
  233. {
  234. int i, j;
  235. struct snd_pcxhr *chip;
  236. int playback_mask = 0;
  237. int capture_mask = 0;
  238. /* start all the pipes on the dsp */
  239. for (i = 0; i < mgr->num_cards; i++) {
  240. chip = mgr->chip[i];
  241. if (chip->nb_streams_play)
  242. playback_mask |= 1 << chip->playback_pipe.first_audio;
  243. for (j = 0; j < chip->nb_streams_capt; j++)
  244. capture_mask |= 1 << chip->capture_pipe[j].first_audio;
  245. }
  246. return pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1);
  247. }
  248. static int pcxhr_dsp_load(struct pcxhr_mgr *mgr, int index,
  249. const struct firmware *dsp)
  250. {
  251. int err, card_index;
  252. dev_dbg(&mgr->pci->dev,
  253. "loading dsp [%d] size = %zd\n", index, dsp->size);
  254. switch (index) {
  255. case PCXHR_FIRMWARE_XLX_INT_INDEX:
  256. pcxhr_reset_xilinx_com(mgr);
  257. return pcxhr_load_xilinx_binary(mgr, dsp, 0);
  258. case PCXHR_FIRMWARE_XLX_COM_INDEX:
  259. pcxhr_reset_xilinx_com(mgr);
  260. return pcxhr_load_xilinx_binary(mgr, dsp, 1);
  261. case PCXHR_FIRMWARE_DSP_EPRM_INDEX:
  262. pcxhr_reset_dsp(mgr);
  263. return pcxhr_load_eeprom_binary(mgr, dsp);
  264. case PCXHR_FIRMWARE_DSP_BOOT_INDEX:
  265. return pcxhr_load_boot_binary(mgr, dsp);
  266. case PCXHR_FIRMWARE_DSP_MAIN_INDEX:
  267. err = pcxhr_load_dsp_binary(mgr, dsp);
  268. if (err)
  269. return err;
  270. break; /* continue with first init */
  271. default:
  272. dev_err(&mgr->pci->dev, "wrong file index\n");
  273. return -EFAULT;
  274. } /* end of switch file index*/
  275. /* first communication with embedded */
  276. err = pcxhr_init_board(mgr);
  277. if (err < 0) {
  278. dev_err(&mgr->pci->dev, "pcxhr could not be set up\n");
  279. return err;
  280. }
  281. err = pcxhr_config_pipes(mgr);
  282. if (err < 0) {
  283. dev_err(&mgr->pci->dev, "pcxhr pipes could not be set up\n");
  284. return err;
  285. }
  286. /* create devices and mixer in accordance with HW options*/
  287. for (card_index = 0; card_index < mgr->num_cards; card_index++) {
  288. struct snd_pcxhr *chip = mgr->chip[card_index];
  289. err = pcxhr_create_pcm(chip);
  290. if (err < 0)
  291. return err;
  292. if (card_index == 0) {
  293. err = pcxhr_create_mixer(chip->mgr);
  294. if (err < 0)
  295. return err;
  296. }
  297. err = snd_card_register(chip->card);
  298. if (err < 0)
  299. return err;
  300. }
  301. err = pcxhr_start_pipes(mgr);
  302. if (err < 0) {
  303. dev_err(&mgr->pci->dev, "pcxhr pipes could not be started\n");
  304. return err;
  305. }
  306. dev_dbg(&mgr->pci->dev,
  307. "pcxhr firmware downloaded and successfully set up\n");
  308. return 0;
  309. }
  310. /*
  311. * fw loader entry
  312. */
  313. int pcxhr_setup_firmware(struct pcxhr_mgr *mgr)
  314. {
  315. static const char * const fw_files[][5] = {
  316. [0] = { "xlxint.dat", "xlxc882hr.dat",
  317. "dspe882.e56", "dspb882hr.b56", "dspd882.d56" },
  318. [1] = { "xlxint.dat", "xlxc882e.dat",
  319. "dspe882.e56", "dspb882e.b56", "dspd882.d56" },
  320. [2] = { "xlxint.dat", "xlxc1222hr.dat",
  321. "dspe882.e56", "dspb1222hr.b56", "dspd1222.d56" },
  322. [3] = { "xlxint.dat", "xlxc1222e.dat",
  323. "dspe882.e56", "dspb1222e.b56", "dspd1222.d56" },
  324. [4] = { NULL, "xlxc222.dat",
  325. "dspe924.e56", "dspb924.b56", "dspd222.d56" },
  326. [5] = { NULL, "xlxc924.dat",
  327. "dspe924.e56", "dspb924.b56", "dspd222.d56" },
  328. };
  329. char path[32];
  330. const struct firmware *fw_entry;
  331. int i, err;
  332. int fw_set = mgr->fw_file_set;
  333. for (i = 0; i < 5; i++) {
  334. if (!fw_files[fw_set][i])
  335. continue;
  336. sprintf(path, "pcxhr/%s", fw_files[fw_set][i]);
  337. if (request_firmware(&fw_entry, path, &mgr->pci->dev)) {
  338. dev_err(&mgr->pci->dev,
  339. "pcxhr: can't load firmware %s\n",
  340. path);
  341. return -ENOENT;
  342. }
  343. /* fake hwdep dsp record */
  344. err = pcxhr_dsp_load(mgr, i, fw_entry);
  345. release_firmware(fw_entry);
  346. if (err < 0)
  347. return err;
  348. mgr->dsp_loaded |= 1 << i;
  349. }
  350. return 0;
  351. }
  352. MODULE_FIRMWARE("pcxhr/xlxint.dat");
  353. MODULE_FIRMWARE("pcxhr/xlxc882hr.dat");
  354. MODULE_FIRMWARE("pcxhr/xlxc882e.dat");
  355. MODULE_FIRMWARE("pcxhr/dspe882.e56");
  356. MODULE_FIRMWARE("pcxhr/dspb882hr.b56");
  357. MODULE_FIRMWARE("pcxhr/dspb882e.b56");
  358. MODULE_FIRMWARE("pcxhr/dspd882.d56");
  359. MODULE_FIRMWARE("pcxhr/xlxc1222hr.dat");
  360. MODULE_FIRMWARE("pcxhr/xlxc1222e.dat");
  361. MODULE_FIRMWARE("pcxhr/dspb1222hr.b56");
  362. MODULE_FIRMWARE("pcxhr/dspb1222e.b56");
  363. MODULE_FIRMWARE("pcxhr/dspd1222.d56");
  364. MODULE_FIRMWARE("pcxhr/xlxc222.dat");
  365. MODULE_FIRMWARE("pcxhr/xlxc924.dat");
  366. MODULE_FIRMWARE("pcxhr/dspe924.e56");
  367. MODULE_FIRMWARE("pcxhr/dspb924.b56");
  368. MODULE_FIRMWARE("pcxhr/dspd222.d56");