xonar_wm87x6.c 38 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * card driver for models with WM8776/WM8766 DACs (Xonar DS/HDAV1.3 Slim)
  4. *
  5. * Copyright (c) Clemens Ladisch <[email protected]>
  6. */
  7. /*
  8. * Xonar DS
  9. * --------
  10. *
  11. * CMI8788:
  12. *
  13. * SPI 0 -> WM8766 (surround, center/LFE, back)
  14. * SPI 1 -> WM8776 (front, input)
  15. *
  16. * GPIO 4 <- headphone detect, 0 = plugged
  17. * GPIO 6 -> route input jack to mic-in (0) or line-in (1)
  18. * GPIO 7 -> enable output to front L/R speaker channels
  19. * GPIO 8 -> enable output to other speaker channels and front panel headphone
  20. *
  21. * WM8776:
  22. *
  23. * input 1 <- line
  24. * input 2 <- mic
  25. * input 3 <- front mic
  26. * input 4 <- aux
  27. */
  28. /*
  29. * Xonar HDAV1.3 Slim
  30. * ------------------
  31. *
  32. * CMI8788:
  33. *
  34. * I²C <-> WM8776 (addr 0011010)
  35. *
  36. * GPIO 0 -> disable HDMI output
  37. * GPIO 1 -> enable HP output
  38. * GPIO 6 -> firmware EEPROM I²C clock
  39. * GPIO 7 <-> firmware EEPROM I²C data
  40. *
  41. * UART <-> HDMI controller
  42. *
  43. * WM8776:
  44. *
  45. * input 1 <- mic
  46. * input 2 <- aux
  47. */
  48. #include <linux/pci.h>
  49. #include <linux/delay.h>
  50. #include <sound/control.h>
  51. #include <sound/core.h>
  52. #include <sound/info.h>
  53. #include <sound/jack.h>
  54. #include <sound/pcm.h>
  55. #include <sound/pcm_params.h>
  56. #include <sound/tlv.h>
  57. #include "xonar.h"
  58. #include "wm8776.h"
  59. #include "wm8766.h"
  60. #define GPIO_DS_HP_DETECT 0x0010
  61. #define GPIO_DS_INPUT_ROUTE 0x0040
  62. #define GPIO_DS_OUTPUT_FRONTLR 0x0080
  63. #define GPIO_DS_OUTPUT_ENABLE 0x0100
  64. #define GPIO_SLIM_HDMI_DISABLE 0x0001
  65. #define GPIO_SLIM_OUTPUT_ENABLE 0x0002
  66. #define GPIO_SLIM_FIRMWARE_CLK 0x0040
  67. #define GPIO_SLIM_FIRMWARE_DATA 0x0080
  68. #define I2C_DEVICE_WM8776 0x34 /* 001101, 0, /W=0 */
  69. #define LC_CONTROL_LIMITER 0x40000000
  70. #define LC_CONTROL_ALC 0x20000000
  71. struct xonar_wm87x6 {
  72. struct xonar_generic generic;
  73. u16 wm8776_regs[0x17];
  74. u16 wm8766_regs[0x10];
  75. struct snd_kcontrol *line_adcmux_control;
  76. struct snd_kcontrol *mic_adcmux_control;
  77. struct snd_kcontrol *lc_controls[13];
  78. struct snd_jack *hp_jack;
  79. struct xonar_hdmi hdmi;
  80. };
  81. static void wm8776_write_spi(struct oxygen *chip,
  82. unsigned int reg, unsigned int value)
  83. {
  84. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  85. OXYGEN_SPI_DATA_LENGTH_2 |
  86. OXYGEN_SPI_CLOCK_160 |
  87. (1 << OXYGEN_SPI_CODEC_SHIFT) |
  88. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  89. (reg << 9) | value);
  90. }
  91. static void wm8776_write_i2c(struct oxygen *chip,
  92. unsigned int reg, unsigned int value)
  93. {
  94. oxygen_write_i2c(chip, I2C_DEVICE_WM8776,
  95. (reg << 1) | (value >> 8), value);
  96. }
  97. static void wm8776_write(struct oxygen *chip,
  98. unsigned int reg, unsigned int value)
  99. {
  100. struct xonar_wm87x6 *data = chip->model_data;
  101. if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) ==
  102. OXYGEN_FUNCTION_SPI)
  103. wm8776_write_spi(chip, reg, value);
  104. else
  105. wm8776_write_i2c(chip, reg, value);
  106. if (reg < ARRAY_SIZE(data->wm8776_regs)) {
  107. /* reg >= WM8776_HPLVOL is always true */
  108. if (reg <= WM8776_DACMASTER)
  109. value &= ~WM8776_UPDATE;
  110. data->wm8776_regs[reg] = value;
  111. }
  112. }
  113. static void wm8776_write_cached(struct oxygen *chip,
  114. unsigned int reg, unsigned int value)
  115. {
  116. struct xonar_wm87x6 *data = chip->model_data;
  117. if (reg >= ARRAY_SIZE(data->wm8776_regs) ||
  118. value != data->wm8776_regs[reg])
  119. wm8776_write(chip, reg, value);
  120. }
  121. static void wm8766_write(struct oxygen *chip,
  122. unsigned int reg, unsigned int value)
  123. {
  124. struct xonar_wm87x6 *data = chip->model_data;
  125. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  126. OXYGEN_SPI_DATA_LENGTH_2 |
  127. OXYGEN_SPI_CLOCK_160 |
  128. (0 << OXYGEN_SPI_CODEC_SHIFT) |
  129. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  130. (reg << 9) | value);
  131. if (reg < ARRAY_SIZE(data->wm8766_regs)) {
  132. /* reg >= WM8766_LDA1 is always true */
  133. if (reg <= WM8766_RDA1 ||
  134. (reg >= WM8766_LDA2 && reg <= WM8766_MASTDA))
  135. value &= ~WM8766_UPDATE;
  136. data->wm8766_regs[reg] = value;
  137. }
  138. }
  139. static void wm8766_write_cached(struct oxygen *chip,
  140. unsigned int reg, unsigned int value)
  141. {
  142. struct xonar_wm87x6 *data = chip->model_data;
  143. if (reg >= ARRAY_SIZE(data->wm8766_regs) ||
  144. value != data->wm8766_regs[reg])
  145. wm8766_write(chip, reg, value);
  146. }
  147. static void wm8776_registers_init(struct oxygen *chip)
  148. {
  149. struct xonar_wm87x6 *data = chip->model_data;
  150. wm8776_write(chip, WM8776_RESET, 0);
  151. wm8776_write(chip, WM8776_PHASESWAP, WM8776_PH_MASK);
  152. wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN |
  153. WM8776_PL_LEFT_LEFT | WM8776_PL_RIGHT_RIGHT);
  154. wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0);
  155. wm8776_write(chip, WM8776_DACIFCTRL,
  156. WM8776_DACFMT_LJUST | WM8776_DACWL_24);
  157. wm8776_write(chip, WM8776_ADCIFCTRL,
  158. data->wm8776_regs[WM8776_ADCIFCTRL]);
  159. wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]);
  160. wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]);
  161. wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]);
  162. wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] |
  163. WM8776_UPDATE);
  164. wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]);
  165. wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]);
  166. wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]);
  167. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]);
  168. wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE);
  169. }
  170. static void wm8766_registers_init(struct oxygen *chip)
  171. {
  172. struct xonar_wm87x6 *data = chip->model_data;
  173. wm8766_write(chip, WM8766_RESET, 0);
  174. wm8766_write(chip, WM8766_DAC_CTRL, data->wm8766_regs[WM8766_DAC_CTRL]);
  175. wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24);
  176. wm8766_write(chip, WM8766_DAC_CTRL2,
  177. WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  178. wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]);
  179. wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]);
  180. wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]);
  181. wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]);
  182. wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]);
  183. wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE);
  184. }
  185. static void wm8776_init(struct oxygen *chip)
  186. {
  187. struct xonar_wm87x6 *data = chip->model_data;
  188. data->wm8776_regs[WM8776_HPLVOL] = (0x79 - 60) | WM8776_HPZCEN;
  189. data->wm8776_regs[WM8776_HPRVOL] = (0x79 - 60) | WM8776_HPZCEN;
  190. data->wm8776_regs[WM8776_ADCIFCTRL] =
  191. WM8776_ADCFMT_LJUST | WM8776_ADCWL_24 | WM8776_ADCMCLK;
  192. data->wm8776_regs[WM8776_MSTRCTRL] =
  193. WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  194. data->wm8776_regs[WM8776_PWRDOWN] = WM8776_HPPD;
  195. data->wm8776_regs[WM8776_ADCLVOL] = 0xa5 | WM8776_ZCA;
  196. data->wm8776_regs[WM8776_ADCRVOL] = 0xa5 | WM8776_ZCA;
  197. data->wm8776_regs[WM8776_ADCMUX] = 0x001;
  198. wm8776_registers_init(chip);
  199. }
  200. static void wm8766_init(struct oxygen *chip)
  201. {
  202. struct xonar_wm87x6 *data = chip->model_data;
  203. data->wm8766_regs[WM8766_DAC_CTRL] =
  204. WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  205. wm8766_registers_init(chip);
  206. }
  207. static void xonar_ds_handle_hp_jack(struct oxygen *chip)
  208. {
  209. struct xonar_wm87x6 *data = chip->model_data;
  210. bool hp_plugged;
  211. unsigned int reg;
  212. mutex_lock(&chip->mutex);
  213. hp_plugged = !(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  214. GPIO_DS_HP_DETECT);
  215. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  216. hp_plugged ? 0 : GPIO_DS_OUTPUT_FRONTLR,
  217. GPIO_DS_OUTPUT_FRONTLR);
  218. reg = data->wm8766_regs[WM8766_DAC_CTRL] & ~WM8766_MUTEALL;
  219. if (hp_plugged)
  220. reg |= WM8766_MUTEALL;
  221. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  222. snd_jack_report(data->hp_jack, hp_plugged ? SND_JACK_HEADPHONE : 0);
  223. mutex_unlock(&chip->mutex);
  224. }
  225. static void xonar_ds_init(struct oxygen *chip)
  226. {
  227. struct xonar_wm87x6 *data = chip->model_data;
  228. data->generic.anti_pop_delay = 300;
  229. data->generic.output_enable_bit = GPIO_DS_OUTPUT_ENABLE;
  230. wm8776_init(chip);
  231. wm8766_init(chip);
  232. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  233. GPIO_DS_INPUT_ROUTE | GPIO_DS_OUTPUT_FRONTLR);
  234. oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
  235. GPIO_DS_HP_DETECT);
  236. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE);
  237. oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT);
  238. chip->interrupt_mask |= OXYGEN_INT_GPIO;
  239. xonar_enable_output(chip);
  240. snd_jack_new(chip->card, "Headphone",
  241. SND_JACK_HEADPHONE, &data->hp_jack, false, false);
  242. xonar_ds_handle_hp_jack(chip);
  243. snd_component_add(chip->card, "WM8776");
  244. snd_component_add(chip->card, "WM8766");
  245. }
  246. static void xonar_hdav_slim_init(struct oxygen *chip)
  247. {
  248. struct xonar_wm87x6 *data = chip->model_data;
  249. data->generic.anti_pop_delay = 300;
  250. data->generic.output_enable_bit = GPIO_SLIM_OUTPUT_ENABLE;
  251. wm8776_init(chip);
  252. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  253. GPIO_SLIM_HDMI_DISABLE |
  254. GPIO_SLIM_FIRMWARE_CLK |
  255. GPIO_SLIM_FIRMWARE_DATA);
  256. xonar_hdmi_init(chip, &data->hdmi);
  257. xonar_enable_output(chip);
  258. snd_component_add(chip->card, "WM8776");
  259. }
  260. static void xonar_ds_cleanup(struct oxygen *chip)
  261. {
  262. xonar_disable_output(chip);
  263. wm8776_write(chip, WM8776_RESET, 0);
  264. }
  265. static void xonar_hdav_slim_cleanup(struct oxygen *chip)
  266. {
  267. xonar_hdmi_cleanup(chip);
  268. xonar_disable_output(chip);
  269. wm8776_write(chip, WM8776_RESET, 0);
  270. msleep(2);
  271. }
  272. static void xonar_ds_suspend(struct oxygen *chip)
  273. {
  274. xonar_ds_cleanup(chip);
  275. }
  276. static void xonar_hdav_slim_suspend(struct oxygen *chip)
  277. {
  278. xonar_hdav_slim_cleanup(chip);
  279. }
  280. static void xonar_ds_resume(struct oxygen *chip)
  281. {
  282. wm8776_registers_init(chip);
  283. wm8766_registers_init(chip);
  284. xonar_enable_output(chip);
  285. xonar_ds_handle_hp_jack(chip);
  286. }
  287. static void xonar_hdav_slim_resume(struct oxygen *chip)
  288. {
  289. struct xonar_wm87x6 *data = chip->model_data;
  290. wm8776_registers_init(chip);
  291. xonar_hdmi_resume(chip, &data->hdmi);
  292. xonar_enable_output(chip);
  293. }
  294. static void wm8776_adc_hardware_filter(unsigned int channel,
  295. struct snd_pcm_hardware *hardware)
  296. {
  297. if (channel == PCM_A) {
  298. hardware->rates = SNDRV_PCM_RATE_32000 |
  299. SNDRV_PCM_RATE_44100 |
  300. SNDRV_PCM_RATE_48000 |
  301. SNDRV_PCM_RATE_64000 |
  302. SNDRV_PCM_RATE_88200 |
  303. SNDRV_PCM_RATE_96000;
  304. hardware->rate_max = 96000;
  305. }
  306. }
  307. static void xonar_hdav_slim_hardware_filter(unsigned int channel,
  308. struct snd_pcm_hardware *hardware)
  309. {
  310. wm8776_adc_hardware_filter(channel, hardware);
  311. xonar_hdmi_pcm_hardware_filter(channel, hardware);
  312. }
  313. static void set_wm87x6_dac_params(struct oxygen *chip,
  314. struct snd_pcm_hw_params *params)
  315. {
  316. }
  317. static void set_wm8776_adc_params(struct oxygen *chip,
  318. struct snd_pcm_hw_params *params)
  319. {
  320. u16 reg;
  321. reg = WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  322. if (params_rate(params) > 48000)
  323. reg |= WM8776_ADCOSR;
  324. wm8776_write_cached(chip, WM8776_MSTRCTRL, reg);
  325. }
  326. static void set_hdav_slim_dac_params(struct oxygen *chip,
  327. struct snd_pcm_hw_params *params)
  328. {
  329. struct xonar_wm87x6 *data = chip->model_data;
  330. xonar_set_hdmi_params(chip, &data->hdmi, params);
  331. }
  332. static void update_wm8776_volume(struct oxygen *chip)
  333. {
  334. struct xonar_wm87x6 *data = chip->model_data;
  335. u8 to_change;
  336. if (chip->dac_volume[0] == chip->dac_volume[1]) {
  337. if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] ||
  338. chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) {
  339. wm8776_write(chip, WM8776_DACMASTER,
  340. chip->dac_volume[0] | WM8776_UPDATE);
  341. data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0];
  342. data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0];
  343. }
  344. } else {
  345. to_change = (chip->dac_volume[0] !=
  346. data->wm8776_regs[WM8776_DACLVOL]) << 0;
  347. to_change |= (chip->dac_volume[1] !=
  348. data->wm8776_regs[WM8776_DACLVOL]) << 1;
  349. if (to_change & 1)
  350. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] |
  351. ((to_change & 2) ? 0 : WM8776_UPDATE));
  352. if (to_change & 2)
  353. wm8776_write(chip, WM8776_DACRVOL,
  354. chip->dac_volume[1] | WM8776_UPDATE);
  355. }
  356. }
  357. static void update_wm87x6_volume(struct oxygen *chip)
  358. {
  359. static const u8 wm8766_regs[6] = {
  360. WM8766_LDA1, WM8766_RDA1,
  361. WM8766_LDA2, WM8766_RDA2,
  362. WM8766_LDA3, WM8766_RDA3,
  363. };
  364. struct xonar_wm87x6 *data = chip->model_data;
  365. unsigned int i;
  366. u8 to_change;
  367. update_wm8776_volume(chip);
  368. if (chip->dac_volume[2] == chip->dac_volume[3] &&
  369. chip->dac_volume[2] == chip->dac_volume[4] &&
  370. chip->dac_volume[2] == chip->dac_volume[5] &&
  371. chip->dac_volume[2] == chip->dac_volume[6] &&
  372. chip->dac_volume[2] == chip->dac_volume[7]) {
  373. to_change = 0;
  374. for (i = 0; i < 6; ++i)
  375. if (chip->dac_volume[2] !=
  376. data->wm8766_regs[wm8766_regs[i]])
  377. to_change = 1;
  378. if (to_change) {
  379. wm8766_write(chip, WM8766_MASTDA,
  380. chip->dac_volume[2] | WM8766_UPDATE);
  381. for (i = 0; i < 6; ++i)
  382. data->wm8766_regs[wm8766_regs[i]] =
  383. chip->dac_volume[2];
  384. }
  385. } else {
  386. to_change = 0;
  387. for (i = 0; i < 6; ++i)
  388. to_change |= (chip->dac_volume[2 + i] !=
  389. data->wm8766_regs[wm8766_regs[i]]) << i;
  390. for (i = 0; i < 6; ++i)
  391. if (to_change & (1 << i))
  392. wm8766_write(chip, wm8766_regs[i],
  393. chip->dac_volume[2 + i] |
  394. ((to_change & (0x3e << i))
  395. ? 0 : WM8766_UPDATE));
  396. }
  397. }
  398. static void update_wm8776_mute(struct oxygen *chip)
  399. {
  400. wm8776_write_cached(chip, WM8776_DACMUTE,
  401. chip->dac_mute ? WM8776_DMUTE : 0);
  402. }
  403. static void update_wm87x6_mute(struct oxygen *chip)
  404. {
  405. update_wm8776_mute(chip);
  406. wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD |
  407. (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  408. }
  409. static void update_wm8766_center_lfe_mix(struct oxygen *chip, bool mixed)
  410. {
  411. struct xonar_wm87x6 *data = chip->model_data;
  412. unsigned int reg;
  413. /*
  414. * The WM8766 can mix left and right channels, but this setting
  415. * applies to all three stereo pairs.
  416. */
  417. reg = data->wm8766_regs[WM8766_DAC_CTRL] &
  418. ~(WM8766_PL_LEFT_MASK | WM8766_PL_RIGHT_MASK);
  419. if (mixed)
  420. reg |= WM8766_PL_LEFT_LRMIX | WM8766_PL_RIGHT_LRMIX;
  421. else
  422. reg |= WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  423. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  424. }
  425. static void xonar_ds_gpio_changed(struct oxygen *chip)
  426. {
  427. xonar_ds_handle_hp_jack(chip);
  428. }
  429. static int wm8776_bit_switch_get(struct snd_kcontrol *ctl,
  430. struct snd_ctl_elem_value *value)
  431. {
  432. struct oxygen *chip = ctl->private_data;
  433. struct xonar_wm87x6 *data = chip->model_data;
  434. u16 bit = ctl->private_value & 0xffff;
  435. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  436. bool invert = (ctl->private_value >> 24) & 1;
  437. value->value.integer.value[0] =
  438. ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert;
  439. return 0;
  440. }
  441. static int wm8776_bit_switch_put(struct snd_kcontrol *ctl,
  442. struct snd_ctl_elem_value *value)
  443. {
  444. struct oxygen *chip = ctl->private_data;
  445. struct xonar_wm87x6 *data = chip->model_data;
  446. u16 bit = ctl->private_value & 0xffff;
  447. u16 reg_value;
  448. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  449. bool invert = (ctl->private_value >> 24) & 1;
  450. int changed;
  451. mutex_lock(&chip->mutex);
  452. reg_value = data->wm8776_regs[reg_index] & ~bit;
  453. if (value->value.integer.value[0] ^ invert)
  454. reg_value |= bit;
  455. changed = reg_value != data->wm8776_regs[reg_index];
  456. if (changed)
  457. wm8776_write(chip, reg_index, reg_value);
  458. mutex_unlock(&chip->mutex);
  459. return changed;
  460. }
  461. static int wm8776_field_enum_info(struct snd_kcontrol *ctl,
  462. struct snd_ctl_elem_info *info)
  463. {
  464. static const char *const hld[16] = {
  465. "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
  466. "21.3 ms", "42.7 ms", "85.3 ms", "171 ms",
  467. "341 ms", "683 ms", "1.37 s", "2.73 s",
  468. "5.46 s", "10.9 s", "21.8 s", "43.7 s",
  469. };
  470. static const char *const atk_lim[11] = {
  471. "0.25 ms", "0.5 ms", "1 ms", "2 ms",
  472. "4 ms", "8 ms", "16 ms", "32 ms",
  473. "64 ms", "128 ms", "256 ms",
  474. };
  475. static const char *const atk_alc[11] = {
  476. "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
  477. "134 ms", "269 ms", "538 ms", "1.08 s",
  478. "2.15 s", "4.3 s", "8.6 s",
  479. };
  480. static const char *const dcy_lim[11] = {
  481. "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
  482. "19.2 ms", "38.4 ms", "76.8 ms", "154 ms",
  483. "307 ms", "614 ms", "1.23 s",
  484. };
  485. static const char *const dcy_alc[11] = {
  486. "33.5 ms", "67.0 ms", "134 ms", "268 ms",
  487. "536 ms", "1.07 s", "2.14 s", "4.29 s",
  488. "8.58 s", "17.2 s", "34.3 s",
  489. };
  490. static const char *const tranwin[8] = {
  491. "0 us", "62.5 us", "125 us", "250 us",
  492. "500 us", "1 ms", "2 ms", "4 ms",
  493. };
  494. u8 max;
  495. const char *const *names;
  496. max = (ctl->private_value >> 12) & 0xf;
  497. switch ((ctl->private_value >> 24) & 0x1f) {
  498. case WM8776_ALCCTRL2:
  499. names = hld;
  500. break;
  501. case WM8776_ALCCTRL3:
  502. if (((ctl->private_value >> 20) & 0xf) == 0) {
  503. if (ctl->private_value & LC_CONTROL_LIMITER)
  504. names = atk_lim;
  505. else
  506. names = atk_alc;
  507. } else {
  508. if (ctl->private_value & LC_CONTROL_LIMITER)
  509. names = dcy_lim;
  510. else
  511. names = dcy_alc;
  512. }
  513. break;
  514. case WM8776_LIMITER:
  515. names = tranwin;
  516. break;
  517. default:
  518. return -ENXIO;
  519. }
  520. return snd_ctl_enum_info(info, 1, max + 1, names);
  521. }
  522. static int wm8776_field_volume_info(struct snd_kcontrol *ctl,
  523. struct snd_ctl_elem_info *info)
  524. {
  525. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  526. info->count = 1;
  527. info->value.integer.min = (ctl->private_value >> 8) & 0xf;
  528. info->value.integer.max = (ctl->private_value >> 12) & 0xf;
  529. return 0;
  530. }
  531. static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl)
  532. {
  533. struct oxygen *chip = ctl->private_data;
  534. struct xonar_wm87x6 *data = chip->model_data;
  535. unsigned int value, reg_index, mode;
  536. u8 min, max, shift;
  537. u16 mask, reg_value;
  538. bool invert;
  539. if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  540. WM8776_LCSEL_LIMITER)
  541. mode = LC_CONTROL_LIMITER;
  542. else
  543. mode = LC_CONTROL_ALC;
  544. if (!(ctl->private_value & mode))
  545. return;
  546. value = ctl->private_value & 0xf;
  547. min = (ctl->private_value >> 8) & 0xf;
  548. max = (ctl->private_value >> 12) & 0xf;
  549. mask = (ctl->private_value >> 16) & 0xf;
  550. shift = (ctl->private_value >> 20) & 0xf;
  551. reg_index = (ctl->private_value >> 24) & 0x1f;
  552. invert = (ctl->private_value >> 29) & 0x1;
  553. if (invert)
  554. value = max - (value - min);
  555. reg_value = data->wm8776_regs[reg_index];
  556. reg_value &= ~(mask << shift);
  557. reg_value |= value << shift;
  558. wm8776_write_cached(chip, reg_index, reg_value);
  559. }
  560. static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value)
  561. {
  562. struct oxygen *chip = ctl->private_data;
  563. u8 min, max;
  564. int changed;
  565. min = (ctl->private_value >> 8) & 0xf;
  566. max = (ctl->private_value >> 12) & 0xf;
  567. if (value < min || value > max)
  568. return -EINVAL;
  569. mutex_lock(&chip->mutex);
  570. changed = value != (ctl->private_value & 0xf);
  571. if (changed) {
  572. ctl->private_value = (ctl->private_value & ~0xf) | value;
  573. wm8776_field_set_from_ctl(ctl);
  574. }
  575. mutex_unlock(&chip->mutex);
  576. return changed;
  577. }
  578. static int wm8776_field_enum_get(struct snd_kcontrol *ctl,
  579. struct snd_ctl_elem_value *value)
  580. {
  581. value->value.enumerated.item[0] = ctl->private_value & 0xf;
  582. return 0;
  583. }
  584. static int wm8776_field_volume_get(struct snd_kcontrol *ctl,
  585. struct snd_ctl_elem_value *value)
  586. {
  587. value->value.integer.value[0] = ctl->private_value & 0xf;
  588. return 0;
  589. }
  590. static int wm8776_field_enum_put(struct snd_kcontrol *ctl,
  591. struct snd_ctl_elem_value *value)
  592. {
  593. return wm8776_field_set(ctl, value->value.enumerated.item[0]);
  594. }
  595. static int wm8776_field_volume_put(struct snd_kcontrol *ctl,
  596. struct snd_ctl_elem_value *value)
  597. {
  598. return wm8776_field_set(ctl, value->value.integer.value[0]);
  599. }
  600. static int wm8776_hp_vol_info(struct snd_kcontrol *ctl,
  601. struct snd_ctl_elem_info *info)
  602. {
  603. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  604. info->count = 2;
  605. info->value.integer.min = 0x79 - 60;
  606. info->value.integer.max = 0x7f;
  607. return 0;
  608. }
  609. static int wm8776_hp_vol_get(struct snd_kcontrol *ctl,
  610. struct snd_ctl_elem_value *value)
  611. {
  612. struct oxygen *chip = ctl->private_data;
  613. struct xonar_wm87x6 *data = chip->model_data;
  614. mutex_lock(&chip->mutex);
  615. value->value.integer.value[0] =
  616. data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK;
  617. value->value.integer.value[1] =
  618. data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK;
  619. mutex_unlock(&chip->mutex);
  620. return 0;
  621. }
  622. static int wm8776_hp_vol_put(struct snd_kcontrol *ctl,
  623. struct snd_ctl_elem_value *value)
  624. {
  625. struct oxygen *chip = ctl->private_data;
  626. struct xonar_wm87x6 *data = chip->model_data;
  627. u8 to_update;
  628. mutex_lock(&chip->mutex);
  629. to_update = (value->value.integer.value[0] !=
  630. (data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK))
  631. << 0;
  632. to_update |= (value->value.integer.value[1] !=
  633. (data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK))
  634. << 1;
  635. if (value->value.integer.value[0] == value->value.integer.value[1]) {
  636. if (to_update) {
  637. wm8776_write(chip, WM8776_HPMASTER,
  638. value->value.integer.value[0] |
  639. WM8776_HPZCEN | WM8776_UPDATE);
  640. data->wm8776_regs[WM8776_HPLVOL] =
  641. value->value.integer.value[0] | WM8776_HPZCEN;
  642. data->wm8776_regs[WM8776_HPRVOL] =
  643. value->value.integer.value[0] | WM8776_HPZCEN;
  644. }
  645. } else {
  646. if (to_update & 1)
  647. wm8776_write(chip, WM8776_HPLVOL,
  648. value->value.integer.value[0] |
  649. WM8776_HPZCEN |
  650. ((to_update & 2) ? 0 : WM8776_UPDATE));
  651. if (to_update & 2)
  652. wm8776_write(chip, WM8776_HPRVOL,
  653. value->value.integer.value[1] |
  654. WM8776_HPZCEN | WM8776_UPDATE);
  655. }
  656. mutex_unlock(&chip->mutex);
  657. return to_update != 0;
  658. }
  659. static int wm8776_input_mux_get(struct snd_kcontrol *ctl,
  660. struct snd_ctl_elem_value *value)
  661. {
  662. struct oxygen *chip = ctl->private_data;
  663. struct xonar_wm87x6 *data = chip->model_data;
  664. unsigned int mux_bit = ctl->private_value;
  665. value->value.integer.value[0] =
  666. !!(data->wm8776_regs[WM8776_ADCMUX] & mux_bit);
  667. return 0;
  668. }
  669. static int wm8776_input_mux_put(struct snd_kcontrol *ctl,
  670. struct snd_ctl_elem_value *value)
  671. {
  672. struct oxygen *chip = ctl->private_data;
  673. struct xonar_wm87x6 *data = chip->model_data;
  674. struct snd_kcontrol *other_ctl;
  675. unsigned int mux_bit = ctl->private_value;
  676. u16 reg;
  677. int changed;
  678. mutex_lock(&chip->mutex);
  679. reg = data->wm8776_regs[WM8776_ADCMUX];
  680. if (value->value.integer.value[0]) {
  681. reg |= mux_bit;
  682. /* line-in and mic-in are exclusive */
  683. mux_bit ^= 3;
  684. if (reg & mux_bit) {
  685. reg &= ~mux_bit;
  686. if (mux_bit == 1)
  687. other_ctl = data->line_adcmux_control;
  688. else
  689. other_ctl = data->mic_adcmux_control;
  690. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  691. &other_ctl->id);
  692. }
  693. } else
  694. reg &= ~mux_bit;
  695. changed = reg != data->wm8776_regs[WM8776_ADCMUX];
  696. if (changed) {
  697. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  698. reg & 1 ? GPIO_DS_INPUT_ROUTE : 0,
  699. GPIO_DS_INPUT_ROUTE);
  700. wm8776_write(chip, WM8776_ADCMUX, reg);
  701. }
  702. mutex_unlock(&chip->mutex);
  703. return changed;
  704. }
  705. static int wm8776_input_vol_info(struct snd_kcontrol *ctl,
  706. struct snd_ctl_elem_info *info)
  707. {
  708. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  709. info->count = 2;
  710. info->value.integer.min = 0xa5;
  711. info->value.integer.max = 0xff;
  712. return 0;
  713. }
  714. static int wm8776_input_vol_get(struct snd_kcontrol *ctl,
  715. struct snd_ctl_elem_value *value)
  716. {
  717. struct oxygen *chip = ctl->private_data;
  718. struct xonar_wm87x6 *data = chip->model_data;
  719. mutex_lock(&chip->mutex);
  720. value->value.integer.value[0] =
  721. data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK;
  722. value->value.integer.value[1] =
  723. data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK;
  724. mutex_unlock(&chip->mutex);
  725. return 0;
  726. }
  727. static int wm8776_input_vol_put(struct snd_kcontrol *ctl,
  728. struct snd_ctl_elem_value *value)
  729. {
  730. struct oxygen *chip = ctl->private_data;
  731. struct xonar_wm87x6 *data = chip->model_data;
  732. int changed = 0;
  733. mutex_lock(&chip->mutex);
  734. changed = (value->value.integer.value[0] !=
  735. (data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK)) ||
  736. (value->value.integer.value[1] !=
  737. (data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK));
  738. wm8776_write_cached(chip, WM8776_ADCLVOL,
  739. value->value.integer.value[0] | WM8776_ZCA);
  740. wm8776_write_cached(chip, WM8776_ADCRVOL,
  741. value->value.integer.value[1] | WM8776_ZCA);
  742. mutex_unlock(&chip->mutex);
  743. return changed;
  744. }
  745. static int wm8776_level_control_info(struct snd_kcontrol *ctl,
  746. struct snd_ctl_elem_info *info)
  747. {
  748. static const char *const names[3] = {
  749. "None", "Peak Limiter", "Automatic Level Control"
  750. };
  751. return snd_ctl_enum_info(info, 1, 3, names);
  752. }
  753. static int wm8776_level_control_get(struct snd_kcontrol *ctl,
  754. struct snd_ctl_elem_value *value)
  755. {
  756. struct oxygen *chip = ctl->private_data;
  757. struct xonar_wm87x6 *data = chip->model_data;
  758. if (!(data->wm8776_regs[WM8776_ALCCTRL2] & WM8776_LCEN))
  759. value->value.enumerated.item[0] = 0;
  760. else if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  761. WM8776_LCSEL_LIMITER)
  762. value->value.enumerated.item[0] = 1;
  763. else
  764. value->value.enumerated.item[0] = 2;
  765. return 0;
  766. }
  767. static void activate_control(struct oxygen *chip,
  768. struct snd_kcontrol *ctl, unsigned int mode)
  769. {
  770. unsigned int access;
  771. if (ctl->private_value & mode)
  772. access = 0;
  773. else
  774. access = SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  775. if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) {
  776. ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  777. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
  778. }
  779. }
  780. static int wm8776_level_control_put(struct snd_kcontrol *ctl,
  781. struct snd_ctl_elem_value *value)
  782. {
  783. struct oxygen *chip = ctl->private_data;
  784. struct xonar_wm87x6 *data = chip->model_data;
  785. unsigned int mode = 0, i;
  786. u16 ctrl1, ctrl2;
  787. int changed;
  788. if (value->value.enumerated.item[0] >= 3)
  789. return -EINVAL;
  790. mutex_lock(&chip->mutex);
  791. changed = value->value.enumerated.item[0] != ctl->private_value;
  792. if (changed) {
  793. ctl->private_value = value->value.enumerated.item[0];
  794. ctrl1 = data->wm8776_regs[WM8776_ALCCTRL1];
  795. ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
  796. switch (value->value.enumerated.item[0]) {
  797. default:
  798. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  799. ctrl2 & ~WM8776_LCEN);
  800. break;
  801. case 1:
  802. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  803. (ctrl1 & ~WM8776_LCSEL_MASK) |
  804. WM8776_LCSEL_LIMITER);
  805. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  806. ctrl2 | WM8776_LCEN);
  807. mode = LC_CONTROL_LIMITER;
  808. break;
  809. case 2:
  810. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  811. (ctrl1 & ~WM8776_LCSEL_MASK) |
  812. WM8776_LCSEL_ALC_STEREO);
  813. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  814. ctrl2 | WM8776_LCEN);
  815. mode = LC_CONTROL_ALC;
  816. break;
  817. }
  818. for (i = 0; i < ARRAY_SIZE(data->lc_controls); ++i)
  819. activate_control(chip, data->lc_controls[i], mode);
  820. }
  821. mutex_unlock(&chip->mutex);
  822. return changed;
  823. }
  824. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  825. {
  826. static const char *const names[2] = {
  827. "None", "High-pass Filter"
  828. };
  829. return snd_ctl_enum_info(info, 1, 2, names);
  830. }
  831. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  832. {
  833. struct oxygen *chip = ctl->private_data;
  834. struct xonar_wm87x6 *data = chip->model_data;
  835. value->value.enumerated.item[0] =
  836. !(data->wm8776_regs[WM8776_ADCIFCTRL] & WM8776_ADCHPD);
  837. return 0;
  838. }
  839. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  840. {
  841. struct oxygen *chip = ctl->private_data;
  842. struct xonar_wm87x6 *data = chip->model_data;
  843. unsigned int reg;
  844. int changed;
  845. mutex_lock(&chip->mutex);
  846. reg = data->wm8776_regs[WM8776_ADCIFCTRL] & ~WM8776_ADCHPD;
  847. if (!value->value.enumerated.item[0])
  848. reg |= WM8776_ADCHPD;
  849. changed = reg != data->wm8776_regs[WM8776_ADCIFCTRL];
  850. if (changed)
  851. wm8776_write(chip, WM8776_ADCIFCTRL, reg);
  852. mutex_unlock(&chip->mutex);
  853. return changed;
  854. }
  855. #define WM8776_BIT_SWITCH(xname, reg, bit, invert, flags) { \
  856. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  857. .name = xname, \
  858. .info = snd_ctl_boolean_mono_info, \
  859. .get = wm8776_bit_switch_get, \
  860. .put = wm8776_bit_switch_put, \
  861. .private_value = ((reg) << 16) | (bit) | ((invert) << 24) | (flags), \
  862. }
  863. #define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \
  864. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  865. .name = xname, \
  866. .private_value = (initval) | ((min) << 8) | ((max) << 12) | \
  867. ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)
  868. #define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\
  869. _WM8776_FIELD_CTL(xname " Capture Enum", \
  870. reg, shift, init, min, max, mask, flags), \
  871. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  872. SNDRV_CTL_ELEM_ACCESS_INACTIVE, \
  873. .info = wm8776_field_enum_info, \
  874. .get = wm8776_field_enum_get, \
  875. .put = wm8776_field_enum_put, \
  876. }
  877. #define WM8776_FIELD_CTL_VOLUME(a, b, c, d, e, f, g, h, tlv_p) { \
  878. _WM8776_FIELD_CTL(a " Capture Volume", b, c, d, e, f, g, h), \
  879. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  880. SNDRV_CTL_ELEM_ACCESS_INACTIVE | \
  881. SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  882. .info = wm8776_field_volume_info, \
  883. .get = wm8776_field_volume_get, \
  884. .put = wm8776_field_volume_put, \
  885. .tlv = { .p = tlv_p }, \
  886. }
  887. static const DECLARE_TLV_DB_SCALE(wm87x6_dac_db_scale, -6000, 50, 0);
  888. static const DECLARE_TLV_DB_SCALE(wm8776_adc_db_scale, -2100, 50, 0);
  889. static const DECLARE_TLV_DB_SCALE(wm8776_hp_db_scale, -6000, 100, 0);
  890. static const DECLARE_TLV_DB_SCALE(wm8776_lct_db_scale, -1600, 100, 0);
  891. static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_db_scale, 0, 400, 0);
  892. static const DECLARE_TLV_DB_SCALE(wm8776_ngth_db_scale, -7800, 600, 0);
  893. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_db_scale, -1200, 100, 0);
  894. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_db_scale, -2100, 400, 0);
  895. static const struct snd_kcontrol_new ds_controls[] = {
  896. {
  897. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  898. .name = "Headphone Playback Volume",
  899. .info = wm8776_hp_vol_info,
  900. .get = wm8776_hp_vol_get,
  901. .put = wm8776_hp_vol_put,
  902. .tlv = { .p = wm8776_hp_db_scale },
  903. },
  904. WM8776_BIT_SWITCH("Headphone Playback Switch",
  905. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  906. {
  907. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  908. .name = "Input Capture Volume",
  909. .info = wm8776_input_vol_info,
  910. .get = wm8776_input_vol_get,
  911. .put = wm8776_input_vol_put,
  912. .tlv = { .p = wm8776_adc_db_scale },
  913. },
  914. {
  915. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  916. .name = "Line Capture Switch",
  917. .info = snd_ctl_boolean_mono_info,
  918. .get = wm8776_input_mux_get,
  919. .put = wm8776_input_mux_put,
  920. .private_value = 1 << 0,
  921. },
  922. {
  923. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  924. .name = "Mic Capture Switch",
  925. .info = snd_ctl_boolean_mono_info,
  926. .get = wm8776_input_mux_get,
  927. .put = wm8776_input_mux_put,
  928. .private_value = 1 << 1,
  929. },
  930. WM8776_BIT_SWITCH("Front Mic Capture Switch",
  931. WM8776_ADCMUX, 1 << 2, 0, 0),
  932. WM8776_BIT_SWITCH("Aux Capture Switch",
  933. WM8776_ADCMUX, 1 << 3, 0, 0),
  934. {
  935. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  936. .name = "ADC Filter Capture Enum",
  937. .info = hpf_info,
  938. .get = hpf_get,
  939. .put = hpf_put,
  940. },
  941. {
  942. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  943. .name = "Level Control Capture Enum",
  944. .info = wm8776_level_control_info,
  945. .get = wm8776_level_control_get,
  946. .put = wm8776_level_control_put,
  947. .private_value = 0,
  948. },
  949. };
  950. static const struct snd_kcontrol_new hdav_slim_controls[] = {
  951. {
  952. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  953. .name = "HDMI Playback Switch",
  954. .info = snd_ctl_boolean_mono_info,
  955. .get = xonar_gpio_bit_switch_get,
  956. .put = xonar_gpio_bit_switch_put,
  957. .private_value = GPIO_SLIM_HDMI_DISABLE | XONAR_GPIO_BIT_INVERT,
  958. },
  959. {
  960. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  961. .name = "Headphone Playback Volume",
  962. .info = wm8776_hp_vol_info,
  963. .get = wm8776_hp_vol_get,
  964. .put = wm8776_hp_vol_put,
  965. .tlv = { .p = wm8776_hp_db_scale },
  966. },
  967. WM8776_BIT_SWITCH("Headphone Playback Switch",
  968. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  969. {
  970. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  971. .name = "Input Capture Volume",
  972. .info = wm8776_input_vol_info,
  973. .get = wm8776_input_vol_get,
  974. .put = wm8776_input_vol_put,
  975. .tlv = { .p = wm8776_adc_db_scale },
  976. },
  977. WM8776_BIT_SWITCH("Mic Capture Switch",
  978. WM8776_ADCMUX, 1 << 0, 0, 0),
  979. WM8776_BIT_SWITCH("Aux Capture Switch",
  980. WM8776_ADCMUX, 1 << 1, 0, 0),
  981. {
  982. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  983. .name = "ADC Filter Capture Enum",
  984. .info = hpf_info,
  985. .get = hpf_get,
  986. .put = hpf_put,
  987. },
  988. {
  989. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  990. .name = "Level Control Capture Enum",
  991. .info = wm8776_level_control_info,
  992. .get = wm8776_level_control_get,
  993. .put = wm8776_level_control_put,
  994. .private_value = 0,
  995. },
  996. };
  997. static const struct snd_kcontrol_new lc_controls[] = {
  998. WM8776_FIELD_CTL_VOLUME("Limiter Threshold",
  999. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  1000. LC_CONTROL_LIMITER, wm8776_lct_db_scale),
  1001. WM8776_FIELD_CTL_ENUM("Limiter Attack Time",
  1002. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  1003. LC_CONTROL_LIMITER),
  1004. WM8776_FIELD_CTL_ENUM("Limiter Decay Time",
  1005. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  1006. LC_CONTROL_LIMITER),
  1007. WM8776_FIELD_CTL_ENUM("Limiter Transient Window",
  1008. WM8776_LIMITER, 4, 2, 0, 7, 0x7,
  1009. LC_CONTROL_LIMITER),
  1010. WM8776_FIELD_CTL_VOLUME("Limiter Maximum Attenuation",
  1011. WM8776_LIMITER, 0, 6, 3, 12, 0xf,
  1012. LC_CONTROL_LIMITER,
  1013. wm8776_maxatten_lim_db_scale),
  1014. WM8776_FIELD_CTL_VOLUME("ALC Target Level",
  1015. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  1016. LC_CONTROL_ALC, wm8776_lct_db_scale),
  1017. WM8776_FIELD_CTL_ENUM("ALC Attack Time",
  1018. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  1019. LC_CONTROL_ALC),
  1020. WM8776_FIELD_CTL_ENUM("ALC Decay Time",
  1021. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  1022. LC_CONTROL_ALC),
  1023. WM8776_FIELD_CTL_VOLUME("ALC Maximum Gain",
  1024. WM8776_ALCCTRL1, 4, 7, 1, 7, 0x7,
  1025. LC_CONTROL_ALC, wm8776_maxgain_db_scale),
  1026. WM8776_FIELD_CTL_VOLUME("ALC Maximum Attenuation",
  1027. WM8776_LIMITER, 0, 10, 10, 15, 0xf,
  1028. LC_CONTROL_ALC, wm8776_maxatten_alc_db_scale),
  1029. WM8776_FIELD_CTL_ENUM("ALC Hold Time",
  1030. WM8776_ALCCTRL2, 0, 0, 0, 15, 0xf,
  1031. LC_CONTROL_ALC),
  1032. WM8776_BIT_SWITCH("Noise Gate Capture Switch",
  1033. WM8776_NOISEGATE, WM8776_NGAT, 0,
  1034. LC_CONTROL_ALC),
  1035. WM8776_FIELD_CTL_VOLUME("Noise Gate Threshold",
  1036. WM8776_NOISEGATE, 2, 0, 0, 7, 0x7,
  1037. LC_CONTROL_ALC, wm8776_ngth_db_scale),
  1038. };
  1039. static int add_lc_controls(struct oxygen *chip)
  1040. {
  1041. struct xonar_wm87x6 *data = chip->model_data;
  1042. unsigned int i;
  1043. struct snd_kcontrol *ctl;
  1044. int err;
  1045. BUILD_BUG_ON(ARRAY_SIZE(lc_controls) != ARRAY_SIZE(data->lc_controls));
  1046. for (i = 0; i < ARRAY_SIZE(lc_controls); ++i) {
  1047. ctl = snd_ctl_new1(&lc_controls[i], chip);
  1048. if (!ctl)
  1049. return -ENOMEM;
  1050. err = snd_ctl_add(chip->card, ctl);
  1051. if (err < 0)
  1052. return err;
  1053. data->lc_controls[i] = ctl;
  1054. }
  1055. return 0;
  1056. }
  1057. static int xonar_ds_mixer_init(struct oxygen *chip)
  1058. {
  1059. struct xonar_wm87x6 *data = chip->model_data;
  1060. unsigned int i;
  1061. struct snd_kcontrol *ctl;
  1062. int err;
  1063. for (i = 0; i < ARRAY_SIZE(ds_controls); ++i) {
  1064. ctl = snd_ctl_new1(&ds_controls[i], chip);
  1065. if (!ctl)
  1066. return -ENOMEM;
  1067. err = snd_ctl_add(chip->card, ctl);
  1068. if (err < 0)
  1069. return err;
  1070. if (!strcmp(ctl->id.name, "Line Capture Switch"))
  1071. data->line_adcmux_control = ctl;
  1072. else if (!strcmp(ctl->id.name, "Mic Capture Switch"))
  1073. data->mic_adcmux_control = ctl;
  1074. }
  1075. if (!data->line_adcmux_control || !data->mic_adcmux_control)
  1076. return -ENXIO;
  1077. return add_lc_controls(chip);
  1078. }
  1079. static int xonar_hdav_slim_mixer_init(struct oxygen *chip)
  1080. {
  1081. unsigned int i;
  1082. struct snd_kcontrol *ctl;
  1083. int err;
  1084. for (i = 0; i < ARRAY_SIZE(hdav_slim_controls); ++i) {
  1085. ctl = snd_ctl_new1(&hdav_slim_controls[i], chip);
  1086. if (!ctl)
  1087. return -ENOMEM;
  1088. err = snd_ctl_add(chip->card, ctl);
  1089. if (err < 0)
  1090. return err;
  1091. }
  1092. return add_lc_controls(chip);
  1093. }
  1094. static void dump_wm8776_registers(struct oxygen *chip,
  1095. struct snd_info_buffer *buffer)
  1096. {
  1097. struct xonar_wm87x6 *data = chip->model_data;
  1098. unsigned int i;
  1099. snd_iprintf(buffer, "\nWM8776:\n00:");
  1100. for (i = 0; i < 0x10; ++i)
  1101. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  1102. snd_iprintf(buffer, "\n10:");
  1103. for (i = 0x10; i < 0x17; ++i)
  1104. snd_iprintf(buffer, " %03x", data->wm8776_regs[i]);
  1105. snd_iprintf(buffer, "\n");
  1106. }
  1107. static void dump_wm87x6_registers(struct oxygen *chip,
  1108. struct snd_info_buffer *buffer)
  1109. {
  1110. struct xonar_wm87x6 *data = chip->model_data;
  1111. unsigned int i;
  1112. dump_wm8776_registers(chip, buffer);
  1113. snd_iprintf(buffer, "\nWM8766:\n00:");
  1114. for (i = 0; i < 0x10; ++i)
  1115. snd_iprintf(buffer, " %03x", data->wm8766_regs[i]);
  1116. snd_iprintf(buffer, "\n");
  1117. }
  1118. static const struct oxygen_model model_xonar_ds = {
  1119. .longname = "Asus Virtuoso 66",
  1120. .chip = "AV200",
  1121. .init = xonar_ds_init,
  1122. .mixer_init = xonar_ds_mixer_init,
  1123. .cleanup = xonar_ds_cleanup,
  1124. .suspend = xonar_ds_suspend,
  1125. .resume = xonar_ds_resume,
  1126. .pcm_hardware_filter = wm8776_adc_hardware_filter,
  1127. .set_dac_params = set_wm87x6_dac_params,
  1128. .set_adc_params = set_wm8776_adc_params,
  1129. .update_dac_volume = update_wm87x6_volume,
  1130. .update_dac_mute = update_wm87x6_mute,
  1131. .update_center_lfe_mix = update_wm8766_center_lfe_mix,
  1132. .gpio_changed = xonar_ds_gpio_changed,
  1133. .dump_registers = dump_wm87x6_registers,
  1134. .dac_tlv = wm87x6_dac_db_scale,
  1135. .model_data_size = sizeof(struct xonar_wm87x6),
  1136. .device_config = PLAYBACK_0_TO_I2S |
  1137. PLAYBACK_1_TO_SPDIF |
  1138. CAPTURE_0_FROM_I2S_1 |
  1139. CAPTURE_1_FROM_SPDIF,
  1140. .dac_channels_pcm = 8,
  1141. .dac_channels_mixer = 8,
  1142. .dac_volume_min = 255 - 2*60,
  1143. .dac_volume_max = 255,
  1144. .function_flags = OXYGEN_FUNCTION_SPI,
  1145. .dac_mclks = OXYGEN_MCLKS(256, 256, 128),
  1146. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  1147. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1148. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1149. };
  1150. static const struct oxygen_model model_xonar_hdav_slim = {
  1151. .shortname = "Xonar HDAV1.3 Slim",
  1152. .longname = "Asus Virtuoso 200",
  1153. .chip = "AV200",
  1154. .init = xonar_hdav_slim_init,
  1155. .mixer_init = xonar_hdav_slim_mixer_init,
  1156. .cleanup = xonar_hdav_slim_cleanup,
  1157. .suspend = xonar_hdav_slim_suspend,
  1158. .resume = xonar_hdav_slim_resume,
  1159. .pcm_hardware_filter = xonar_hdav_slim_hardware_filter,
  1160. .set_dac_params = set_hdav_slim_dac_params,
  1161. .set_adc_params = set_wm8776_adc_params,
  1162. .update_dac_volume = update_wm8776_volume,
  1163. .update_dac_mute = update_wm8776_mute,
  1164. .uart_input = xonar_hdmi_uart_input,
  1165. .dump_registers = dump_wm8776_registers,
  1166. .dac_tlv = wm87x6_dac_db_scale,
  1167. .model_data_size = sizeof(struct xonar_wm87x6),
  1168. .device_config = PLAYBACK_0_TO_I2S |
  1169. PLAYBACK_1_TO_SPDIF |
  1170. CAPTURE_0_FROM_I2S_1 |
  1171. CAPTURE_1_FROM_SPDIF,
  1172. .dac_channels_pcm = 8,
  1173. .dac_channels_mixer = 2,
  1174. .dac_volume_min = 255 - 2*60,
  1175. .dac_volume_max = 255,
  1176. .function_flags = OXYGEN_FUNCTION_2WIRE,
  1177. .dac_mclks = OXYGEN_MCLKS(256, 256, 128),
  1178. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  1179. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1180. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  1181. };
  1182. int get_xonar_wm87x6_model(struct oxygen *chip,
  1183. const struct pci_device_id *id)
  1184. {
  1185. switch (id->subdevice) {
  1186. case 0x838e:
  1187. chip->model = model_xonar_ds;
  1188. chip->model.shortname = "Xonar DS";
  1189. break;
  1190. case 0x8522:
  1191. chip->model = model_xonar_ds;
  1192. chip->model.shortname = "Xonar DSX";
  1193. break;
  1194. case 0x835e:
  1195. chip->model = model_xonar_hdav_slim;
  1196. break;
  1197. default:
  1198. return -EINVAL;
  1199. }
  1200. return 0;
  1201. }